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ARM: dts: k3-j721s2: Correct timer frequency

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MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.

Without this delays in R5 SPL are 10x off.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Vignesh Raghavendra
2022-03-07 14:55:51 +05:30
committed by Tom Rini
parent 1583c87b1b
commit 7262ff7e56
1 changed files with 1 additions and 1 deletions
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2
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
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@@ -40,7 +40,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x40400000 0x0 0x80>;
ti,timer-alwon;
clock-frequency = <25000000>;
clock-frequency = <250000000>;
u-boot,dm-spl;
};