arm, imx6: add support for aristainetos2 board
add support for imx6dl based aristainetos2 board
U-Boot 2015.04-rc5-00066-g60f6ed4 (Apr 10 2015 - 08:46:27)
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
Reset cause: WDOG
Board: aristaitenos2
Watchdog enabled
I2C: ready
DRAM: 1 GiB
NAND: 1024 MiB
MMC: FSL_SDHC: 0
SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lg4573 (480x800)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
=>
Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher
committed by
Stefano Babic
Stefano Babic
parent
e6c8b716c7
commit
7254d92ebc
333
include/configs/aristainetos-common.h
Normal file
333
include/configs/aristainetos-common.h
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@@ -0,0 +1,333 @@
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/*
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* (C) Copyright 2015
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* (C) Copyright 2014
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreSD board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ARISTAINETOS_COMMON_CONFIG_H
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#define __ARISTAINETOS_COMMON_CONFIG_H
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#define CONFIG_MX6
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#include "mx6_common.h"
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#include <linux/sizes.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_MACH_TYPE 4501
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#define CONFIG_MMCROOT "/dev/mmcblk0p1"
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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#define CONFIG_SYS_GENERIC_BOARD
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_MTD
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 3
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BMODE
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_SETEXPR
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=u-boot.scr\0" \
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"fit_file=/boot/system.itb\0" \
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"loadaddr=0x12000000\0" \
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"fit_addr_r=0x14000000\0" \
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"uboot=/boot/u-boot.imx\0" \
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"uboot_sz=d0000\0" \
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"rescue_sys_addr=f0000\0" \
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"rescue_sys_length=f10000\0" \
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"panel=lb07wv8\0" \
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"splashpos=m,m\0" \
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"console=" CONFIG_CONSOLE_DEV "\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
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"default ${board_type}\0" \
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"get_env=mw ${loadaddr} 0 0x20000;" \
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"mmc rescan;" \
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"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
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"env import -t ${loadaddr}\0" \
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"default_env=mw ${loadaddr} 0 0x20000;" \
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"env export -t ${loadaddr} serial# ethaddr eth1addr " \
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"board_type panel;" \
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"env default -a;" \
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"env import -t ${loadaddr}\0" \
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"loadbootscript=" \
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"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"mmcpart=1\0" \
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"mmcdev=0\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs addmtd addmisc set_fit_default;" \
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"bootm ${fit_addr_r}\0" \
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"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
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"${fit_file}\0" \
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"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
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"${uboot}\0" \
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"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
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"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
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"setexpr uboot_maxsize ${uboot_sz} - 400;" \
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"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
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"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
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"sf write ${loadaddr} 400 ${filesize};" \
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"sf read ${cmp_buf} 400 ${uboot_sz};" \
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"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
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"ubiboot=echo Booting from ubi ...; " \
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"run ubiargs addmtd addmisc set_fit_default;" \
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"bootm ${fit_addr_r}\0" \
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"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
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"ubifsload ${fit_addr_r} /boot/system.itb; " \
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"imi ${fit_addr_r}\0 " \
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"rescueargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/ram rw\0 " \
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"rescueboot=echo Booting rescue system from NOR ...; " \
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"run rescueargs addmtd addmisc set_fit_default;" \
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"bootm ${fit_addr_r}\0" \
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"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
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"${rescue_sys_length}; imi ${fit_addr_r}\0" \
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CONFIG_EXTRA_ENV_BOARD_SETTINGS
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run mmc_load_fit; then " \
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"run mmcboot; " \
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"else " \
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"if run ubifs_load_fit; then " \
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"run ubiboot; " \
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"else " \
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"if run rescue_load_fit; then " \
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"run rescueboot; " \
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"else " \
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"echo RESCUE SYSTEM BOOT " \
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"FAILURE;" \
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"fi; " \
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"fi; " \
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"fi; " \
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"fi; " \
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"else " \
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"if run ubifs_load_fit; then " \
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"run ubiboot; " \
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"else " \
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"if run rescue_load_fit; then " \
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"run rescueboot; " \
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"else " \
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"echo RESCUE SYSTEM BOOT FAILURE;" \
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"fi; " \
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"fi; " \
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"fi"
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_STACKSIZE (128 * 1024)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (12 * 1024)
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SECT_SIZE (0x010000)
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#define CONFIG_ENV_OFFSET (0x0d0000)
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#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_CACHE
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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/* I2C */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0x7f
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#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
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#define CONFIG_CMD_GPIO
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/* NAND stuff */
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* DMA stuff, needed for GPMI/MXS NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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/* RTC */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_RTC_BUS_NUM 2
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#define CONFIG_RTC_M41T11
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#define CONFIG_CMD_DATE
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_FAT
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* UBI support */
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_MTD_UBI_FASTMAP
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#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_IMX_WATCHDOG
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#define CONFIG_FIT
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/* Framebuffer */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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/* check this console not needed, after test remove it */
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_IPUV3_CLK 198000000
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#define CONFIG_IMX_VIDEO_SKIP
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#define CONFIG_CMD_BMP
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#define CONFIG_PWM_IMX
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#define CONFIG_IMX6_PWM_PER_CLK 66000000
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#endif /* __ARISTAINETOS_COMMON_CONFIG_H */
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@@ -13,333 +13,31 @@
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#ifndef __ARISTAINETOS_CONFIG_H
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#define __ARISTAINETOS_CONFIG_H
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#define CONFIG_MX6
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#include "mx6_common.h"
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#include <linux/sizes.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_MACH_TYPE 4501
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#define CONFIG_MMCROOT "/dev/mmcblk0p1"
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#define CONFIG_SYS_BOARD_VERSION 1
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#define CONFIG_HOSTNAME aristainetos
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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#define CONFIG_BOARDNAME "aristainetos"
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#define CONFIG_SYS_GENERIC_BOARD
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART5_BASE
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#define CONFIG_CONSOLE_DEV "ttymxc4"
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#define CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_MTD
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 3
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_BMODE
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_SETEXPR
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=u-boot.scr\0" \
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"fit_file=/boot/system.itb\0" \
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||||
"loadaddr=0x12000000\0" \
|
||||
"fit_addr_r=0x14000000\0" \
|
||||
"uboot=/boot/u-boot.imx\0" \
|
||||
"uboot_sz=d0000\0" \
|
||||
"rescue_sys_addr=f0000\0" \
|
||||
"rescue_sys_length=f10000\0" \
|
||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
||||
"board_type=aristainetos7@1\0" \
|
||||
"panel=lb07wv8\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"console=" CONFIG_CONSOLE_DEV "\0" \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
"initrd_high=0xffffffff\0" \
|
||||
"mtdids=nand0=gpmi-nand,nor0=spi3.0\0" \
|
||||
"mtdparts=mtdparts=spi3.0:832k(u-boot),64k(env),64k(env-red)," \
|
||||
"-(rescue-system);gpmi-nand:-(ubi)\0" \
|
||||
"addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \
|
||||
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||
"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
|
||||
"default ${board_type}\0" \
|
||||
"get_env=mw ${loadaddr} 0 0x20000;" \
|
||||
"mmc rescan;" \
|
||||
"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
|
||||
"env import -t ${loadaddr}\0" \
|
||||
"default_env=mw ${loadaddr} 0 0x20000;" \
|
||||
"env export -t ${loadaddr} serial# ethaddr eth1addr " \
|
||||
"board_type panel;" \
|
||||
"env default -a;" \
|
||||
"env import -t ${loadaddr}\0" \
|
||||
"loadbootscript=" \
|
||||
"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source\0" \
|
||||
"mmcpart=1\0" \
|
||||
"mmcdev=0\0" \
|
||||
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=${mmcroot}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs addmtd addmisc set_fit_default;" \
|
||||
"bootm ${fit_addr_r}\0" \
|
||||
"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
|
||||
"${fit_file}\0" \
|
||||
"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
|
||||
"${uboot}\0" \
|
||||
"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
|
||||
"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
|
||||
"setexpr uboot_maxsize ${uboot_sz} - 400;" \
|
||||
"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
|
||||
"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
|
||||
"sf write ${loadaddr} 400 ${filesize};" \
|
||||
"sf read ${cmp_buf} 400 ${uboot_sz};" \
|
||||
"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
|
||||
"ubiargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \
|
||||
"ubiboot=echo Booting from ubi ...; " \
|
||||
"run ubiargs addmtd addmisc set_fit_default;" \
|
||||
"bootm ${fit_addr_r}\0" \
|
||||
"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
|
||||
"ubifsload ${fit_addr_r} /boot/system.itb; " \
|
||||
"imi ${fit_addr_r}\0 " \
|
||||
"rescueargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/ram rw\0 " \
|
||||
"rescueboot=echo Booting rescue system from NOR ...; " \
|
||||
"run rescueargs addmtd addmisc set_fit_default;" \
|
||||
"bootm ${fit_addr_r}\0" \
|
||||
"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
|
||||
"${rescue_sys_length}; imi ${fit_addr_r}\0 "
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev};" \
|
||||
"if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run mmc_load_fit; then " \
|
||||
"run mmcboot; " \
|
||||
"else " \
|
||||
"if run ubifs_load_fit; then " \
|
||||
"run ubiboot; " \
|
||||
"else " \
|
||||
"if run rescue_load_fit; then " \
|
||||
"run rescueboot; " \
|
||||
"else " \
|
||||
"echo RESCUE SYSTEM BOOT " \
|
||||
"FAILURE;" \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"if run ubifs_load_fit; then " \
|
||||
"run ubiboot; " \
|
||||
"else " \
|
||||
"if run rescue_load_fit; then " \
|
||||
"run rescueboot; " \
|
||||
"else " \
|
||||
"echo RESCUE SYSTEM BOOT FAILURE;" \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"fi"
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200UL
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
|
||||
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_STACKSIZE (128 * 1024)
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
|
||||
#define CONFIG_ENV_SIZE (12 * 1024)
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
|
||||
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
|
||||
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
|
||||
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
||||
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
|
||||
#define CONFIG_ENV_SECT_SIZE (0x010000)
|
||||
#define CONFIG_ENV_OFFSET (0x0d0000)
|
||||
#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
|
||||
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
#define CONFIG_CMD_CACHE
|
||||
|
||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MXC
|
||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7f
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
|
||||
|
||||
#define CONFIG_CMD_GPIO
|
||||
#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
|
||||
|
||||
/* NAND stuff */
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_NAND_TRIMFFS
|
||||
#define CONFIG_NAND_MXS
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
|
||||
|
||||
/* DMA stuff, needed for GPMI/MXS NAND support */
|
||||
#define CONFIG_APBH_DMA
|
||||
#define CONFIG_APBH_DMA_BURST
|
||||
#define CONFIG_APBH_DMA_BURST8
|
||||
|
||||
/* RTC */
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
||||
#define CONFIG_SYS_RTC_BUS_NUM 2
|
||||
#define CONFIG_RTC_M41T11
|
||||
#define CONFIG_CMD_DATE
|
||||
|
||||
/* USB Configs */
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MX6
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
|
||||
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
|
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#define CONFIG_MXC_USB_FLAGS 0
|
||||
"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 "
|
||||
|
||||
#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
|
||||
#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31)
|
||||
#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
|
||||
|
||||
/* UBI support */
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_RBTREE
|
||||
#define CONFIG_LZO
|
||||
#define CONFIG_CMD_UBI
|
||||
#define CONFIG_CMD_UBIFS
|
||||
#include "aristainetos-common.h"
|
||||
|
||||
#define CONFIG_MTD_UBI_FASTMAP
|
||||
#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
|
||||
|
||||
#define CONFIG_HW_WATCHDOG
|
||||
#define CONFIG_IMX_WATCHDOG
|
||||
|
||||
#define CONFIG_FIT
|
||||
|
||||
/* Framebuffer */
|
||||
#define CONFIG_VIDEO
|
||||
#define CONFIG_VIDEO_IPUV3
|
||||
/* check this console not needed, after test remove it */
|
||||
#define CONFIG_CFB_CONSOLE
|
||||
#define CONFIG_VGA_AS_SINGLE_DEVICE
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
|
||||
#define CONFIG_VIDEO_BMP_RLE8
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_SPLASH_SCREEN_ALIGN
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 198000000
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
#define CONFIG_CMD_BMP
|
||||
|
||||
#define CONFIG_PWM_IMX
|
||||
#define CONFIG_IMX6_PWM_PER_CLK 66000000
|
||||
#endif /* __ARISTAINETOS_CONFIG_H */
|
||||
|
||||
56
include/configs/aristainetos2.h
Normal file
56
include/configs/aristainetos2.h
Normal file
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* (C) Copyright 2015
|
||||
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
|
||||
*
|
||||
* Based on:
|
||||
* Copyright (C) 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Configuration settings for the Freescale i.MX6DL aristainetos2 board.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#ifndef __ARISTAINETOS2_CONFIG_H
|
||||
#define __ARISTAINETOS2_CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_BOARD_VERSION 2
|
||||
#define CONFIG_HOSTNAME aristainetos2
|
||||
#define CONFIG_BOARDNAME "aristainetos2"
|
||||
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
|
||||
#define CONFIG_MXC_UART_BASE UART2_BASE
|
||||
#define CONFIG_CONSOLE_DEV "ttymxc1"
|
||||
|
||||
#define CONFIG_FEC_XCV_TYPE RGMII
|
||||
#define CONFIG_PHY_MICREL_KSZ9031
|
||||
|
||||
#define CONFIG_SF_DEFAULT_CS 1
|
||||
|
||||
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
|
||||
"board_type=aristainetos2_7@1\0" \
|
||||
"nor_bootdelay=-2\0" \
|
||||
"mtdids=nand0=gpmi-nand,nor0=spi3.1\0" \
|
||||
"mtdparts=mtdparts=spi3.1:832k(u-boot),64k(env),64k(env-red)," \
|
||||
"-(rescue-system);gpmi-nand:-(ubi)\0" \
|
||||
"addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \
|
||||
"ubiargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 "
|
||||
|
||||
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
|
||||
|
||||
#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
|
||||
#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0)
|
||||
#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
|
||||
|
||||
/* Framebuffer */
|
||||
#define CONFIG_SYS_LDB_CLOCK 33246000
|
||||
#define CONFIG_LG4573
|
||||
|
||||
#define CONFIG_CMD_BMP
|
||||
|
||||
#define CONFIG_PWM_IMX
|
||||
#define CONFIG_IMX6_PWM_PER_CLK 66000000
|
||||
|
||||
#include "aristainetos-common.h"
|
||||
|
||||
#endif /* __ARISTAINETOS2_CONFIG_H */
|
||||
Reference in New Issue
Block a user