From d11fa9c16b8f50788c07e22bd742177d14e435b2 Mon Sep 17 00:00:00 2001 From: Sergei Trofimovich Date: Mon, 30 Dec 2019 15:53:41 +0000 Subject: [PATCH 1/4] include: fix 'ulong' definition on musl targets The build failure was originally reported on arm64-musl target at https://bugs.gentoo.org/703132. Here is the amd64-musl variant: ``` $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc) $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc) ... In file included from tools/env/../../env/flags.c:7, from tools/env/env_flags.c:1: include/env.h:159:1: error: unknown type name 'ulong'; did you mean 'long'? 159 | ulong env_get_ulong(const char *name, int base, ulong default_val); | ^~~~~ | long ``` Note: 'ulong' is not defined there. On glibc 'ulong' comes from : ```c /* Old compatibility names for C types. */ typedef unsigned long int ulong; ``` On musl it comes from as well but from under different guards: ```c typedef unsigned long u_long, ulong; ``` The change inlines 'ulong' define similar to 'uint' define. Bug: https://bugs.gentoo.org/703132 Signed-off-by: Sergei Trofimovich --- include/compiler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/compiler.h b/include/compiler.h index 29507f9840..90372f239c 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -46,7 +46,6 @@ # include #elif defined(__MACH__) || defined(__FreeBSD__) # include -typedef unsigned long ulong; #endif #ifdef __FreeBSD__ # include /* htole32 and friends */ @@ -66,6 +65,7 @@ typedef uint8_t __u8; typedef uint16_t __u16; typedef uint32_t __u32; typedef unsigned int uint; +typedef unsigned long ulong; #define uswap_16(x) \ ((((x) & 0xff00) >> 8) | \ From c6ad93612ac90e99ae19103146d1128fef4030ea Mon Sep 17 00:00:00 2001 From: Sergei Trofimovich Date: Mon, 30 Dec 2019 15:53:42 +0000 Subject: [PATCH 2/4] include/u-boot/crc.h: pull 'uint' definition on musl targets The build failure was originally reported on arm64-musl target at https://bugs.gentoo.org/703132. Here is the amd64-musl variant: ``` $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc) $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc) ... include/u-boot/crc.h:37:44: error: unknown type name 'uint'; did you mean 'int'? 37 | void crc16_ccitt_wd_buf(const uint8_t *in, uint len, | ^~~~ | int ``` Note: 'uint' is not defined there. On glibc 'uint' comes from and happens to work on most .c files. The change imports 'uint' declaration from ''. Bug: https://bugs.gentoo.org/703132 Signed-off-by: Sergei Trofimovich --- include/u-boot/crc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h index 1086d2168c..bfd477f31d 100644 --- a/include/u-boot/crc.h +++ b/include/u-boot/crc.h @@ -8,6 +8,8 @@ #ifndef _UBOOT_CRC_H #define _UBOOT_CRC_H +#include /* 'uint*' definitions */ + /** * crc8() - Calculate and return CRC-8 of the data * From 196d3e4017735c82cb5aa4387a9c44174a8391ac Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 31 Dec 2019 15:48:48 +0530 Subject: [PATCH 3/4] arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config tool Update the ddr settings to use the DDR reg config tool rev 0.2.0. This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order to avoid DSS underflow errors. Signed-off-by: Lokesh Vutla Signed-off-by: Kevin Scholz --- arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi b/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi index 135b6193a9..5ac32a0ffa 100644 --- a/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi +++ b/arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ - * This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.1.0 - * This file was generated on 09/06/2019 + * This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.2.0 + * This file was generated on 10/09/2019 */ #define DDRSS_PLL_FHS_CNT 10 @@ -283,7 +283,7 @@ #define DDRSS_CTL_271_DATA 0x1FFF1000 #define DDRSS_CTL_272_DATA 0x01FF0000 #define DDRSS_CTL_273_DATA 0x000101FF -#define DDRSS_CTL_274_DATA 0xFFFF0B00 +#define DDRSS_CTL_274_DATA 0x0FFF0B00 #define DDRSS_CTL_275_DATA 0x01010001 #define DDRSS_CTL_276_DATA 0x01010101 #define DDRSS_CTL_277_DATA 0x01180101 From 40109f4d7ed114cd473e5528b7b0a9a04be9207e Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Tue, 31 Dec 2019 15:49:55 +0530 Subject: [PATCH 4/4] arm: mach-k3: Enable WA for R5F deadlock On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla --- arch/arm/mach-k3/am6_init.c | 1 + arch/arm/mach-k3/common.c | 25 +++++++++++++++++++++++++ arch/arm/mach-k3/common.h | 1 + arch/arm/mach-k3/j721e_init.c | 1 + 4 files changed, 28 insertions(+) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 99edcd9a24..a78ffbb674 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -82,6 +82,7 @@ void board_init_f(ulong dummy) ctrl_mmr_unlock(); #ifdef CONFIG_CPU_V7R + disable_linefill_optimization(); setup_k3_mpu_regions(); #endif diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index bf631b74f8..50f5b81dfe 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -244,3 +244,28 @@ void board_prep_linux(bootm_headers_t *images) CONFIG_SYS_CACHELINE_SIZE)); } #endif + +#ifdef CONFIG_CPU_V7R +void disable_linefill_optimization(void) +{ + u32 actlr; + + /* + * On K3 devices there are 2 conditions where R5F can deadlock: + * 1.When software is performing series of store operations to + * cacheable write back/write allocate memory region and later + * on software execute barrier operation (DSB or DMB). R5F may + * hang at the barrier instruction. + * 2.When software is performing a mix of load and store operations + * within a tight loop and store operations are all writing to + * cacheable write back/write allocates memory regions, R5F may + * hang at one of the load instruction. + * + * To avoid the above two conditions disable linefill optimization + * inside Cortex R5F. + */ + asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr)); + actlr |= (1 << 13); /* Set DLFO bit */ + asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr)); +} +#endif diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 8f9a023921..35d1609cdc 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -16,3 +16,4 @@ void setup_k3_mpu_regions(void); int early_console_init(void); +void disable_linefill_optimization(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index d0bf86abeb..4758739266 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -87,6 +87,7 @@ void board_init_f(ulong dummy) ctrl_mmr_unlock(); #ifdef CONFIG_CPU_V7R + disable_linefill_optimization(); setup_k3_mpu_regions(); #endif