PXA: Add necessary information for RELOC

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-09-23 09:46:57 +02:00
parent 80124df14f
commit 6ef6eb91cd
21 changed files with 70 additions and 1 deletions
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -130,6 +130,9 @@

 #define	CONFIG_SYS_LOAD_ADDR		0xa1000000

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NOR FLASH
 */
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -161,6 +161,9 @@

 #define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * GPIO settings
 */
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -169,6 +169,9 @@

 #define	CONFIG_SYS_LOAD_ADDR		(0xa1000000)

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NOR FLASH
 */
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -145,6 +145,9 @@

 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * FLASH and environment organization
 */
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -181,6 +181,9 @@

 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 # if 0
 /* FIXME: switch to _documented_ registers */
 /*
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -218,6 +218,9 @@

 #undef CONFIG_SYS_SKIP_DRAM_SCRUB

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NAND Flash
 */
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -192,6 +192,9 @@

 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * JFFS2 partitions
 *
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -176,6 +176,9 @@

 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 #define FPGA_REGS_BASE_PHYSICAL 0x08000000

 /*
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -154,6 +154,9 @@

 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NOR FLASH
 */
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -155,6 +155,9 @@

 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NOR FLASH
 */
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -179,6 +179,9 @@
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * GPIO settings
 */
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -292,6 +292,9 @@

 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * GPIO settings
 */
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -212,6 +212,9 @@

 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * GPIO settings
 */
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -181,6 +181,9 @@
 #define	CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */

 #define	CONFIG_SYS_LOAD_ADDR		(0x5c000000)
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_GBL_DATA_SIZE + CONFIG_STACKSIZE + PHYS_SDRAM_1)

 /*
 * NOR FLASH
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -183,6 +183,10 @@
 #define CONFIG_ENV_ADDR		0x20000	        /* absolute address for now  */
 #define CONFIG_ENV_SIZE		0x2000

+#define	PHYS_SDRAM_1			WEP_SDRAM_1
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 #undef  CONFIG_ENV_OVERWRITE                    /* env is not writable now   */

 /*
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -167,6 +167,9 @@

 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * FLASH and environment organization
 */
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -174,6 +174,9 @@

 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * FLASH and environment organization
 */
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -53,6 +53,9 @@
 #define CONFIG_SYS_DRAM_BASE			0xa0000000
 #define CONFIG_SYS_DRAM_SIZE			0x04000000

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /* FLASH organization */
 #define CONFIG_SYS_MAX_FLASH_BANKS		1		/* max number of memory banks           */
 #define CONFIG_SYS_MAX_FLASH_SECT		128		/* max number of sectors on one chip    */
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -175,6 +175,9 @@ unsigned char zipitz2_spi_read(void);

 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
 * NOR FLASH
 */
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -190,6 +190,8 @@

 #undef CONFIG_SYS_SKIP_DRAM_SCRUB

+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)

 /*
 * NAND Flash