From 6dfc1f4c5139c9310ae36e0b12a9d2aa4984cd66 Mon Sep 17 00:00:00 2001 From: Bernhard Messerklinger Date: Thu, 25 Aug 2022 08:54:00 +0200 Subject: [PATCH 01/16] brppt1: Remove unused board variants The SPI and NAND board variants never went into production. Drop those board variants. Signed-off-by: Bernhard Messerklinger Reviewed-by: Wolfgang Wallner --- arch/arm/dts/Makefile | 2 - arch/arm/dts/am335x-brppt1-nand.dts | 374 --------------------------- arch/arm/dts/am335x-brppt1-spi.dts | 377 ---------------------------- board/BuR/brppt1/board.c | 4 +- board/BuR/brppt1/mux.c | 39 +-- configs/brppt1_nand_defconfig | 122 --------- configs/brppt1_spi_defconfig | 130 ---------- include/configs/brppt1.h | 64 +---- 8 files changed, 7 insertions(+), 1105 deletions(-) delete mode 100644 arch/arm/dts/am335x-brppt1-nand.dts delete mode 100644 arch/arm/dts/am335x-brppt1-spi.dts delete mode 100644 configs/brppt1_nand_defconfig delete mode 100644 configs/brppt1_spi_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7330121dba..5bff2e65b7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -388,8 +388,6 @@ dtb-$(CONFIG_AM33XX) += \ am335x-boneblack-wireless.dtb \ am335x-boneblue.dtb \ am335x-brppt1-mmc.dtb \ - am335x-brppt1-nand.dtb \ - am335x-brppt1-spi.dtb \ am335x-brxre1.dtb \ am335x-brsmarc1.dtb \ am335x-draco.dtb \ diff --git a/arch/arm/dts/am335x-brppt1-nand.dts b/arch/arm/dts/am335x-brppt1-nand.dts deleted file mode 100644 index 67c609739f..0000000000 --- a/arch/arm/dts/am335x-brppt1-nand.dts +++ /dev/null @@ -1,374 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 B&R Industrial Automation GmbH - * http://www.br-automation.com - * - */ -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "BRPPT1 (NAND) Panel"; - compatible = "ti,am33xx"; - - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (NAND)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; - - aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; - gpmc = &gpmc; - mmc = &mmc2; - fset = &fset; - }; - - chosen { - bootargs = "console=ttyO0,115200 earlyprintk"; - stdout-path = &uart0; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; -}; - -&uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&i2c0 { - u-boot,dm-spl; - status = "okay"; - clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <100000>; -}; - -&edma { - status = "okay"; -}; - -&cppi41dma { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb1 { - status = "okay"; - dr_mode = "host"; -}; - -&davinci_mdio { - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <1>; - }; - - phy1: ethernet-phy@1 { - reg = <2>; - }; -}; - -&mac { - dual_emac; - status = "okay"; -}; - -&cpsw_emac0 { - phy-handle = <&phy0>; - dual_emac_res_vlan = <1>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy-handle = <&phy1>; - dual_emac_res_vlan = <2>; - phy-mode = "mii"; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x4>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "disabled"; -}; - -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&gpio0 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio1 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio2 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio3 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&wdt2 { - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; -}; - -&gpmc { - u-boot,dm-spl; - status = "okay"; - pinctrl-names = "default"; - ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ - nand@0,0 { - compatible = "ti,omap2-nand"; - reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ - interrupt-parent = <&gpmc>; - rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */ - ti,nand-ecc-opt = "bch8"; - ti,elm-id = <&elm>; - nand-bus-width = <8>; - gpmc,device-width = <1>; - gpmc,sync-clk-ps = <0>; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <44>; - gpmc,cs-wr-off-ns = <44>; - gpmc,adv-on-ns = <6>; - gpmc,adv-rd-off-ns = <34>; - gpmc,adv-wr-off-ns = <44>; - gpmc,we-on-ns = <0>; - gpmc,we-off-ns = <40>; - gpmc,oe-on-ns = <0>; - gpmc,oe-off-ns = <54>; - gpmc,access-ns = <64>; - gpmc,rd-cycle-ns = <82>; - gpmc,wr-cycle-ns = <82>; - gpmc,wait-on-read = "true"; - gpmc,wait-on-write = "true"; - gpmc,bus-turnaround-ns = <0>; - gpmc,cycle2cycle-delay-ns = <0>; - gpmc,clk-activation-ns = <0>; - gpmc,wait-monitoring-ns = <0>; - gpmc,wr-access-ns = <40>; - gpmc,wr-data-mux-bus-ns = <0>; - gpmc,wait-pin = <1>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "NAND.MLO"; - reg = <0x00000000 0x000020000>; - }; - partition@1 { - label = "NAND.cfgscr"; - reg = <0x00020000 0x00020000>; - }; - partition@2 { - label = "NAND.dtb"; - reg = <0x00040000 0x00020000>; - }; - partition@3 { - label = "NAND.u-boot-env"; - reg = <0x00060000 0x00020000>; - }; - partition@4 { - label = "NAND.u-boot"; - reg = <0x00080000 0x00080000>; - }; - partition@5 { - label = "NAND.kernel"; - reg = <0x00100000 0x00400000>; - }; - partition@6 { - label = "NAND.rootfs"; - reg = <0x00500000 0x08000000>; - }; - partition@7 { - label = "NAND.user"; - reg = <0x08500000 0x17b00000>; - }; - }; -}; diff --git a/arch/arm/dts/am335x-brppt1-spi.dts b/arch/arm/dts/am335x-brppt1-spi.dts deleted file mode 100644 index ce3dce204d..0000000000 --- a/arch/arm/dts/am335x-brppt1-spi.dts +++ /dev/null @@ -1,377 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 B&R Industrial Automation GmbH - * http://www.br-automation.com - * - */ -/dts-v1/; - -#include "am33xx.dtsi" - -/ { - model = "BRPPT1 (MMC) Panel"; - compatible = "ti,am33xx"; - - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (SPI)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; - - aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; - gpmc = &gpmc; - mmc = &mmc2; - spi0 = &spi0; - fset = &fset; - }; - - chosen { - bootargs = "console=ttyO0,115200 earlyprintk"; - stdout-path = &uart0; - }; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; /* 256 MB */ - }; - - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - - vmmcsd_fixed: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; -}; - -&uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&i2c0 { - u-boot,dm-spl; - status = "okay"; - clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <100000>; -}; - -&spi0 { - u-boot,dm-spl; - status = "okay"; - - cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>, - <&gpio0 6 GPIO_ACTIVE_HIGH>, - <0>, - <0>; - - spi-max-frequency = <24000000>; - - spi_flash: spiflash@0 { - u-boot,dm-spl; - u-boot,dm-pre-reloc; - compatible = "spidev", "jedec,spi-nor"; - spi-max-frequency = <24000000>; - reg = <0>; - }; -}; - -&edma { - status = "okay"; -}; - -&cppi41dma { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb_ctrl_mod { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; - -&usb1 { - status = "okay"; - dr_mode = "host"; -}; - -&davinci_mdio { - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <1>; - }; - - phy1: ethernet-phy@1 { - reg = <2>; - }; -}; - -&mac { - status = "okay"; -}; - -&cpsw_emac0 { - phy-handle = <&phy0>; - dual_emac_res_vlan = <1>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy-handle = <&phy1>; - dual_emac_res_vlan = <2>; - phy-mode = "mii"; -}; - -&mmc1 { - u-boot,dm-spl; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x4>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "okay"; -}; - -&mmc2 { - u-boot,dm-spl; - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <0x8>; - ti,non-removable; - ti,needs-special-hs-handling; - ti,vcc-aux-disable-is-sleep; - status = "okay"; -}; - -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - -&gpio0 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio1 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio2 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&gpio3 { - u-boot,dm-spl; - ti,no-reset-on-init; -}; - -&wdt2 { - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; -}; - -&timer6 { /* used for cpsw end device */ - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&timer7 { /* used for cpsw end device */ - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&wdt2 { - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&epwmss0 { - status = "okay"; -}; - -&tscadc { - status = "okay"; -}; - -&dcan0 { - status = "okay"; -}; - -&dcan1 { - status = "okay"; -}; - -&sham { - status = "disabled"; -}; - -&aes { - status = "disabled"; -}; - -&rng { - status = "disabled"; -}; diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 7df37e4e66..c8dc186cdd 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -151,9 +151,7 @@ int board_init(void) hw_watchdog_init(); #endif gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_MTD_RAW_NAND - gpmc_init(); -#endif + return 0; } diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c index b863d37335..5d2c7a201e 100644 --- a/board/BuR/brppt1/mux.c +++ b/board/BuR/brppt1/mux.c @@ -26,6 +26,7 @@ static struct module_pin_mux uart0_pin_mux[] = { {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, {-1}, }; + static struct module_pin_mux uart1_pin_mux[] = { /* UART1_RTS as I2C2-SCL */ {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, @@ -37,7 +38,7 @@ static struct module_pin_mux uart1_pin_mux[] = { {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, {-1}, }; -#ifdef CONFIG_MMC + static struct module_pin_mux mmc1_pin_mux[] = { {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */ {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */ @@ -54,7 +55,7 @@ static struct module_pin_mux mmc1_pin_mux[] = { {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */ {-1}, }; -#endif + static struct module_pin_mux i2c0_pin_mux[] = { /* I2C_DATA */ {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, @@ -118,26 +119,7 @@ static struct module_pin_mux mii2_pin_mux[] = { {OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */ {-1}, }; -#ifdef CONFIG_MTD_RAW_NAND -static struct module_pin_mux nand_pin_mux[] = { - {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ - {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ - {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ - {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ - {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ - {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ - {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ - {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ - {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ - {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ - {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ - {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ - {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ - {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ - {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ - {-1}, -}; -#endif + static struct module_pin_mux gpIOs[] = { /* GPIO0_6 (SPI0_CS1) - 3v3_PWR_nEN (Display Power Supply) */ {OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, @@ -180,14 +162,6 @@ static struct module_pin_mux gpIOs[] = { {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) }, /* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */ {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) }, -#ifndef CONFIG_MTD_RAW_NAND - /* GPIO2_3 - NAND_OE */ - {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, - /* GPIO2_4 - NAND_WEN */ - {OFFSET(gpmc_wen), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, - /* GPIO2_5 - NAND_BE_CLE */ - {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, -#endif {-1}, }; @@ -222,7 +196,6 @@ static struct module_pin_mux lcd_pin_mux[] = { {OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */ {OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */ {OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */ - {-1}, }; @@ -241,11 +214,7 @@ void enable_board_pin_mux(void) configure_module_pin_mux(i2c0_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii2_pin_mux); -#ifdef CONFIG_MTD_RAW_NAND - configure_module_pin_mux(nand_pin_mux); -#elif defined(CONFIG_MMC) configure_module_pin_mux(mmc1_pin_mux); -#endif configure_module_pin_mux(spi0_pin_mux); configure_module_pin_mux(lcd_pin_mux); configure_module_pin_mux(uart1_pin_mux); diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig deleted file mode 100644 index c5981bad49..0000000000 --- a/configs/brppt1_nand_defconfig +++ /dev/null @@ -1,122 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_LEN=0x500000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x60000 -CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" -CONFIG_AM33XX=y -CONFIG_TARGET_BRPPT1=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 -# CONFIG_EXPERT is not set -# CONFIG_FIT is not set -CONFIG_OF_BOARD_SETUP=y -CONFIG_BOOTDELAY=0 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run b_default" -CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -CONFIG_SPL_I2C=y -CONFIG_SPL_NAND_DRIVERS=y -CONFIG_SPL_NAND_ECC=y -CONFIG_SPL_NAND_BASE=y -CONFIG_SPL_POWER=y -CONFIG_SPL_WATCHDOG=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 -CONFIG_CMD_BOOTZ=y -CONFIG_SYS_BOOTM_LEN=0x2000000 -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_CRC32 is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_NAND=y -CONFIG_CMD_PART=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -CONFIG_CMD_DHCP=y -CONFIG_BOOTP_MAY_FAIL=y -# CONFIG_CMD_NFS is not set -CONFIG_SYS_DISABLE_AUTOLOAD=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(MLO),128k(cfgscr),128k(dtb),128k(u-boot-env),512k(u-boot),4m(kernel),128m(rootfs),-(user)" -# CONFIG_SPL_DOS_PARTITION is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_NAND=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NET_RETRY_COUNT=10 -CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_NETCONSOLE=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_DM_I2C=y -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_MISC=y -# CONFIG_MMC is not set -CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y -CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 -CONFIG_SYS_NAND_PAGE_COUNT=0x40 -CONFIG_SYS_NAND_PAGE_SIZE=0x800 -CONFIG_SYS_NAND_OOBSIZE=0x40 -CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y -CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 -CONFIG_PHY_NATSEMI=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_DM_PMIC=y -# CONFIG_SPL_DM_PMIC is not set -CONFIG_PMIC_TPS65217=y -CONFIG_DM_SERIAL=y -CONFIG_USB=y -CONFIG_USB_MUSB_HOST=y -CONFIG_USB_MUSB_GADGET=y -CONFIG_USB_MUSB_TI=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_LZO=y -# CONFIG_OF_LIBFDT_OVERLAY is not set -# CONFIG_EFI_LOADER is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig deleted file mode 100644 index fa6b840d9e..0000000000 --- a/configs/brppt1_spi_defconfig +++ /dev/null @@ -1,130 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_LEN=0x500000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x20000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" -CONFIG_AM33XX=y -CONFIG_TARGET_BRPPT1=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL=y -CONFIG_ENV_OFFSET_REDUND=0x30000 -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y -CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 -# CONFIG_EXPERT is not set -# CONFIG_FIT is not set -CONFIG_OF_BOARD_SETUP=y -CONFIG_SPI_BOOT=y -CONFIG_BOOTDELAY=0 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run b_default" -CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_ARCH_MISC_INIT=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_SYS_SPL_MALLOC_SIZE=0x500000 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -CONFIG_SPL_I2C=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_DM_SPI_FLASH=y -CONFIG_SPL_POWER=y -CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 -CONFIG_SPL_WATCHDOG=y -CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 -CONFIG_CMD_BOOTZ=y -CONFIG_SYS_BOOTM_LEN=0x2000000 -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_CRC32 is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_BKOPS_ENABLE=y -CONFIG_CMD_PART=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -CONFIG_CMD_DHCP=y -CONFIG_BOOTP_MAY_FAIL=y -# CONFIG_CMD_NFS is not set -CONFIG_SYS_DISABLE_AUTOLOAD=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -# CONFIG_SPL_DOS_PARTITION is not set -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NET_RETRY_COUNT=10 -CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_NETCONSOLE=y -CONFIG_DM=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_DM_I2C=y -CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_MISC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_MTD=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_SPEED=24000000 -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_NATSEMI=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_DM_PMIC=y -# CONFIG_SPL_DM_PMIC is not set -CONFIG_PMIC_TPS65217=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_OMAP3_SPI=y -CONFIG_USB=y -CONFIG_USB_MUSB_HOST=y -CONFIG_USB_MUSB_GADGET=y -CONFIG_USB_MUSB_TI=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_FAT_WRITE=y -CONFIG_LZO=y -# CONFIG_OF_LIBFDT_OVERLAY is not set -# CONFIG_EFI_LOADER is not set diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 6cb1a10600..481473ae2c 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -27,31 +27,7 @@ * the Linux kernel. */ -#ifdef CONFIG_SPL_OS_BOOT -/* RAW SD card / eMMC */ - -#endif /* CONFIG_SPL_OS_BOOT */ - -#ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#endif /* CONFIG_MTD_RAW_NAND */ - -#ifdef CONFIG_MTD_RAW_NAND -#define NANDTGTS \ -"cfgscr=mw ${dtbaddr} 0; nand read ${cfgaddr} cfgscr && source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" \ -"nandargs=setenv bootargs console=${console} ${optargs} ${optargs_rot} " \ - "root=mtd6 rootfstype=jffs2 b_mode=${b_mode}\0" \ -"b_nand=nand read ${loadaddr} kernel; nand read ${dtbaddr} dtb; " \ - "run nandargs; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ -"b_tgts_std=usb0 nand net\0" \ -"b_tgts_rcy=net usb0 nand\0" \ -"b_tgts_pme=usb0 nand net\0" -#else -#define NANDTGTS "" -#endif /* CONFIG_MTD_RAW_NAND */ - -#define MMCSPI_TGTS \ +#define MMC_TGTS \ "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \ "b_t30lgcy#0=" \ @@ -76,7 +52,7 @@ #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ -MMCSPI_TGTS \ +MMC_TGTS \ "cfgscr=mw ${dtbaddr} 0;" \ " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" @@ -84,16 +60,6 @@ MMCSPI_TGTS \ #define MMCTGTS "" #endif /* CONFIG_MMC */ -#ifdef CONFIG_SPI -#define SPITGTS \ -MMCSPI_TGTS \ -"cfgscr=mw ${dtbaddr} 0;" \ -" sf probe; sf read ${cfgaddr} 0xC0000 10000; source ${cfgaddr};" \ -" fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" -#else -#define SPITGTS "" -#endif /* CONFIG_SPI */ - #define LOAD_OFFSET(x) 0x8##x #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -110,8 +76,6 @@ BUR_COMMON_ENV \ "b_usb0=usb start && load usb 0 ${scraddr} bootscr.img && source ${scraddr}\0" \ "b_net=tftp ${scraddr} netscript.img && source ${scraddr}\0" \ MMCTGTS \ -SPITGTS \ -NANDTGTS \ "b_deftgts=if test ${b_mode} = 12; then setenv b_tgts ${b_tgts_pme};" \ " elif test ${b_mode} = 0; then setenv b_tgts ${b_tgts_rcy};" \ " else setenv b_tgts ${b_tgts_std}; fi\0" \ @@ -119,28 +83,4 @@ NANDTGTS \ " do echo \"### booting ${target} ###\"; run b_${target};" \ " if test ${b_break} = 1; then; exit; fi; done\0" -#ifdef CONFIG_MTD_RAW_NAND -/* - * GPMC block. We support 1 device and the physical address to - * access CS0 at is 0x8000000. - */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x8000000 -/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, \ - 18, 19, 20, 21, 22, 23, 24, 25, \ - 26, 27, 28, 29, 30, 31, 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, } - -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_NAND_OMAP_GPMC_WSCFG 1 -#endif /* CONFIG_MTD_RAW_NAND */ - #endif /* ! __CONFIG_BRPPT1_H__ */ From b0a18f1f9fe822d6a0c6d8ca7161193a86a66332 Mon Sep 17 00:00:00 2001 From: Bernhard Messerklinger Date: Thu, 25 Aug 2022 08:54:01 +0200 Subject: [PATCH 02/16] brppt1: Fix SPL boot stage Commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") syncs the am335x device tree with the latest linux kernel am335x device tree. That causes problems with device tree in SPL stage. To fix the issues CONFIG_SPL_OF_TRANSLATE must be set to handle the synced bus addresses correctly. A custom U-Boot device tree is also needed since the SPL build removes bus properties from bus nodes which are not explicitly marked with the u-boot,dm-spl or u-boot,dm-pre-reloc flag. Therefore all parent buses of the in the SPL needed devices must be marked with u-boot,dm-pre-reloc. Also since there is no driver for "ti,sysc" compatible property in SPL the buses marked with this compatible string must also be marked with compatible = "simple-bus" to make the underlying devices visible in SPL. Otherwise the matching device drivers aren't found and the uclass drivers are dropped. Signed-off-by: Bernhard Messerklinger Reviewed-by: Wolfgang Wallner --- arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi | 80 ++++++++++++++++++++++ configs/brppt1_mmc_defconfig | 2 +- 2 files changed, 81 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi diff --git a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi new file mode 100644 index 0000000000..0b9a1ccef4 --- /dev/null +++ b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 B&R Industrial Automation GmbH - + * https://www.br-automation.com/ + */ + +/ { + ocp { + u-boot,dm-pre-reloc; + }; +}; + +&l4_wkup { + u-boot,dm-pre-reloc; + segment@200000 { + u-boot,dm-pre-reloc; + target-module@0 + { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@7000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@9000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; +}; + +&wkup_cm { + u-boot,dm-pre-reloc; +}; + +&l4_wkup_clkctrl { + u-boot,dm-pre-reloc; +}; + +&l4_per { + u-boot,dm-pre-reloc; + segment@0 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + target-module@4c000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; + + segment@100000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + target-module@ac000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + target-module@ae000 { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + }; + }; +}; + +&prcm { + u-boot,dm-pre-reloc; +}; + +&gpio0_target { + u-boot,dm-pre-reloc; +}; + +&prcm_clocks { + compatible = "simple-bus"; +}; + +&scm_clocks { + compatible = "simple-bus"; +}; diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index b1ed2bcd68..716650aac9 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -90,7 +90,7 @@ CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y -# CONFIG_OF_TRANSLATE is not set +CONFIG_SPL_OF_TRANSLATE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y From febd82c45e8ca1841659e9c13cb0acd38463bc46 Mon Sep 17 00:00:00 2001 From: Bernhard Messerklinger Date: Thu, 25 Aug 2022 08:54:02 +0200 Subject: [PATCH 03/16] brppt1: Cleanup device tree * Remove unnecessary device tree nodes which are not needed in U-Boot directly. * Move all U-Boot specific device tree properties to u-boot dtsi. Signed-off-by: Bernhard Messerklinger Reviewed-by: Wolfgang Wallner --- arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi | 32 ++++ arch/arm/dts/am335x-brppt1-mmc.dts | 201 --------------------- 2 files changed, 32 insertions(+), 201 deletions(-) diff --git a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi index 0b9a1ccef4..a3d5650e48 100644 --- a/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi +++ b/arch/arm/dts/am335x-brppt1-mmc-u-boot.dtsi @@ -78,3 +78,35 @@ &scm_clocks { compatible = "simple-bus"; }; + +&i2c0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&mmc1 { + u-boot,dm-pre-reloc; +}; + +&mmc2 { + u-boot,dm-pre-reloc; +}; + +&gpio0 { + u-boot,dm-pre-reloc; +}; + +&gpio1 { + u-boot,dm-pre-reloc; +}; + +&gpio2 { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts b/arch/arm/dts/am335x-brppt1-mmc.dts index bd2f6c2e3e..4db279b65e 100644 --- a/arch/arm/dts/am335x-brppt1-mmc.dts +++ b/arch/arm/dts/am335x-brppt1-mmc.dts @@ -12,25 +12,10 @@ model = "BRPPT1 (MMC) Panel"; compatible = "ti,am33xx"; - fset: factory-settings { - bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - version = <0x0100>; - order-no = "6PPT30 (MMC)"; - hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; - serial-no = "0"; - device-id = <0x0>; - parent-id = <0x0>; - hw-variant = <0x1>; - }; aliases { - ds1bkl0 = &pwmbacklight; - ds1bkl1 = &tps_bl; - ds1timing = &timing0; - ds1ctrl = &lcdc; gpmc = &gpmc; mmc = &mmc2; - fset = &fset; }; chosen { @@ -43,110 +28,21 @@ reg = <0x80000000 0x10000000>; /* 256 MB */ }; - panel { - status = "disabled"; - - compatible = "ti,tilcdc,panel"; - enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - - backlight = <&pwmbacklight>; - bkl-pwm = <&pwmbacklight>; - bkl-tps = <&tps_bl>; - - panel-info { - ac-bias = <255>; - ac-bias-intrpt = <0>; - dma-burst-sz = <16>; - bpp = <32>; - fdd = <0x80>; - sync-edge = <0>; - sync-ctrl = <1>; - raster-order = <0>; - fifo-th = <0>; - }; - - display-timings { - native-mode = <&timing0>; - timing0: lcd { - clock-frequency = <32000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <2>; - hback-porch = <192>; - hsync-len = <1>; - vfront-porch = <20>; - vback-porch = <2>; - vsync-len = <1>; - hsync-active = <1>; - vsync-active = <1>; - pupdelay = <10>; - pondelay = <10>; - }; - }; - }; - vmmcsd_fixed: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - - pwm0: omap-pwm@timer5 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer5>; - #pwm-cells = <3>; - }; - - pwm1: omap-pwm@timer6 { - compatible = "ti,omap-dmtimer-pwm"; - ti,timers = <&timer6>; - #pwm-cells = <3>; - }; - - beeper: pwm-beep { - compatible = "pwm-beeper"; - pwms = <&pwm0 0 0 0>; - }; - - pwmbacklight: pwm-bkl { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000 0>; - - default-brightness-level = <255>; - brightness-levels = <0 16 32 64 128 170 202 234 255>; - - power-supply = <&vmmcsd_fixed>; - enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - }; }; &uart0 { /* console uart */ - u-boot,dm-spl; - status = "okay"; -}; - -&uart1 { status = "okay"; }; &i2c0 { - u-boot,dm-spl; status = "okay"; clock-frequency = <400000>; - - tps: tps@24 { /* PMIC controller */ - u-boot,dm-spl; - reg = <0x24>; - compatible = "ti,tps65217"; - - tps_bl: backlight { - compatible = "ti,tps65217-bl"; - isel = <1>; /* 1 - ISET1, 2 ISET2 */ - fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */ - default-brightness = <50>; - }; - }; }; &i2c2 { @@ -158,10 +54,6 @@ status = "okay"; }; -&cppi41dma { - status = "okay"; -}; - &usb { status = "okay"; }; @@ -217,7 +109,6 @@ }; &mmc1 { - u-boot,dm-spl; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x4>; ti,non-removable; @@ -227,7 +118,6 @@ }; &mmc2 { - u-boot,dm-spl; vmmc-supply = <&vmmcsd_fixed>; bus-width = <0x8>; ti,non-removable; @@ -236,79 +126,22 @@ status = "okay"; }; -&l4_per { - - segment@300000 { - - target-module@e000 { - u-boot,dm-pre-reloc; - - lcdc: lcdc@0 { - u-boot,dm-pre-reloc; - status = "disabled"; - }; - }; - }; -}; - -&elm { - status = "okay"; -}; - -&sham { - status = "okay"; -}; - -&aes { - status = "okay"; -}; - &gpio0 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio1 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio2 { - u-boot,dm-spl; ti,no-reset-on-init; }; &gpio3 { - u-boot,dm-spl; ti,no-reset-on-init; }; -&wdt2 { - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&tscadc { - status = "okay"; - tsc { - ti,wires = <4>; - ti,x-plate-resistance = <200>; - ti,zx-cutoff-ratio = <40>; - ti,min_deviation = <60>; - ti,max_deviation = <600>; - ti,coordinate-readouts = <5>; - ti,wire-config = <0x00 0x11 0x22 0x33>; - - bnr-buttons { - Home-Button {}; - }; - }; - - adc { - ti,adc-channels = <5 6 7>; - }; -}; - &timer6 { /* used for cpsw end device */ status = "okay"; ti,no-reset-on-init; @@ -320,37 +153,3 @@ ti,no-reset-on-init; ti,no-idle-on-init; }; - -&wdt2 { - status = "okay"; - ti,no-reset-on-init; - ti,no-idle-on-init; -}; - -&epwmss0 { - status = "okay"; -}; - -&tscadc { - status = "okay"; -}; - -&dcan0 { - status = "okay"; -}; - -&dcan1 { - status = "okay"; -}; - -&sham { - status = "disabled"; -}; - -&aes { - status = "disabled"; -}; - -&rng { - status = "disabled"; -}; From 0daeadbbd2513a9f79dae113aa47e1a71e5d9153 Mon Sep 17 00:00:00 2001 From: Bernhard Messerklinger Date: Thu, 25 Aug 2022 08:54:03 +0200 Subject: [PATCH 04/16] include: configs: brppt1: Fix commit 0ea4fc4dcf90 Commit 0ea4fc4dcf90 ("board/BuR: invalidate ${dtbaddr} before cfgscr") destroys the boot targets b_t30lgcy#0 and b_t30lgcy#1. The reason behind this is, that b_t30lgcy#0 and b_t30lgcy#1 both load the for booting needed device trees from mmc and the cfgscr script patches those. Because of this, cfgscr is not allowed to destroy the previously loaded device tree otherwise cfgscr will fail. This patch moves the device trees invalidation on warm restart to the PREBOOT cmd to fix that issue. Fixes: 0ea4fc4dcf90 ("board/BuR: invalidate ${dtbaddr} before cfgscr") Signed-off-by: Bernhard Messerklinger Reviewed-by: Wolfgang Wallner --- configs/brppt1_mmc_defconfig | 2 +- include/configs/brppt1.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 716650aac9..6da6d58bfd 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -26,7 +26,7 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="run cfgscr; run brdefaultip" +CONFIG_PREBOOT="mw ${dtbaddr} 0; run cfgscr; run brdefaultip" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 481473ae2c..aaf3f8b4a5 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -53,7 +53,6 @@ #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ MMC_TGTS \ -"cfgscr=mw ${dtbaddr} 0;" \ " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" #else From c79c0b46924c748c7618e113cf6feb304d1a0ee0 Mon Sep 17 00:00:00 2001 From: Bernhard Messerklinger Date: Thu, 25 Aug 2022 08:54:04 +0200 Subject: [PATCH 05/16] brppt1: Update environment to support new boot concept * Drop legacy /boot/PPTImage.md5 check * Update device tree naming * Update t30args#0 root cmd line property to support latest kernel versions (root=/dev/mmcblk0p2 for linux < 4 and root=/dev/mmcblk1p2 for linux >= 4) * Add custom bootloader version string * Destroy invalid dtb at ${dtbaddr} and configuration script at ${cfgaddr} to ensure proper boot in warm restart case. Signed-off-by: Bernhard Messerklinger Reviewed-by: Wolfgang Wallner --- configs/brppt1_mmc_defconfig | 4 +++- include/configs/brppt1.h | 18 ++++++++++++------ 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 6da6d58bfd..a45604de16 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -17,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_LOCALVERSION="-2.0.0" +# CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set @@ -26,7 +28,7 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run b_default" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="mw ${dtbaddr} 0; run cfgscr; run brdefaultip" +CONFIG_PREBOOT="mw ${cfgaddr} 0; mw ${dtbaddr} 0; run cfgscr; run brdefaultip" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index aaf3f8b4a5..2c5236aa58 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -29,18 +29,16 @@ #define MMC_TGTS \ "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ - "b_mode=${b_mode} root=/dev/mmcblk0p2 rootfstype=ext4\0" \ + "b_mode=${b_mode} root=${root_dev} rootfstype=ext4 rootwait\0" \ "b_t30lgcy#0=" \ - "load ${loaddev}:2 ${loadaddr} /boot/PPTImage.md5 && " \ "load ${loaddev}:2 ${loadaddr} /boot/zImage && " \ - "load ${loaddev}:2 ${dtbaddr} /boot/am335x-ppt30.dtb || " \ - "load ${loaddev}:1 ${dtbaddr} am335x-ppt30-legacy.dtb; "\ + "run load_dtb && " \ "run t30args#0; run cfgscr; bootz ${loadaddr} - ${dtbaddr}\0" \ "t30args#1=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ "b_mode=${b_mode}\0" \ "b_t30lgcy#1=" \ "load ${loaddev}:1 ${loadaddr} zImage && " \ - "load ${loaddev}:1 ${dtbaddr} am335x-ppt30.dtb && " \ + "load ${loaddev}:1 ${dtbaddr} am335x-brppt30.dtb && " \ "load ${loaddev}:1 ${ramaddr} rootfsPPT30.uboot && " \ "run t30args#1; run cfgscr; bootz ${loadaddr} ${ramaddr} ${dtbaddr}\0" \ "b_mmc0=load ${loaddev}:1 ${scraddr} bootscr.img && source ${scraddr}\0" \ @@ -48,11 +46,19 @@ "b_tgts_std=mmc0 mmc1 t30lgcy#0 t30lgcy#1 usb0 net\0" \ "b_tgts_rcy=t30lgcy#1 usb0 net\0" \ "b_tgts_pme=net usb0 mmc0 mmc1\0" \ -"loaddev=mmc 1\0" +"loaddev=mmc 1\0" \ +"root_dev=/dev/mmcblk0p2\0" \ +"load_dtb=load ${loaddev}:2 ${dtbaddr} /boot/am335x-brppt30.dtb; " \ + "if test $? -eq 0; then " \ + "setenv root_dev /dev/mmcblk1p2; " \ + "else; " \ + "load ${loaddev}:1 ${dtbaddr} am335x-brppt30-legacy.dtb; " \ + "fi;\0" #ifdef CONFIG_ENV_IS_IN_MMC #define MMCTGTS \ MMC_TGTS \ +"cfgscr=mw ${cfgaddr} 0;" \ " mmc dev 1; mmc read ${cfgaddr} 200 80; source ${cfgaddr};" \ " fdt addr ${dtbaddr} || cp ${fdtcontroladdr} ${dtbaddr} 4000\0" #else From 360c7f46f39242bab1d5bae3cd7b1d16fc33c304 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 30 Aug 2022 15:54:29 +0530 Subject: [PATCH 06/16] configs: Add configs for J7200 High Security EVM Add J7200 High Security EVM defconfig. These defconfigs are the same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_BOOTCOMMAND uses FIT images for booting Signed-off-by: Andrew Davis [j-choudhary@ti.com: add few configs from GP variant which were missing] Signed-off-by: Jayesh Choudhary --- MAINTAINERS | 4 +- configs/j7200_hs_evm_a72_defconfig | 208 +++++++++++++++++++++++++++++ configs/j7200_hs_evm_r5_defconfig | 172 ++++++++++++++++++++++++ 3 files changed, 383 insertions(+), 1 deletion(-) create mode 100644 configs/j7200_hs_evm_a72_defconfig create mode 100644 configs/j7200_hs_evm_r5_defconfig diff --git a/MAINTAINERS b/MAINTAINERS index 25a11a06c6..d66e3825b1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1389,8 +1389,10 @@ F: configs/k2g_hs_evm_defconfig F: configs/k2l_hs_evm_defconfig F: configs/am65x_hs_evm_r5_defconfig F: configs/am65x_hs_evm_a53_defconfig -F: configs/j721e_hs_evm_r5_defconfig +F: configs/j7200_hs_evm_a72_defconfig +F: configs/j7200_hs_evm_r5_defconfig F: configs/j721e_hs_evm_a72_defconfig +F: configs/j721e_hs_evm_r5_defconfig TPM DRIVERS M: Ilias Apalodimas diff --git a/configs/j7200_hs_evm_a72_defconfig b/configs/j7200_hs_evm_a72_defconfig new file mode 100644 index 0000000000..0583a2ab62 --- /dev/null +++ b/configs/j7200_hs_evm_a72_defconfig @@ -0,0 +1,208 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_J721E=y +CONFIG_TARGET_J7200_A72_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_PSCI_RESET is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" +CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_HBMC_AM654=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 +CONFIG_UFS=y +CONFIG_CADENCE_UFS=y +CONFIG_TI_J721E_UFS=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/j7200_hs_evm_r5_defconfig b/configs/j7200_hs_evm_r5_defconfig new file mode 100644 index 0000000000..975cbb8a50 --- /dev/null +++ b/configs/j7200_hs_evm_r5_defconfig @@ -0,0 +1,172 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x70000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SOC_K3_J721E=y +CONFIG_K3_EARLY_CONS=y +CONFIG_TARGET_J7200_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_USE_BOOTCOMMAND=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 +CONFIG_SPL_EARLY_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_FS_LOADER=y +CONFIG_SPL_FS_LOADER=y +CONFIG_K3_AVS0=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_HBMC_AM654=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_FS_EXT4=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y From 29e1044741e3afb17babde6bea583c6d704466c7 Mon Sep 17 00:00:00 2001 From: Jayesh Choudhary Date: Tue, 30 Aug 2022 15:54:30 +0530 Subject: [PATCH 07/16] configs: Add configs for j721s2 High Security EVM Add j721s2 High Security EVM defconfig. These configs are same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_BOOTCOMMAND uses FIT images for booting Signed-off-by: Jayesh Choudhary --- MAINTAINERS | 2 + configs/j721s2_hs_evm_a72_defconfig | 217 ++++++++++++++++++++++++++++ configs/j721s2_hs_evm_r5_defconfig | 178 +++++++++++++++++++++++ 3 files changed, 397 insertions(+) create mode 100644 configs/j721s2_hs_evm_a72_defconfig create mode 100644 configs/j721s2_hs_evm_r5_defconfig diff --git a/MAINTAINERS b/MAINTAINERS index d66e3825b1..1a7a56335f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1393,6 +1393,8 @@ F: configs/j7200_hs_evm_a72_defconfig F: configs/j7200_hs_evm_r5_defconfig F: configs/j721e_hs_evm_a72_defconfig F: configs/j721e_hs_evm_r5_defconfig +F: configs/j721s2_hs_evm_a72_defconfig +F: configs/j721s2_hs_evm_r5_defconfig TPM DRIVERS M: Ilias Apalodimas diff --git a/configs/j721s2_hs_evm_a72_defconfig b/configs/j721s2_hs_evm_a72_defconfig new file mode 100644 index 0000000000..851c98577d --- /dev/null +++ b/configs/j721s2_hs_evm_a72_defconfig @@ -0,0 +1,217 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_J721S2=y +CONFIG_TARGET_J721S2_A72_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x680000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_PSCI_RESET is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" +CONFIG_LOGLEVEL=7 +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a00000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_SYS_SPL_MALLOC_SIZE=0x800000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_ASKENV=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" +CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_CCF=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y +CONFIG_SPL_PHY=y +CONFIG_PHY_CADENCE_TORRENT=y +CONFIG_PHY_J721E_WIZ=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 +CONFIG_UFS=y +CONFIG_CADENCE_UFS=y +CONFIG_TI_J721E_UFS=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/j721s2_hs_evm_r5_defconfig b/configs/j721s2_hs_evm_r5_defconfig new file mode 100644 index 0000000000..696674ec42 --- /dev/null +++ b/configs/j721s2_hs_evm_r5_defconfig @@ -0,0 +1,178 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SOC_K3_J721S2=y +CONFIG_K3_EARLY_CONS=y +CONFIG_TARGET_J721S2_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board" +CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_SIZE_LIMIT=0x80000 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_USE_BOOTCOMMAND=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0xc0000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x41c76000 +CONFIG_SPL_BSS_MAX_SIZE=0xa000 +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 +CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 +CONFIG_SPL_EARLY_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_REMOTEPROC=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_FS_LOADER=y +CONFIG_SPL_FS_LOADER=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_GENERIC is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_GENERIC is not set +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_DM_RESET=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_HAS_CQSPI_REF_CLK=y +CONFIG_CQSPI_REF_CLK=133333333 +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_FS_EXT4=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_PANIC_HANG=y +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y From 0b6924cc0f192deffe546135224d3b3c4ecadbb8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:28:58 +0200 Subject: [PATCH 08/16] Nokia RX-51: Remove label copy_kernel_start from lowlevel_init.S MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Label copy_kernel_start is now unused. Remove it. Signed-off-by: Pali Rohár --- board/nokia/rx51/lowlevel_init.S | 1 - 1 file changed, 1 deletion(-) diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index c1785bc3f7..53697fd4e1 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -46,7 +46,6 @@ save_boot_params: * (CONFIG_SYS_TEXT_BASE). */ -copy_kernel_start: /* r0 - start of kernel before */ adr r0, kernoffs /* r0 - current address of kernoffs section */ ldr r1, kernoffs /* r1 - offset of kernel image from kernoffs section */ From 5c9bf1d65530d85dcdcca329bee7ce93818a6e3e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:28:59 +0200 Subject: [PATCH 09/16] Nokia RX-51: Do not clear unknown memory in lowlevel_init.S MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If kernel image in uImage or zImage format is not detected by lowlevel_init.S code then do not clear memory location where image was expected. If image is not detected then this memory region is unknown. So do not unconditionally clear it. Signed-off-by: Pali Rohár --- board/nokia/rx51/lowlevel_init.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index 53697fd4e1..1cf8f8d8b2 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -76,7 +76,7 @@ save_boot_params: ldr r4, [r0, #36] /* r4 - 4 bytes header of kernel at offset 36 */ ldr r5, z_magic /* r5 - LINUX_ARM_ZIMAGE_MAGIC */ cmp r4, r5 - bne copy_kernel_end /* skip if invalid image */ + bne skip_copy /* skip if invalid image */ copy_kernel_loop: ldmdb r1!, {r3 - r10} @@ -84,12 +84,12 @@ copy_kernel_loop: cmp r1, r0 bhi copy_kernel_loop -copy_kernel_end: - /* remove header in source kernel image */ mov r5, #0 str r5, [r0] /* remove 4 bytes header of kernel uImage */ str r5, [r0, #36] /* remove 4 bytes header of kernel zImage */ +skip_copy: + /* Returns */ b save_boot_params_ret From e1da01d7b10057de27baf579912d188da3550a4d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:00 +0200 Subject: [PATCH 10/16] Nokia RX-51: Set default SYS_LOAD_ADDR to 0x80008000 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At address 0x80000100 are stored initial atags passed to U-Boot by NOLO. So do not overwrite them when using $loadaddr variable which value is set from CONFIG_SYS_LOAD_ADDR option. Signed-off-by: Pali Rohár --- configs/nokia_rx51_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 41f8268ec2..6629137d00 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_LEN=0xc0000 CONFIG_TARGET_NOKIA_RX51=y -CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_SYS_LOAD_ADDR=0x80008000 CONFIG_OPTIMIZE_INLINING=y CONFIG_LTO=y # CONFIG_FIT is not set From fd986d6021e3a9f31bd062631132c493bae5cea6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:01 +0200 Subject: [PATCH 11/16] Nokia RX-51: Change UBIFS volume size to 1870 LEBs in test script MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Original Nokia UBIFS system image has 1870 LEBs, so set UBIFS volume size in test script to the same value. Number of 1870 LEBs corresponds to 230MiB (LEB size * num of LEBs = 126KiB * 1870 = 230MiB). Signed-off-by: Pali Rohár --- test/nokia_rx51_test.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index 28aa554ed8..abd1712fd7 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -129,7 +129,7 @@ cat > ubi.ini << EOF mode=ubi image=ubifs.img vol_id=0 -vol_size=160MiB +vol_size=230MiB # 1870 LEBs vol_type=dynamic vol_name=rootfs vol_alignment=1 From 7506965885fe5eea4945c9706377a679a2974aa7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:02 +0200 Subject: [PATCH 12/16] Nokia RX-51: Call bootm in test script only when image is valid MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When reading of image fails then do not call bootm. This prevents false positive test result in case something bootable is present in memory. Signed-off-by: Pali Rohár --- test/nokia_rx51_test.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index abd1712fd7..d2417a98bf 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -180,7 +180,7 @@ EOF # Generate bootmenu for OneNAND booting cat > bootmenu_nand << EOF -setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=mtd read initfs \${kernaddr}; setenv bootargs; setenv setup_omap_atag 1; bootm \${kernaddr}'; +setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=setenv bootargs; setenv setup_omap_atag 1; mtd read initfs \${kernaddr} && bootm \${kernaddr}'; setenv bootmenu_1; setenv bootmenu_delay 1; setenv bootdelay 1; From 05159cc6b6be7a841b88fd4714600c3d11a3f359 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:03 +0200 Subject: [PATCH 13/16] Nokia RX-51: Fix documentation how to enable UBI support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Disable UBI fastmap support which is not supported by original Maemo 5 kernel and explicitly set UBI BEB limit to 10%, which is the value used by original Maemo 5 kernel. U-Boot default value is 20%. Signed-off-by: Pali Rohár --- doc/board/nokia/rx51.rst | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/doc/board/nokia/rx51.rst b/doc/board/nokia/rx51.rst index 061fe7677e..7c6647bce2 100644 --- a/doc/board/nokia/rx51.rst +++ b/doc/board/nokia/rx51.rst @@ -158,8 +158,7 @@ UBIFS support add following lines into file ``configs/nokia_rx51_defconfig``:: CONFIG_CMD_UBI=y CONFIG_CMD_UBIFS=y - CONFIG_MTD_UBI_FASTMAP=y - CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 + CONFIG_MTD_UBI_BEB_LIMIT=10 Run in QEMU ----------- From 92e08722c9df93030e591681bd847b60af58779f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:04 +0200 Subject: [PATCH 14/16] Nokia RX-51: Do not set useless ARCH= in test script MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit U-Boot ignores ARCH= variable. Signed-off-by: Pali Rohár --- test/nokia_rx51_test.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index d2417a98bf..3fabc0e9b4 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -36,7 +36,7 @@ echo # First compile u-boot.bin binary for Nokia RX-51 board make nokia_rx51_config -make -j4 u-boot.bin ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- +make -j4 u-boot.bin CROSS_COMPILE=arm-linux-gnueabi- # And then do all stuff in temporary directory mkdir -p nokia_rx51_tmp From 21dc5efbf4185857f4ab35eae1174e8ac233999b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Sun, 4 Sep 2022 03:29:05 +0200 Subject: [PATCH 15/16] Nokia RX-51: Add comment describing kernel image type into test script MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Pali Rohár --- test/nokia_rx51_test.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index 3fabc0e9b4..fc5fe1c911 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -178,7 +178,7 @@ setenv bootdelay 1; EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_emmc2 -d bootmenu_emmc2 bootmenu_emmc2.scr -# Generate bootmenu for OneNAND booting +# Generate bootmenu for OneNAND booting (uImage) cat > bootmenu_nand << EOF setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=setenv bootargs; setenv setup_omap_atag 1; mtd read initfs \${kernaddr} && bootm \${kernaddr}'; setenv bootmenu_1; @@ -221,7 +221,7 @@ mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_em mcopy zImage-2.6.28-omap1 ::/zImage-2.6.28-omap1 -i emmc_emmc2.img mcopy bootmenu_emmc2.scr ::/bootmenu.scr -i emmc_emmc2.img -# Generate FAT32 eMMC image for OneNAND booting +# Generate FAT32 eMMC image for OneNAND booting (uImage) truncate -s 50MiB emmc_nand.img mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_nand.img mcopy bootmenu_nand.scr ::/bootmenu.scr -i emmc_nand.img From 43f7b81f9d138942d6f393f6836dfccbb4bd0539 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 15 Sep 2022 20:59:48 +0200 Subject: [PATCH 16/16] Nokia RX-51: Add booting from UBI into test script MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst instructions and add test case for loading kernel image from UBI volume. Signed-off-by: Pali Rohár --- test/nokia_rx51_test.sh | 95 +++++++++++++++++++++++++++++++++-------- 1 file changed, 77 insertions(+), 18 deletions(-) diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh index fc5fe1c911..a516ec2967 100755 --- a/test/nokia_rx51_test.sh +++ b/test/nokia_rx51_test.sh @@ -34,7 +34,18 @@ echo "========== Compiling U-Boot for Nokia RX-51 board ==========" echo "============================================================" echo -# First compile u-boot.bin binary for Nokia RX-51 board +# First compile u-boot-ubifs.bin binary with UBI/UBIFS support for Nokia RX-51 board according to doc/board/nokia/rx51.rst +make nokia_rx51_config +cat >> .config << EOF +CONFIG_CMD_UBI=y +CONFIG_CMD_UBIFS=y +CONFIG_MTD_UBI_BEB_LIMIT=10 +EOF +make olddefconfig +make -j4 u-boot.bin CROSS_COMPILE=arm-linux-gnueabi- +mv u-boot.bin u-boot-ubifs.bin + +# Then compile standard u-boot.bin binary for Nokia RX-51 board make nokia_rx51_config make -j4 u-boot.bin CROSS_COMPILE=arm-linux-gnueabi- @@ -44,6 +55,7 @@ cd nokia_rx51_tmp test -f mkimage || ln -s ../tools/mkimage . test -f u-boot.bin || ln -s ../u-boot.bin . +test -f u-boot-ubifs.bin || ln -s ../u-boot-ubifs.bin . echo echo "==========================================================================" @@ -99,6 +111,10 @@ echo "========== Generating images ==========" echo "=======================================" echo +# Generate kernel image in zImage and uImage format from FIASCO format +dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1 +./mkimage -A arm -O linux -T kernel -C none -a 80008000 -e 80008000 -n zImage-2.6.28-omap1 -d zImage-2.6.28-omap1 uImage-2.6.28-omap1 + # Generate rootfs directory mkdir -p rootfs mkdir -p rootfs/dev/ @@ -123,20 +139,7 @@ echo EOF chmod +x rootfs/sbin/preinit -# Generate ubi config file for ubi rootfs image -cat > ubi.ini << EOF -[rootfs] -mode=ubi -image=ubifs.img -vol_id=0 -vol_size=230MiB # 1870 LEBs -vol_type=dynamic -vol_name=rootfs -vol_alignment=1 -vol_flags=autoresize -EOF - -# Generate ubi rootfs image from rootfs directory +# Generate ubifs image from rootfs directory # NOTE: Character device on host filesystem can be created only by root # But we do not need it on host filesystem, just in ubifs image # So run mknod and mkfs.ubifs commands under fakeroot program @@ -149,8 +152,35 @@ fakeroot sh -c ' mknod rootfs/dev/console c 5 1; /usr/sbin/mkfs.ubifs -m 2048 -e 129024 -c 2047 -r rootfs ubifs.img; ' + +# Generate ubi image with rootfs on first volume +cat > ubi.ini << EOF +[rootfs] +mode=ubi +image=ubifs.img +vol_id=0 +vol_size=230MiB # 1870 LEBs +vol_type=dynamic +vol_name=rootfs +vol_alignment=1 +vol_flags=autoresize +EOF /usr/sbin/ubinize -o ubi.img -p 128KiB -m 2048 -s 512 ubi.ini +# Generate ubi image with rootfs on first volume and kernel in zImage format on second volume for UBI booting +cp ubi.ini ubi_with_kernel.ini +cat >> ubi_with_kernel.ini << EOF +[kernel] +mode=ubi +image=zImage-2.6.28-omap1 +vol_id=1 +vol_size=2MiB +vol_type=dynamic +vol_name=kernel +vol_alignment=1 +EOF +/usr/sbin/ubinize -o ubi_with_kernel.img -p 128KiB -m 2048 -s 512 ubi_with_kernel.ini + # Generate bootmenu for U-Boot serial console testing cat > bootmenu_uboot << EOF setenv bootmenu_0 'Serial console test=echo; echo "Testing serial console"; echo; echo "Successfully booted"; echo; poweroff'; @@ -187,6 +217,15 @@ setenv bootdelay 1; EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_nand -d bootmenu_nand bootmenu_nand.scr +# Generate bootmenu for UBI booting (zImage) +cat > bootmenu_ubi << EOF +setenv bootmenu_0 'zImage-2.6.28-omap1 from UBI=setenv bootargs; setenv setup_omap_atag 1; ubi part rootfs && ubi read \${kernaddr} kernel && bootz \${kernaddr}'; +setenv bootmenu_1; +setenv bootmenu_delay 1; +setenv bootdelay 1; +EOF +./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_ubi -d bootmenu_ubi bootmenu_ubi.scr + # Generate bootmenu for default booting cat > bootmenu_default << EOF setenv bootmenu_delay 1; @@ -195,9 +234,7 @@ EOF ./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu_default -d bootmenu_default bootmenu_default.scr # Generate combined image from u-boot and Maemo fiasco kernel -dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1 ./u-boot-gen-combined u-boot.bin zImage-2.6.28-omap1 combined_zimage.bin -./mkimage -A arm -O linux -T kernel -C none -a 80008000 -e 80008000 -n zImage-2.6.28-omap1 -d zImage-2.6.28-omap1 uImage-2.6.28-omap1 ./u-boot-gen-combined u-boot.bin uImage-2.6.28-omap1 combined_uimage.bin # Generate combined hack image from u-boot and Maemo fiasco kernel (kernel starts at 2MB offset and qflasher puts 2kB header before supplied image) @@ -226,6 +263,11 @@ truncate -s 50MiB emmc_nand.img mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_nand.img mcopy bootmenu_nand.scr ::/bootmenu.scr -i emmc_nand.img +# Generate FAT32 eMMC image for UBI booting (zImage) +truncate -s 50MiB emmc_ubi.img +mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_ubi.img +mcopy bootmenu_ubi.scr ::/bootmenu.scr -i emmc_ubi.img + # Generate FAT32 eMMC image for default booting truncate -s 50MiB emmc_default.img mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_default.img @@ -251,6 +293,10 @@ rm -f mtd_emmc.img rm -f mtd_nand.img ./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined_hack.bin -r ubi.img -m rx51 -p k=4094,i=2 -o mtd_nand.img +# Generate MTD image for UBI booting from bootloader nolo images, u-boot image with UBI/UBIFS support and rootfs image with kernel volume +rm -f mtd_ubi.img +./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k u-boot-ubifs.bin -r ubi_with_kernel.img -m rx51 -o mtd_ubi.img + echo echo "======================================================" echo "========== Running test images in n900 qemu ==========" @@ -329,6 +375,18 @@ wait -n $sleep_pid $qemu_pid || true kill -9 $tail_pid $sleep_pid $qemu_pid 2>/dev/null || true wait || true +# Run MTD image in qemu and wait for 300s if kernel from UBI is correctly booted +rm -f qemu_ubi.log +./qemu-system-arm -M n900 -mtdblock mtd_ubi.img -sd emmc_ubi.img -serial /dev/stdout -display none > qemu_ubi.log & +qemu_pid=$! +tail -F qemu_ubi.log & +tail_pid=$! +sleep 300 & +sleep_pid=$! +wait -n $sleep_pid $qemu_pid || true +kill -9 $tail_pid $sleep_pid $qemu_pid 2>/dev/null || true +wait || true + echo echo "=============================" echo "========== Results ==========" @@ -341,10 +399,11 @@ if grep -q 'Successfully booted' qemu_ram2.log; then echo "Kernel (zImage) was s if grep -q 'Successfully booted' qemu_emmc.log; then echo "Kernel (uImage) was successfully booted from eMMC"; else echo "Failed to boot kernel (uImage) from eMMC"; fi if grep -q 'Successfully booted' qemu_emmc2.log; then echo "Kernel (zImage) was successfully booted from eMMC"; else echo "Failed to boot kernel (zImage) from eMMC"; fi if grep -q 'Successfully booted' qemu_nand.log; then echo "Kernel (uImage) was successfully booted from OneNAND"; else echo "Failed to boot kernel (uImage) from OneNAND"; fi +if grep -q 'Successfully booted' qemu_ubi.log; then echo "Kernel (zImage) was successfully booted from UBI"; else echo "Failed to boot kernel (zImage) from UBI"; fi echo -if grep -q 'Successfully booted' qemu_uboot.log && grep -q 'Successfully booted' qemu_ram.log && grep -q 'Successfully booted' qemu_ram2.log && grep -q 'Successfully booted' qemu_emmc.log && grep -q 'Successfully booted' qemu_emmc2.log && grep -q 'Successfully booted' qemu_nand.log; then +if grep -q 'Successfully booted' qemu_uboot.log && grep -q 'Successfully booted' qemu_ram.log && grep -q 'Successfully booted' qemu_ram2.log && grep -q 'Successfully booted' qemu_emmc.log && grep -q 'Successfully booted' qemu_emmc2.log && grep -q 'Successfully booted' qemu_nand.log && grep -q 'Successfully booted' qemu_ubi.log; then echo "All tests passed" exit 0 else