From b979e35230042bfeadd5f4eddf66232f29e4bff4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 9 Nov 2017 11:50:13 +0100 Subject: [PATCH 01/31] ARM: imx6: Adjust DDR DRAM settings on DHCOM i.MX6 PDK The board uses T-topology for the four x16 DRAM chips, so remove the write-leveling from the SPL as that is only usefly on fly-by topology and can be harmful on T-topology. Also update the DRAM timing with values from calibration on multiple boards. Signed-off-by: Marek Vasut Cc: Stefano Babic --- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 40 +++++++++++------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index e22ff5c8c6..bb98f39f02 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -140,40 +140,39 @@ static const struct mx6sdl_iomux_grp_regs dhcom6sdl_grp_ioregs = { }; static const struct mx6_mmdc_calibration dhcom_mmdc_calib = { - .p0_mpwldectrl0 = 0x001F001F, - .p0_mpwldectrl1 = 0x001F001F, - .p1_mpwldectrl0 = 0x00440044, - .p1_mpwldectrl1 = 0x00440044, - .p0_mpdgctrl0 = 0x434B0350, - .p0_mpdgctrl1 = 0x034C0359, - .p1_mpdgctrl0 = 0x434B0350, - .p1_mpdgctrl1 = 0x03650348, - .p0_mprddlctl = 0x4436383B, - .p1_mprddlctl = 0x39393341, - .p0_mpwrdlctl = 0x35373933, - .p1_mpwrdlctl = 0x48254A36, + .p0_mpwldectrl0 = 0x0011000E, + .p0_mpwldectrl1 = 0x000E001B, + .p1_mpwldectrl0 = 0x00190015, + .p1_mpwldectrl1 = 0x00070018, + .p0_mpdgctrl0 = 0x42720306, + .p0_mpdgctrl1 = 0x026F0266, + .p1_mpdgctrl0 = 0x4273030A, + .p1_mpdgctrl1 = 0x02740240, + .p0_mprddlctl = 0x45393B3E, + .p1_mprddlctl = 0x403A3747, + .p0_mpwrdlctl = 0x40434541, + .p1_mpwrdlctl = 0x473E4A3B, }; static const struct mx6_ddr3_cfg dhcom_mem_ddr = { .mem_speed = 1600, - .density = 4, + .density = 2, .width = 64, .banks = 8, .rowaddr = 14, .coladdr = 10, .pagesz = 2, - .trcd = 1375, - .trcmin = 4875, - .trasmin = 3500, + .trcd = 1312, + .trcmin = 5863, + .trasmin = 3750, }; static const struct mx6_ddr_sysinfo dhcom_ddr_info = { /* width of data bus:0=16,1=32,2=64 */ .dsize = 2, - /* config for full 4GB range so that get_mem_size() works */ - .cs_density = 32, /* 32Gb per CS */ + .cs_density = 16, .ncs = 1, /* single chip select */ - .cs1_mirror = 0, + .cs1_mirror = 1, .rtt_wr = 1, /* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */ .rtt_nom = 1, /* DDR3_RTT_60_OHM, RTT_Nom = RZQ/4 */ .walat = 1, /* Write additional latency */ @@ -182,6 +181,8 @@ static const struct mx6_ddr_sysinfo dhcom_ddr_info = { .bi_on = 1, /* Bank interleaving enabled */ .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 3, /* 4 refresh commands per refresh cycle */ }; static void ccgr_init(void) @@ -388,7 +389,6 @@ void board_init_f(ulong dummy) /* Perform DDR DRAM calibration */ udelay(100); - mmdc_do_write_level_calibration(&dhcom_ddr_info); mmdc_do_dqs_calibration(&dhcom_ddr_info); /* Clear the BSS. */ From 9cc71cfa1117ea0f0c6d6df3f64bbd978461b79e Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:44 -0200 Subject: [PATCH 02/31] pico-imx6ul: Move dfu_alt_info to CONFIG_DFU_ENV_SETTINGS variable Create CONFIG_DFU_ENV_SETTINGS to set dfu environment settings to improve human readable code. Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador Reviewed-by: Lukasz Majewski --- include/configs/pico-imx6ul.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 75658fd489..d4b29e3950 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -47,6 +47,9 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 +#define CONFIG_DFU_ENV_SETTINGS \ + "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -60,7 +63,7 @@ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ - "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + CONFIG_DFU_ENV_SETTINGS \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ From 65551e389adb577121198449c6dbf2b95c5782ac Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:45 -0200 Subject: [PATCH 03/31] pico-imx6ul: Use PARTUUID to specify the rootfs location Currently the rootfs location is passed via mmcblk number and using the UUID method to specify the rootfs location is a better approach working even if mmcblk number for the eMMC changes depending on the kernel versions. Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador Reviewed-by: Fabio Estevam --- configs/pico-imx6ul_defconfig | 1 + include/configs/pico-imx6ul.h | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 09b36ccb09..e00f9f34a3 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -13,6 +13,7 @@ CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index d4b29e3950..c775c32690 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -61,14 +61,15 @@ "fdt_addr=0x83000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ CONFIG_DFU_ENV_SETTINGS \ + "finduuid=part uuid mmc 0:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ + "root=PARTUUID=${uuid} rootwait rw\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ "run mmcargs; " \ "if run loadfdt; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ @@ -147,6 +148,5 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 -#define CONFIG_MMCROOT "/dev/mmcblk0p2" #endif /* __PICO_IMX6UL_CONFIG_H */ From d93ab9b16678e25f4fb3b600900e37aa4780da8c Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:46 -0200 Subject: [PATCH 04/31] pico-imx6ul: Add boot and rootfs dfu_alt_info Change dfu_alt_info variable to use the following altsetting: uboot: To flash raw U-Boot /zImage: boot: To copy kernel image /imx6ul-pico-hobbit.dtb: To copy dtb file rootfs: To copy rootfs List the currently attached DFU capable USB devices running: sudo dfu-util -l Flash U-Boot: sudo dfu-util -D u-boot.imx -a uboot Copy boot files: sudo dfu-util -D zImage -a /zImage sudo dfu-util -D imx6ul-pico-hobbit.dtb -a /imx6ul-pico-hobbit.dtb Flash rootfs: sudo dfu-util -D rootfs.ext4 -a rootfs To copy boot files you need to have a formated mmc 0:1 partition. To format with ext4 filesystem you can use ums. Run on target: ums 0 mmc 0 and on host: sudo mkfs.ext4 /dev/sdx1 Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador --- include/configs/pico-imx6ul.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index c775c32690..6a19861da7 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -48,7 +48,11 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_ENV_SETTINGS \ - "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + "dfu_alt_info=uboot raw 0x2 0x400 mmcpart 1;" \ + "boot part 0 1;" \ + "/zImage ext4 0 1;" \ + "/imx6ul-pico-hobbit.dtb ext4 0 1;" \ + "rootfs part 0 2\0" \ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 From db430cd4799cb21c77bd58a4b9eb59cc33cc6bfc Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:47 -0200 Subject: [PATCH 05/31] pico-imx6ul: Define partition layout in the environment Create layout with a boot 16MiB partition and rootfs with remain space. Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador Reviewed-by: Fabio Estevam --- include/configs/pico-imx6ul.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 6a19861da7..1ea79b9c18 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -68,6 +68,9 @@ "mmcautodetect=yes\0" \ CONFIG_DFU_ENV_SETTINGS \ "finduuid=part uuid mmc 0:2 uuid\0" \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,size=16MiB;name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ From ebbdeb2a102c8f3578c56a63485b6d51a6b9af34 Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:48 -0200 Subject: [PATCH 06/31] pico-imx6ul: Add function to create gpt partitions Command run setup_emmc will create gpt partitions for mmc 0 device based on patitions variable. Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador --- configs/pico-imx6ul_defconfig | 1 + include/configs/pico-imx6ul.h | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index e00f9f34a3..f28f9b7a4e 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 1ea79b9c18..310fceb14b 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -71,6 +71,7 @@ "partitions=" \ "uuid_disk=${uuid_gpt_disk};" \ "name=boot,size=16MiB;name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ + "setup_emmc=gpt write mmc 0 $partitions; reset;\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ From 2566c4f698dffea6ea8e55dbb767cf6c0cd53fa2 Mon Sep 17 00:00:00 2001 From: Fabio Berton Date: Thu, 16 Nov 2017 09:59:49 -0200 Subject: [PATCH 07/31] pico-imx6ul: Use FS_GENERIC load command Signed-off-by: Fabio Berton Signed-off-by: Otavio Salvador --- include/configs/pico-imx6ul.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 310fceb14b..f821b67c72 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -74,8 +74,8 @@ "setup_emmc=gpt write mmc 0 $partitions; reset;\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=PARTUUID=${uuid} rootwait rw\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ From 401cabc287a26f71900153049ce54987bb184a4a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 19 Nov 2017 12:21:44 -0200 Subject: [PATCH 08/31] Revert "wandboard: Remove unnecessary delay" This reverts commit b8b9790e23a7d6eec08d66192853ecb61bcae095. Some wandboard variants no longer boot after this commit, so keep the original delay to avoid the boot regression. Reported-by: Varga Zsolt Tested-by: Varga Zsolt Signed-off-by: Fabio Estevam --- board/wandboard/spl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index d6f568bb92..5b9622e75e 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -399,6 +399,8 @@ static void spl_dram_init(void) mx6dq_dram_iocfg(64, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs); mx6_dram_cfg(&mem_q, &mx6q_2g_mmdc_calib, &h5t04g63afr); } + + udelay(100); } void board_init_f(ulong dummy) From 2feec4eafd40b4b121a0f7d7f602e25a39d9d403 Mon Sep 17 00:00:00 2001 From: Nandor Han Date: Wed, 8 Nov 2017 15:35:09 +0000 Subject: [PATCH 09/31] imx: mxc_i2c: tweak the i2c transfer method Tweak the i2c transfer to work for devices that want to read data without addressing a register. Signed-off-by: Nandor Han Signed-off-by: Martyn Welch Acked-by: Heiko Schocher Cc: Heiko Schocher Cc: Stefano Babic --- drivers/i2c/mxc_i2c.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index abf1da2ae3..205274e947 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -317,16 +317,19 @@ static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip, temp |= I2CR_MTX | I2CR_TX_NO_AK; writeb(temp, base + (I2CR << reg_shift)); - /* write slave address */ - ret = tx_byte(i2c_bus, chip << 1); - if (ret < 0) - return ret; - - while (alen--) { - ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff); + if (alen >= 0) { + /* write slave address */ + ret = tx_byte(i2c_bus, chip << 1); if (ret < 0) return ret; + + while (alen--) { + ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff); + if (ret < 0) + return ret; + } } + return 0; } @@ -537,9 +540,11 @@ static int bus_i2c_read(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, if (ret < 0) return ret; - temp = readb(base + (I2CR << reg_shift)); - temp |= I2CR_RSTA; - writeb(temp, base + (I2CR << reg_shift)); + if (alen >= 0) { + temp = readb(base + (I2CR << reg_shift)); + temp |= I2CR_RSTA; + writeb(temp, base + (I2CR << reg_shift)); + } ret = tx_byte(i2c_bus, (chip << 1) | 1); if (ret < 0) { From ecdfb4195b20eb2dcde3c4083170016c13c69e8b Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Wed, 8 Nov 2017 15:35:10 +0000 Subject: [PATCH 10/31] ext4: recover from filesystem corruption when reading Some fixes when reading EXT files and directory entries were identified after using e2fuzz to corrupt an EXT3 filesystem: - Stop reading directory entries if the offset becomes badly aligned. - Avoid overwriting memory by clamping the length used to zero the buffer in ext4fs_read_file. Also sanity check blocksize. Signed-off-by: Ian Ray Signed-off-by: Martyn Welch Reviewed-by: Stefano Babic --- fs/ext4/ext4_common.c | 10 ++++++++++ fs/ext4/ext4fs.c | 10 +++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 31952f48b9..dac9545365 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -660,6 +660,11 @@ static int search_dir(struct ext2_inode *parent_inode, char *dirname) offset = 0; do { + if (offset & 3) { + printf("Badly aligned ext2_dirent\n"); + break; + } + dir = (struct ext2_dirent *)(block_buffer + offset); direntname = (char*)(dir) + sizeof(struct ext2_dirent); @@ -880,6 +885,11 @@ static int unlink_filename(char *filename, unsigned int blknr) offset = 0; do { + if (offset & 3) { + printf("Badly aligned ext2_dirent\n"); + break; + } + previous_dir = dir; dir = (struct ext2_dirent *)(block_buffer + offset); direntname = (char *)(dir) + sizeof(struct ext2_dirent); diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index b0c7303aa4..9ee2caf2fa 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -64,6 +64,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, char *delayed_buf = NULL; short status; + if (blocksize <= 0) + return -1; + /* Adjust len so it we can't read past the end of the file. */ if (len + pos > filesize) len = (filesize - pos); @@ -127,6 +130,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, (blockend >> log2blksz); } } else { + int n; if (previous_block_number != -1) { /* spill */ status = ext4fs_devread(delayed_start, @@ -137,7 +141,11 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, return -1; previous_block_number = -1; } - memset(buf, 0, blocksize - skipfirst); + /* Zero no more than `len' bytes. */ + n = blocksize - skipfirst; + if (n > len) + n = len; + memset(buf, 0, n); } buf += blocksize - skipfirst; } From 065a1ece7a4dadc525e9fb587c5c0c57c288e249 Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Wed, 8 Nov 2017 15:35:11 +0000 Subject: [PATCH 11/31] pwm: imx: Enable PWM support on i.MX53 Add missing parts for i.MX53 PWM support Acked-by: Nandor Han Signed-off-by: Martyn Welch Cc: Stefano Babic Acked-by: Stefano Babic --- arch/arm/include/asm/arch-mx5/imx-regs.h | 17 +++++++++++++++++ drivers/pwm/pwm-imx-util.c | 2 ++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 3e79fa3224..2b0dc1e733 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -508,6 +508,23 @@ struct fuse_bank4_regs { }; #endif +#define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define PWMCR_DOZEEN (1 << 24) +#define PWMCR_WAITEN (1 << 23) +#define PWMCR_DBGEN (1 << 22) +#define PWMCR_CLKSRC_IPG_HIGH (2 << 16) +#define PWMCR_CLKSRC_IPG (1 << 16) +#define PWMCR_EN (1 << 0) + +struct pwm_regs { + u32 cr; + u32 sr; + u32 ir; + u32 sar; + u32 pr; + u32 cnr; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */ diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c index 534dd8eece..97ac0c8fc0 100644 --- a/drivers/pwm/pwm-imx-util.c +++ b/drivers/pwm/pwm-imx-util.c @@ -23,10 +23,12 @@ struct pwm_regs *pwm_id_to_reg(int pwm_id) return (struct pwm_regs *)PWM1_BASE_ADDR; case 1: return (struct pwm_regs *)PWM2_BASE_ADDR; +#ifdef CONFIG_MX6 case 2: return (struct pwm_regs *)PWM3_BASE_ADDR; case 3: return (struct pwm_regs *)PWM4_BASE_ADDR; +#endif #ifdef CONFIG_MX6SX case 4: return (struct pwm_regs *)PWM5_BASE_ADDR; From 54d8d4942f8f1095d56d14162c1568f5a7ba1660 Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Wed, 8 Nov 2017 15:35:12 +0000 Subject: [PATCH 12/31] arm: mx5: Add more register definitions Add register definitions require for video configuration. Signed-off-by: Nandor Han Signed-off-by: Martyn Welch Reviewed-by: Stefano Babic Cc: Stefano Babic Reviewed-by: Stefano Babic --- arch/arm/include/asm/arch-mx5/crm_regs.h | 8 ++++++ arch/arm/include/asm/arch-mx5/imx-regs.h | 33 ++++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index b61c7b970a..7fea569176 100644 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h @@ -210,6 +210,14 @@ struct mxc_ccm_reg { #define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1) #define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL 0x1 +/* Define the bits in register CSCMR2 */ +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_OFFSET 26 +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK (0x7 << 26) +#define MXC_CCM_CSCMR2_DI0_CLK_SEL(v) (((v) & 0x7) << 26) +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_RD(r) (((r) >> 26) & 0x7) + +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK 5 + /* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET 25 #define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25) diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 2b0dc1e733..61c8d440f8 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -416,6 +416,39 @@ struct iomuxc { }; #endif +#define IOMUXC_GPR2_BITMAP_SPWG 0 +#define IOMUXC_GPR2_BITMAP_JEIDA 1 + +#define IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET 6 +#define IOMUXC_GPR2_BIT_MAPPING_CH0_MASK (1 << IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) +#define IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA (IOMUXC_GPR2_BITMAP_JEIDA << \ + IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) +#define IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG (IOMUXC_GPR2_BITMAP_SPWG << \ + IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) + +#define IOMUXC_GPR2_DATA_WIDTH_18 0 +#define IOMUXC_GPR2_DATA_WIDTH_24 1 + +#define IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET 5 +#define IOMUXC_GPR2_DATA_WIDTH_CH0_MASK (1 << IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) +#define IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT (IOMUXC_GPR2_DATA_WIDTH_18 << \ + IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) +#define IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT (IOMUXC_GPR2_DATA_WIDTH_24 << \ + IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) + +#define IOMUXC_GPR2_MODE_DISABLED 0 +#define IOMUXC_GPR2_MODE_ENABLED_DI0 1 +#define IOMUXC_GPR2_MODE_ENABLED_DI1 3 + +#define IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET 0 +#define IOMUXC_GPR2_LVDS_CH0_MODE_MASK (3 << IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED (IOMUXC_GPR2_MODE_DISABLED << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (IOMUXC_GPR2_MODE_ENABLED_DI0 << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI1 (IOMUXC_GPR2_MODE_ENABLED_DI1 << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) + /* System Reset Controller (SRC) */ struct src { u32 scr; From f31dac4e6e71c7c818151cd917d872909119fb99 Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Wed, 8 Nov 2017 15:35:13 +0000 Subject: [PATCH 13/31] bootcount: add support for bootcounter on EXT filesystem Add support for bootcounter on an EXT filesystem. Sync configuration whitelist. Signed-off-by: Ian Ray Signed-off-by: Martyn Welch --- README | 7 ++++ drivers/Kconfig | 2 + drivers/bootcount/Kconfig | 58 +++++++++++++++++++++++++++++ drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount_ext.c | 62 +++++++++++++++++++++++++++++++ 5 files changed, 130 insertions(+) create mode 100644 drivers/bootcount/Kconfig create mode 100644 drivers/bootcount/bootcount_ext.c diff --git a/README b/README index f288176228..6336c5c488 100644 --- a/README +++ b/README @@ -2362,6 +2362,13 @@ The following options need to be configured: CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for the bootcounter. CONFIG_BOOTCOUNT_ALEN = address len + CONFIG_BOOTCOUNT_EXT + enable support for the bootcounter in EXT filesystem + CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read + and write. + CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part + CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename - Show boot progress: CONFIG_SHOW_BOOT_PROGRESS diff --git a/drivers/Kconfig b/drivers/Kconfig index 613e60235d..c2e813f5ad 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -10,6 +10,8 @@ source "drivers/ata/Kconfig" source "drivers/block/Kconfig" +source "drivers/bootcount/Kconfig" + source "drivers/clk/Kconfig" source "drivers/cpu/Kconfig" diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig new file mode 100644 index 0000000000..c9d627cce2 --- /dev/null +++ b/drivers/bootcount/Kconfig @@ -0,0 +1,58 @@ +# +# Boot count configuration +# + +menu "Boot count support" + +config BOOTCOUNT + bool "Enable Boot count support" + help + Enable boot count support, which provides the ability to store the + number of times the board has booted on a number of different + persistent storage mediums. + +if BOOTCOUNT + +config BOOTCOUNT_EXT + bool "Boot counter on EXT filesystem" + help + Add support for maintaining boot count in a file on an EXT + filesystem. + +if BOOTCOUNT_EXT + +config SYS_BOOTCOUNT_EXT_INTERFACE + string "Interface on which to find boot counter EXT filesystem" + default "mmc" + depends on BOOTCOUNT_EXT + help + Set the interface to use when locating the filesystem to use for the + boot counter. + +config SYS_BOOTCOUNT_EXT_DEVPART + string "Partition of the boot counter EXT filesystem" + default "0:1" + depends on BOOTCOUNT_EXT + help + Set the partition to use when locating the filesystem to use for the + boot counter. + +config SYS_BOOTCOUNT_EXT_NAME + string "Path and filename of the EXT filesystem based boot counter" + default "/boot/failures" + depends on BOOTCOUNT_EXT + help + Set the filename and path of the file used to store the boot counter. + +config SYS_BOOTCOUNT_ADDR + hex "RAM address used for reading and writing the boot counter" + default 0x7000A000 + depends on BOOTCOUNT_EXT + help + Set the address used for reading and writing the boot counter. + +endif + +endif + +endmenu diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index ed9659ad97..45445d24bf 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o obj-$(CONFIG_BOOTCOUNT_I2C) += bootcount_i2c.o +obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o diff --git a/drivers/bootcount/bootcount_ext.c b/drivers/bootcount/bootcount_ext.c new file mode 100644 index 0000000000..e0dd21ba6a --- /dev/null +++ b/drivers/bootcount/bootcount_ext.c @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2017 General Electric Company. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +#define BC_MAGIC 0xbc + +void bootcount_store(ulong a) +{ + u8 *buf; + loff_t len; + int ret; + + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + puts("Error selecting device\n"); + return; + } + + buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2); + buf[0] = BC_MAGIC; + buf[1] = (a & 0xff); + unmap_sysmem(buf); + + ret = fs_write(CONFIG_SYS_BOOTCOUNT_EXT_NAME, + CONFIG_SYS_BOOTCOUNT_ADDR, 0, 2, &len); + if (ret != 0) + puts("Error storing bootcount\n"); +} + +ulong bootcount_load(void) +{ + u8 *buf; + loff_t len_read; + int ret; + + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + puts("Error selecting device\n"); + return 0; + } + + ret = fs_read(CONFIG_SYS_BOOTCOUNT_EXT_NAME, CONFIG_SYS_BOOTCOUNT_ADDR, + 0, 2, &len_read); + if (ret != 0 || len_read != 2) { + puts("Error loading bootcount\n"); + return 0; + } + + buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2); + if (buf[0] == BC_MAGIC) + ret = buf[1]; + + unmap_sysmem(buf); + + return ret; +} From da5337a61cd41f3bfbaee5b78ba58676bd288073 Mon Sep 17 00:00:00 2001 From: Nandor Han Date: Wed, 8 Nov 2017 15:35:14 +0000 Subject: [PATCH 14/31] rtc: add support for s35392a Add support for S35392A RTC. The driver supports both U-Boot driver models. Signed-off-by: Nandor Han Signed-off-by: Martyn Welch Cc: Heiko Schocher --- drivers/rtc/Kconfig | 6 + drivers/rtc/Makefile | 1 + drivers/rtc/s35392a.c | 365 ++++++++++++++++++++++++++++++++++++++++++ lib/Kconfig | 3 + 4 files changed, 375 insertions(+) create mode 100644 drivers/rtc/s35392a.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index d06130c7a2..2964bb2211 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -30,4 +30,10 @@ config RTC_DS1307 Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and compatible Real Time Clock devices. +config RTC_S35392A + bool "Enable S35392A driver" + select BITREVERSE + help + Enable s35392a driver which provides rtc get and set function. + endmenu diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 003e31aeba..7a8f97a05f 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -49,5 +49,6 @@ obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o obj-$(CONFIG_RTC_RV3029) += rv3029.o obj-$(CONFIG_RTC_RX8025) += rx8025.o obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o +obj-$(CONFIG_RTC_S35392A) += s35392a.o obj-$(CONFIG_SANDBOX) += sandbox_rtc.o obj-$(CONFIG_RTC_X1205) += x1205.o diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c new file mode 100644 index 0000000000..9adcefc98d --- /dev/null +++ b/drivers/rtc/s35392a.c @@ -0,0 +1,365 @@ +/* + * SII Semiconductor Corporation S35392A RTC driver. + * + * Copyright (c) 2017, General Electric Company + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include +#include +#include +#include + +#define S35390A_CMD_STATUS1 0x30 +#define S35390A_CMD_STATUS2 0x31 +#define S35390A_CMD_TIME1 0x32 +#define S35390A_CMD_TIME2 0x33 +#define S35390A_CMD_INT2_REG1 0x35 + +#define S35390A_BYTE_YEAR 0 +#define S35390A_BYTE_MONTH 1 +#define S35390A_BYTE_DAY 2 +#define S35390A_BYTE_WDAY 3 +#define S35390A_BYTE_HOURS 4 +#define S35390A_BYTE_MINS 5 +#define S35390A_BYTE_SECS 6 + +/* flags for STATUS1 */ +#define S35390A_FLAG_POC 0x01 +#define S35390A_FLAG_BLD 0x02 +#define S35390A_FLAG_INT2 0x04 +#define S35390A_FLAG_24H 0x40 +#define S35390A_FLAG_RESET 0x80 + +/* + * If either BLD or POC is set, then the chip has lost power long enough for + * the time value to become invalid. + */ +#define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD) + +/*---------------------------------------------------------------------*/ +#undef DEBUG_RTC + +#ifdef DEBUG_RTC +#define DEBUGR(fmt, args...) printf(fmt, ##args) +#else +#define DEBUGR(fmt, args...) +#endif +/*---------------------------------------------------------------------*/ + +#ifdef CONFIG_DM_RTC +#define DEV_TYPE struct udevice +#else +/* Local udevice */ +struct ludevice { + u8 chip; +}; + +#define DEV_TYPE struct ludevice +struct ludevice dev; + +#endif + +#define msleep(a) udelay(a * 1000) + +int lowvoltage; + +static int s35392a_rtc_reset(DEV_TYPE *dev); + +static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len) +{ + int ret; + +#ifdef CONFIG_DM_RTC + /* TODO: we need to tweak the chip address to reg */ + ret = dm_i2c_read(dev, 0, buf, len); +#else + (void)dev; + ret = i2c_read(reg, 0, -1, buf, len); +#endif + + return ret; +} + +static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len) +{ + int ret; + +#ifdef CONFIG_DM_RTC + /* TODO: we need to tweak the chip address to reg */ + ret = dm_i2c_write(dev, 0, buf, 1); +#else + (void)dev; + ret = i2c_write(reg, 0, 0, buf, len); +#endif + + return ret; +} + +static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg) +{ + u8 val; + int ret; + + ret = s35392a_rtc_read(dev, reg, &val, sizeof(val)); + return ret < 0 ? ret : val; +} + +static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val) +{ + int ret; + u8 lval = val; + + ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval)); + return ret < 0 ? ret : 0; +} + +static int validate_time(const struct rtc_time *tm) +{ + if ((tm->tm_year < 2000) || (tm->tm_year > 2099)) + return -EINVAL; + + if ((tm->tm_mon < 1) || (tm->tm_mon > 12)) + return -EINVAL; + + if ((tm->tm_mday < 1) || (tm->tm_mday > 31)) + return -EINVAL; + + if ((tm->tm_wday < 0) || (tm->tm_wday > 6)) + return -EINVAL; + + if ((tm->tm_hour < 0) || (tm->tm_hour > 23)) + return -EINVAL; + + if ((tm->tm_min < 0) || (tm->tm_min > 59)) + return -EINVAL; + + if ((tm->tm_sec < 0) || (tm->tm_sec > 59)) + return -EINVAL; + + return 0; +} + +void s35392a_rtc_init(DEV_TYPE *dev) +{ + int status; + + status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (status < 0) + goto error; + + DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status); + + lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0; + + if (status & S35390A_FLAG_POC) + /* + * Do not communicate for 0.5 seconds since the power-on + * detection circuit is in operation. + */ + msleep(500); + + else if (!lowvoltage) + /* + * If both POC and BLD are unset everything is fine. + */ + return; + + if (lowvoltage) + printf("RTC low voltage detected\n"); + + if (!s35392a_rtc_reset(dev)) + return; + +error: + printf("Error RTC init.\n"); +} + +/* Get the current time from the RTC */ +static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm) +{ + u8 date[7]; + int ret, i; + + if (lowvoltage) { + DEBUGR("RTC low voltage detected\n"); + return -EINVAL; + } + + ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date)); + if (ret < 0) { + DEBUGR("Error reading date from RTC\n"); + return -EIO; + } + + /* This chip returns the bits of each byte in reverse order */ + for (i = 0; i < 7; ++i) + date[i] = bitrev8(date[i]); + + tm->tm_sec = bcd2bin(date[S35390A_BYTE_SECS]); + tm->tm_min = bcd2bin(date[S35390A_BYTE_MINS]); + tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H); + tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]); + tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]); + tm->tm_mon = bcd2bin(date[S35390A_BYTE_MONTH]); + tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000; + + DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + return 0; +} + +/* Set the RTC */ +static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm) +{ + int i, ret; + int status; + u8 date[7]; + + DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + ret = validate_time(tm); + if (ret < 0) + return -EINVAL; + + /* We support only 24h mode */ + ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (ret < 0) + return -EIO; + status = ret; + + ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, + status | S35390A_FLAG_24H); + if (ret < 0) + return -EIO; + + date[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 2000); + date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon); + date[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); + date[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); + date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour); + date[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); + date[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); + + /* This chip expects the bits of each byte to be in reverse order */ + for (i = 0; i < 7; ++i) + date[i] = bitrev8(date[i]); + + ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date)); + if (ret < 0) { + DEBUGR("Error writing date to RTC\n"); + return -EIO; + } + + /* Now we have time. Reset the low voltage status */ + lowvoltage = 0; + + return 0; +} + +/* Reset the RTC. */ +static int s35392a_rtc_reset(DEV_TYPE *dev) +{ + int buf; + int ret; + unsigned int initcount = 0; + + buf = S35390A_FLAG_RESET; + +initialize: + ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf); + if (ret < 0) + return -EIO; + + ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (ret < 0) + return -EIO; + buf = ret; + + if (!lowvoltage) + lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0; + + if (buf & S35390A_LOW_VOLTAGE) { + /* Try up to five times to reset the chip */ + if (initcount < 5) { + ++initcount; + goto initialize; + } else { + return -EIO; + } + } + + return 0; +} + +#ifndef CONFIG_DM_RTC + +int rtc_get(struct rtc_time *tm) +{ + return s35392a_rtc_get(&dev, tm); +} + +int rtc_set(struct rtc_time *tm) +{ + return s35392a_rtc_set(&dev, tm); +} + +void rtc_reset(void) +{ + s35392a_rtc_reset(&dev); +} + +void rtc_init(void) +{ + s35392a_rtc_init(&dev); +} + +#else + +static int s35392a_probe(struct udevice *dev) +{ + s35392a_rtc_init(dev); + return 0; +} + +static const struct rtc_ops s35392a_rtc_ops = { + .get = s35392a_rtc_get, + .set = s35392a_rtc_set, + .read8 = s35392a_rtc_read8, + .write8 = s35392a_rtc_write8, + .reset = s35392a_rtc_reset, +}; + +static const struct udevice_id s35392a_rtc_ids[] = { + { .compatible = "sii,s35392a-rtc" }, + { } +}; + +U_BOOT_DRIVER(s35392a_rtc) = { + .name = "s35392a_rtc", + .id = UCLASS_RTC, + .probe = s35392a_probe, + .of_match = s35392a_rtc_ids, + .ops = &s35392a_rtc_ops, +}; + +#endif diff --git a/lib/Kconfig b/lib/Kconfig index 18663badb2..f447c53bde 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -80,6 +80,9 @@ config TPL_TINY_MEMSET config RBTREE bool +config BITREVERSE + bool "Bit reverse library from Linux" + source lib/dhry/Kconfig menu "Security support" From b418dfe16e62ffb6062e2acc5471821c011bc9cd Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Wed, 8 Nov 2017 15:35:15 +0000 Subject: [PATCH 15/31] board: ge: make VPD code common The VPD data is used on a number of GE products. Move the parsing code to a common location so that we can share this code. Signed-off-by: Martyn Welch Acked-by: Stefano Babic --- board/ge/bx50v3/Makefile | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/bx50v3/vpd_reader.c | 228 ----------------------- board/ge/common/Makefile | 7 + board/ge/common/vpd_reader.c | 197 ++++++++++++++++++++ board/ge/{bx50v3 => common}/vpd_reader.h | 14 +- 6 files changed, 209 insertions(+), 241 deletions(-) delete mode 100644 board/ge/bx50v3/vpd_reader.c create mode 100644 board/ge/common/Makefile create mode 100644 board/ge/common/vpd_reader.c rename board/ge/{bx50v3 => common}/vpd_reader.h (58%) diff --git a/board/ge/bx50v3/Makefile b/board/ge/bx50v3/Makefile index 2fff27bc77..bcd149f5b0 100644 --- a/board/ge/bx50v3/Makefile +++ b/board/ge/bx50v3/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := bx50v3.o vpd_reader.o +obj-y := bx50v3.o diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 2e8f394eaf..37de990176 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -28,7 +28,7 @@ #include #include #include -#include "vpd_reader.h" +#include "../common/vpd_reader.h" DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_I2C_EEPROM_ADDR diff --git a/board/ge/bx50v3/vpd_reader.c b/board/ge/bx50v3/vpd_reader.c deleted file mode 100644 index 98da893d2c..0000000000 --- a/board/ge/bx50v3/vpd_reader.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright 2016 General Electric Company - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include "vpd_reader.h" - -#include -#include - - -/* BCH configuration */ - -const struct { - int header_ecc_capability_bits; - int data_ecc_capability_bits; - unsigned int prim_poly; - struct { - int min; - int max; - } galois_field_order; -} bch_configuration = { - .header_ecc_capability_bits = 4, - .data_ecc_capability_bits = 16, - .prim_poly = 0, - .galois_field_order = { - .min = 5, - .max = 15, - }, -}; - -static int calculate_galois_field_order(size_t source_length) -{ - int gfo = bch_configuration.galois_field_order.min; - - for (; gfo < bch_configuration.galois_field_order.max && - ((((1 << gfo) - 1) - ((int)source_length * 8)) < 0); - gfo++) { - } - - if (gfo == bch_configuration.galois_field_order.max) { - return -1; - } - - return gfo + 1; -} - -static int verify_bch(int ecc_bits, unsigned int prim_poly, - uint8_t * data, size_t data_length, - const uint8_t * ecc, size_t ecc_length) -{ - int gfo = calculate_galois_field_order(data_length); - if (gfo < 0) { - return -1; - } - - struct bch_control * bch = init_bch(gfo, ecc_bits, prim_poly); - if (!bch) { - return -1; - } - - if (bch->ecc_bytes != ecc_length) { - free_bch(bch); - return -1; - } - - unsigned * errloc = (unsigned *)calloc(data_length, sizeof(unsigned)); - int errors = decode_bch( - bch, data, data_length, ecc, NULL, NULL, errloc); - free_bch(bch); - if (errors < 0) { - free(errloc); - return -1; - } - - if (errors > 0) { - for (int n = 0; n < errors; n++) { - if (errloc[n] >= 8 * data_length) { - /* n-th error located in ecc (no need for data correction) */ - } else { - /* n-th error located in data */ - data[errloc[n] / 8] ^= 1 << (errloc[n] % 8); - } - } - } - - free(errloc); - return 0; -} - - -static const int ID = 0; -static const int LEN = 1; -static const int VER = 2; -static const int TYP = 3; -static const int BLOCK_SIZE = 4; - -static const uint8_t HEADER_BLOCK_ID = 0x00; -static const uint8_t HEADER_BLOCK_LEN = 18; -static const uint32_t HEADER_BLOCK_MAGIC = 0xca53ca53; -static const size_t HEADER_BLOCK_VERIFY_LEN = 14; -static const size_t HEADER_BLOCK_ECC_OFF = 14; -static const size_t HEADER_BLOCK_ECC_LEN = 4; - -static const uint8_t ECC_BLOCK_ID = 0xFF; - -int vpd_reader( - size_t size, - uint8_t * data, - void * userdata, - int (*fn)( - void * userdata, - uint8_t id, - uint8_t version, - uint8_t type, - size_t size, - uint8_t const * data)) -{ - if ( size < HEADER_BLOCK_LEN - || data == NULL - || fn == NULL) { - return -EINVAL; - } - - /* - * +--------------------+--------------------+--//--+--------------------+ - * | header block | data block | ... | ecc block | - * +--------------------+--------------------+--//--+--------------------+ - * : : : - * +------+-------+-----+ +------+-------------+ - * | id | magic | ecc | | ... | ecc | - * | len | off | | +------+-------------+ - * | ver | size | | : - * | type | | | : - * +------+-------+-----+ : - * : : : : - * <----- [1] ----> <----------- [2] -----------> - * - * Repair (if necessary) the contents of header block [1] by using a - * 4 byte ECC located at the end of the header block. A successful - * return value means that we can trust the header. - */ - int ret = verify_bch( - bch_configuration.header_ecc_capability_bits, - bch_configuration.prim_poly, - data, - HEADER_BLOCK_VERIFY_LEN, - &data[HEADER_BLOCK_ECC_OFF], - HEADER_BLOCK_ECC_LEN); - if (ret < 0) { - return ret; - } - - /* Validate header block { id, length, version, type }. */ - if ( data[ID] != HEADER_BLOCK_ID - || data[LEN] != HEADER_BLOCK_LEN - || data[VER] != 0 - || data[TYP] != 0 - || ntohl(*(uint32_t *)(&data[4])) != HEADER_BLOCK_MAGIC) { - return -EINVAL; - } - - uint32_t offset = ntohl(*(uint32_t *)(&data[8])); - uint16_t size_bits = ntohs(*(uint16_t *)(&data[12])); - - /* Check that ECC header fits. */ - if (offset + 3 >= size) { - return -EINVAL; - } - - /* Validate ECC block. */ - uint8_t * ecc = &data[offset]; - if ( ecc[ID] != ECC_BLOCK_ID - || ecc[LEN] < BLOCK_SIZE - || ecc[LEN] + offset > size - || ecc[LEN] - BLOCK_SIZE != size_bits / 8 - || ecc[VER] != 1 - || ecc[TYP] != 1) { - return -EINVAL; - } - - /* - * Use the header block to locate the ECC block and verify the data - * blocks [2] against the ecc block ECC. - */ - ret = verify_bch( - bch_configuration.data_ecc_capability_bits, - bch_configuration.prim_poly, - &data[data[LEN]], - offset - data[LEN], - &data[offset + BLOCK_SIZE], - ecc[LEN] - BLOCK_SIZE); - if (ret < 0) { - return ret; - } - - /* Stop after ECC. Ignore possible zero padding. */ - size = offset; - - for (;;) { - /* Move to next block. */ - size -= data[LEN]; - data += data[LEN]; - - if (size == 0) { - /* Finished iterating through blocks. */ - return 0; - } - - if ( size < BLOCK_SIZE - || data[LEN] < BLOCK_SIZE) { - /* Not enough data for a header, or short header. */ - return -EINVAL; - } - - ret = fn( - userdata, - data[ID], - data[VER], - data[TYP], - data[LEN] - BLOCK_SIZE, - &data[BLOCK_SIZE]); - if (ret) { - return ret; - } - } -} diff --git a/board/ge/common/Makefile b/board/ge/common/Makefile new file mode 100644 index 0000000000..93e6c0182b --- /dev/null +++ b/board/ge/common/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2017 General Electric Company +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := vpd_reader.o diff --git a/board/ge/common/vpd_reader.c b/board/ge/common/vpd_reader.c new file mode 100644 index 0000000000..7367427993 --- /dev/null +++ b/board/ge/common/vpd_reader.c @@ -0,0 +1,197 @@ +/* + * Copyright 2016 General Electric Company + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "vpd_reader.h" + +#include +#include + +/* BCH configuration */ + +const struct { + int header_ecc_capability_bits; + int data_ecc_capability_bits; + unsigned int prim_poly; + struct { + int min; + int max; + } galois_field_order; +} bch_configuration = { + .header_ecc_capability_bits = 4, + .data_ecc_capability_bits = 16, + .prim_poly = 0, + .galois_field_order = { + .min = 5, + .max = 15, + }, +}; + +static int calculate_galois_field_order(size_t source_length) +{ + int gfo = bch_configuration.galois_field_order.min; + + for (; gfo < bch_configuration.galois_field_order.max && + ((((1 << gfo) - 1) - ((int)source_length * 8)) < 0); + gfo++) { + } + + if (gfo == bch_configuration.galois_field_order.max) + return -1; + + return gfo + 1; +} + +static int verify_bch(int ecc_bits, unsigned int prim_poly, u8 *data, + size_t data_length, const u8 *ecc, size_t ecc_length) +{ + int gfo = calculate_galois_field_order(data_length); + + if (gfo < 0) + return -1; + + struct bch_control *bch = init_bch(gfo, ecc_bits, prim_poly); + + if (!bch) + return -1; + + if (bch->ecc_bytes != ecc_length) { + free_bch(bch); + return -1; + } + + unsigned int *errloc = (unsigned int *)calloc(data_length, + sizeof(unsigned int)); + int errors = decode_bch(bch, data, data_length, ecc, NULL, NULL, + errloc); + + free_bch(bch); + if (errors < 0) { + free(errloc); + return -1; + } + + if (errors > 0) { + for (int n = 0; n < errors; n++) { + if (errloc[n] >= 8 * data_length) { + /* + * n-th error located in ecc (no need for data + * correction) + */ + } else { + /* n-th error located in data */ + data[errloc[n] / 8] ^= 1 << (errloc[n] % 8); + } + } + } + + free(errloc); + return 0; +} + +static const int ID; +static const int LEN = 1; +static const int VER = 2; +static const int TYP = 3; +static const int BLOCK_SIZE = 4; + +static const u8 HEADER_BLOCK_ID; +static const u8 HEADER_BLOCK_LEN = 18; +static const u32 HEADER_BLOCK_MAGIC = 0xca53ca53; +static const size_t HEADER_BLOCK_VERIFY_LEN = 14; +static const size_t HEADER_BLOCK_ECC_OFF = 14; +static const size_t HEADER_BLOCK_ECC_LEN = 4; + +static const u8 ECC_BLOCK_ID = 0xFF; + +int vpd_reader(size_t size, u8 *data, void *userdata, + int (*fn)(void *userdata, u8 id, u8 version, u8 type, + size_t size, u8 const *data)) +{ + if (size < HEADER_BLOCK_LEN || !data || !fn) + return -EINVAL; + + /* + * +--------------------+----------------+--//--+--------------------+ + * | header block | data block | ... | ecc block | + * +--------------------+----------------+--//--+--------------------+ + * : : : + * +------+-------+-----+ +------+-------------+ + * | id | magic | ecc | | ... | ecc | + * | len | off | | +------+-------------+ + * | ver | size | | : + * | type | | | : + * +------+-------+-----+ : + * : : : : + * <----- [1] ----> <--------- [2] ---------> + * + * Repair (if necessary) the contents of header block [1] by using a + * 4 byte ECC located at the end of the header block. A successful + * return value means that we can trust the header. + */ + int ret = verify_bch(bch_configuration.header_ecc_capability_bits, + bch_configuration.prim_poly, data, + HEADER_BLOCK_VERIFY_LEN, + &data[HEADER_BLOCK_ECC_OFF], HEADER_BLOCK_ECC_LEN); + if (ret < 0) + return ret; + + /* Validate header block { id, length, version, type }. */ + if (data[ID] != HEADER_BLOCK_ID || data[LEN] != HEADER_BLOCK_LEN || + data[VER] != 0 || data[TYP] != 0 || + ntohl(*(u32 *)(&data[4])) != HEADER_BLOCK_MAGIC) + return -EINVAL; + + u32 offset = ntohl(*(u32 *)(&data[8])); + u16 size_bits = ntohs(*(u16 *)(&data[12])); + + /* Check that ECC header fits. */ + if (offset + 3 >= size) + return -EINVAL; + + /* Validate ECC block. */ + u8 *ecc = &data[offset]; + + if (ecc[ID] != ECC_BLOCK_ID || ecc[LEN] < BLOCK_SIZE || + ecc[LEN] + offset > size || + ecc[LEN] - BLOCK_SIZE != size_bits / 8 || ecc[VER] != 1 || + ecc[TYP] != 1) + return -EINVAL; + + /* + * Use the header block to locate the ECC block and verify the data + * blocks [2] against the ecc block ECC. + */ + ret = verify_bch(bch_configuration.data_ecc_capability_bits, + bch_configuration.prim_poly, &data[data[LEN]], + offset - data[LEN], &data[offset + BLOCK_SIZE], + ecc[LEN] - BLOCK_SIZE); + if (ret < 0) + return ret; + + /* Stop after ECC. Ignore possible zero padding. */ + size = offset; + + for (;;) { + /* Move to next block. */ + size -= data[LEN]; + data += data[LEN]; + + if (size == 0) { + /* Finished iterating through blocks. */ + return 0; + } + + if (size < BLOCK_SIZE || data[LEN] < BLOCK_SIZE) { + /* Not enough data for a header, or short header. */ + return -EINVAL; + } + + ret = fn(userdata, data[ID], data[VER], data[TYP], + data[LEN] - BLOCK_SIZE, &data[BLOCK_SIZE]); + if (ret) + return ret; + } +} diff --git a/board/ge/bx50v3/vpd_reader.h b/board/ge/common/vpd_reader.h similarity index 58% rename from board/ge/bx50v3/vpd_reader.h rename to board/ge/common/vpd_reader.h index efa172a915..4abba8f5de 100644 --- a/board/ge/bx50v3/vpd_reader.h +++ b/board/ge/common/vpd_reader.h @@ -12,14 +12,6 @@ * * Returns Non-zero on error. Negative numbers encode errno. */ -int vpd_reader( - size_t size, - uint8_t * data, - void * userdata, - int (*fn)( - void * userdata, - uint8_t id, - uint8_t version, - uint8_t type, - size_t size, - uint8_t const * data)); +int vpd_reader(size_t size, u8 *data, void *userdata, + int (*fn)(void *userdata, u8 id, u8 version, u8 type, + size_t size, u8 const *data)); From 6b0071c11088471d0ba9716fcb14207f46dc2c21 Mon Sep 17 00:00:00 2001 From: Peter Senna Tschudin Date: Mon, 6 Nov 2017 19:14:11 +0000 Subject: [PATCH 16/31] mx53: Add Board support for GE PPD Create board support for GE PPD, based on mx53loco. Use mx53ppd_defconfig make target to configure for this board. Signed-off-by: Peter Senna Tschudin Signed-off-by: Ian Ray Signed-off-by: Nandor Han Signed-off-by: Martyn Welch Cc: Stefano Babic Acked-by: Stefano Babic --- arch/arm/mach-imx/mx5/Kconfig | 7 + board/ge/mx53ppd/Kconfig | 17 ++ board/ge/mx53ppd/MAINTAINERS | 7 + board/ge/mx53ppd/Makefile | 12 + board/ge/mx53ppd/imximage.cfg | 87 ++++++ board/ge/mx53ppd/mx53ppd.c | 457 +++++++++++++++++++++++++++++++ board/ge/mx53ppd/mx53ppd_video.c | 135 +++++++++ board/ge/mx53ppd/ppd_gpio.h | 96 +++++++ configs/mx53ppd_defconfig | 39 +++ include/configs/mx53ppd.h | 248 +++++++++++++++++ 10 files changed, 1105 insertions(+) create mode 100644 board/ge/mx53ppd/Kconfig create mode 100644 board/ge/mx53ppd/MAINTAINERS create mode 100644 board/ge/mx53ppd/Makefile create mode 100644 board/ge/mx53ppd/imximage.cfg create mode 100644 board/ge/mx53ppd/mx53ppd.c create mode 100644 board/ge/mx53ppd/mx53ppd_video.c create mode 100644 board/ge/mx53ppd/ppd_gpio.h create mode 100644 configs/mx53ppd_defconfig create mode 100644 include/configs/mx53ppd.h diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index d96020d847..250194b623 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -46,6 +46,12 @@ config TARGET_MX53LOCO select BOARD_LATE_INIT select MX53 +config TARGET_MX53PPD + bool "Support mx53ppd" + select MX53 + help + Enable support for the GE Healthcare PPD. + config TARGET_MX53SMD bool "Support mx53smd" select MX53 @@ -70,6 +76,7 @@ source "board/freescale/mx53ard/Kconfig" source "board/freescale/mx53evk/Kconfig" source "board/freescale/mx53loco/Kconfig" source "board/freescale/mx53smd/Kconfig" +source "board/ge/mx53ppd/Kconfig" source "board/inversepath/usbarmory/Kconfig" source "board/technologic/ts4800/Kconfig" diff --git a/board/ge/mx53ppd/Kconfig b/board/ge/mx53ppd/Kconfig new file mode 100644 index 0000000000..781c1cf59f --- /dev/null +++ b/board/ge/mx53ppd/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ + +if TARGET_MX53PPD + +config SYS_BOARD + default "mx53ppd" + +config SYS_VENDOR + default "ge" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "mx53ppd" + +endif diff --git a/board/ge/mx53ppd/MAINTAINERS b/board/ge/mx53ppd/MAINTAINERS new file mode 100644 index 0000000000..9b64b5d389 --- /dev/null +++ b/board/ge/mx53ppd/MAINTAINERS @@ -0,0 +1,7 @@ +MX53PPD BOARD +M: Antti Mäentausta +M: Martyn Welch +S: Maintained +F: board/freescale/mx53ppd/ +F: include/configs/mx53ppd.h +F: configs/mx53ppd_defconfig diff --git a/board/ge/mx53ppd/Makefile b/board/ge/mx53ppd/Makefile new file mode 100644 index 0000000000..928edfbad6 --- /dev/null +++ b/board/ge/mx53ppd/Makefile @@ -0,0 +1,12 @@ +# Copyright 2017 General Electric Company +# +# Based on board/freescale/mx53loco/Makefile: +# +# (C) Copyright 2011 Freescale Semiconductor, Inc. +# Jason Liu +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += mx53ppd.o +obj-$(CONFIG_VIDEO) += mx53ppd_video.o diff --git a/board/ge/mx53ppd/imximage.cfg b/board/ge/mx53ppd/imximage.cfg new file mode 100644 index 0000000000..83ff4b8a8b --- /dev/null +++ b/board/ge/mx53ppd/imximage.cfg @@ -0,0 +1,87 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/imximage.cfg: + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x53fa8004 0x00194005 +DATA 4 0x53fa8554 0x00300000 +DATA 4 0x53fa8558 0x00300040 +DATA 4 0x53fa8560 0x00300000 +DATA 4 0x53fa8564 0x00300040 +DATA 4 0x53fa8568 0x00300040 +DATA 4 0x53fa8570 0x00300000 +DATA 4 0x53fa8574 0x00300000 +DATA 4 0x53fa8578 0x00300000 +DATA 4 0x53fa857c 0x00300040 +DATA 4 0x53fa8580 0x00300040 +DATA 4 0x53fa8584 0x00300000 +DATA 4 0x53fa8588 0x00300000 +DATA 4 0x53fa8590 0x00300040 +DATA 4 0x53fa8594 0x00300000 +DATA 4 0x53fa86f0 0x00300000 +DATA 4 0x53fa86f4 0x00000000 +DATA 4 0x53fa86fc 0x00000000 +DATA 4 0x53fa8714 0x00000000 +DATA 4 0x53fa8718 0x00300000 +DATA 4 0x53fa871c 0x00300000 +DATA 4 0x53fa8720 0x00300000 +DATA 4 0x53fa8728 0x00300000 +DATA 4 0x53fa872c 0x00300000 +DATA 4 0x63fd9088 0x35343535 +DATA 4 0x63fd9090 0x4d444c44 +DATA 4 0x63fd907c 0x01370138 +DATA 4 0x63fd9080 0x013b013c +DATA 4 0x63fd9018 0x00111740 +DATA 4 0x63fd9000 0x85190000 +DATA 4 0x63fd900c 0x8b8f52e3 +DATA 4 0x63fd9010 0xb68e8a63 +DATA 4 0x63fd9014 0x01ff00db +DATA 4 0x63fd902c 0x000026d2 +DATA 4 0x63fd9030 0x008f0e21 +DATA 4 0x63fd9008 0x09333030 +DATA 4 0x63fd9004 0x0002002d +DATA 4 0x63fd901c 0x00008032 +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00468031 +DATA 4 0x63fd901c 0x052080b0 +DATA 4 0x63fd901c 0x04008040 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00028039 +DATA 4 0x63fd901c 0x05208138 +DATA 4 0x63fd901c 0x04008048 +DATA 4 0x63fd9020 0x00005800 +DATA 4 0x63fd9040 0x05380003 +DATA 4 0x63fd9058 0x00011110 +DATA 4 0x63fd901c 0x00000000 diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c new file mode 100644 index 0000000000..6a8a29d7d8 --- /dev/null +++ b/board/ge/mx53ppd/mx53ppd.c @@ -0,0 +1,457 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/mx53loco.c: + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ppd_gpio.h" +#include +#include "../../ge/common/vpd_reader.h" +#include + +#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24) + +DECLARE_GLOBAL_DATA_PTR; + +/* Index of I2C1, SEGMENT 1 (see CONFIG_SYS_I2C_BUSES). */ +#define VPD_EEPROM_BUS 2 + +/* Address of 24C08 EEPROM. */ +#define VPD_EEPROM_ADDR 0x50 +#define VPD_EEPROM_ADDR_LEN 1 + +static u32 mx53_dram_size[2]; + +phys_size_t get_effective_memsize(void) +{ + /* + * WARNING: We must override get_effective_memsize() function here + * to report only the size of the first DRAM bank. This is to make + * U-Boot relocator place U-Boot into valid memory, that is, at the + * end of the first DRAM bank. If we did not override this function + * like so, U-Boot would be placed at the address of the first DRAM + * bank + total DRAM size - sizeof(uboot), which in the setup where + * each DRAM bank contains 512MiB of DRAM would result in placing + * U-Boot into invalid memory area close to the end of the first + * DRAM bank. + */ + return mx53_dram_size[0]; +} + +int dram_init(void) +{ + mx53_dram_size[0] = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); + mx53_dram_size[1] = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); + + gd->ram_size = mx53_dram_size[0] + mx53_dram_size[1]; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = mx53_dram_size[0]; + + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = mx53_dram_size[1]; + + return 0; +} + +u32 get_board_rev(void) +{ + return get_cpu_rev() & ~(0xF << 8); +} + +#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) + +#ifdef CONFIG_USB_EHCI_MX5 +int board_ehci_hcd_init(int port) +{ + /* request VBUS power enable pin, GPIO7_8 */ + imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8); + gpio_direction_output(IMX_GPIO_NR(7, 8), 1); + return 0; +} +#endif + +static void setup_iomux_fec(void) +{ + static const iomux_v3_cfg_t fec_pads[] = { + NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS | + PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | + PAD_CTL_ODE), + NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV, + PAD_CTL_HYS | PAD_CTL_PKE), + }; + + imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[2] = { + {MMC_SDHC3_BASE_ADDR}, + {MMC_SDHC1_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) +#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ + PAD_CTL_DSE_HIGH) + +int board_mmc_init(bd_t *bis) +{ + static const iomux_v3_cfg_t sd1_pads[] = { + NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, + SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), + MX53_PAD_EIM_DA11__GPIO3_11, + }; + + static const iomux_v3_cfg_t sd2_pads[] = { + NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL), + MX53_PAD_EIM_DA13__GPIO3_13, + }; + + u32 index; + int ret; + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads(sd1_pads, + ARRAY_SIZE(sd1_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads(sd2_pads, + ARRAY_SIZE(sd2_pads)); + break; + default: + printf("Warning: you configured more ESDHC controller (%d) as supported by the board(2)\n", + CONFIG_SYS_FSL_ESDHC_NUM); + return -EINVAL; + } + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; +} +#endif + +#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) + +static void setup_iomux_i2c(void) +{ + static const iomux_v3_cfg_t i2c1_pads[] = { + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL), + }; + + imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); +} + +#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) + +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX53_PAD_EIM_D21__I2C1_SCL | I2C_PAD, + .gpio_mode = MX53_PAD_EIM_D28__GPIO3_28 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 28) + }, + .sda = { + .i2c_mode = MX53_PAD_EIM_D28__I2C1_SDA | I2C_PAD, + .gpio_mode = MX53_PAD_EIM_D21__GPIO3_21 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 21) + } +}; + +static int clock_1GHz(void) +{ + int ret; + u32 ref_clk = MXC_HCLK; + /* + * After increasing voltage to 1.25V, we can switch + * CPU clock to 1GHz and DDR to 400MHz safely + */ + ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK); + if (ret) { + printf("CPU: Switch CPU clock to 1GHZ failed\n"); + return -1; + } + + ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); + ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); + if (ret) { + printf("CPU: Switch DDR clock to 400MHz failed\n"); + return -1; + } + + return 0; +} + +void ppd_gpio_init(void) +{ + int i; + + imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads)); + for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) + gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value); +} + +int board_early_init_f(void) +{ + setup_iomux_fec(); + setup_iomux_lcd(); + ppd_gpio_init(); + + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#define VPD_TYPE_INVALID 0x00 +#define VPD_BLOCK_NETWORK 0x20 +#define VPD_BLOCK_HWID 0x44 +#define VPD_PRODUCT_PPD 4 +#define VPD_HAS_MAC1 0x1 +#define VPD_MAC_ADDRESS_LENGTH 6 + +struct vpd_cache { + u8 product_id; + u8 has; + unsigned char mac1[VPD_MAC_ADDRESS_LENGTH]; +}; + +/* + * Extracts MAC and product information from the VPD. + */ +static int vpd_callback(void *userdata, u8 id, u8 version, u8 type, size_t size, + u8 const *data) +{ + struct vpd_cache *vpd = (struct vpd_cache *)userdata; + + if (id == VPD_BLOCK_HWID && version == 1 && type != VPD_TYPE_INVALID && + size >= 1) { + vpd->product_id = data[0]; + + } else if (id == VPD_BLOCK_NETWORK && version == 1 && + type != VPD_TYPE_INVALID) { + if (size >= 6) { + vpd->has |= VPD_HAS_MAC1; + memcpy(vpd->mac1, data, VPD_MAC_ADDRESS_LENGTH); + } + } + + return 0; +} + +static void process_vpd(struct vpd_cache *vpd) +{ + int fec_index = -1; + + if (vpd->product_id == VPD_PRODUCT_PPD) + fec_index = 0; + + if (fec_index >= 0 && (vpd->has & VPD_HAS_MAC1)) + eth_env_set_enetaddr("ethaddr", vpd->mac1); +} + +static int read_vpd(uint eeprom_bus) +{ + struct vpd_cache vpd; + int res; + int size = 1024; + u8 *data; + unsigned int current_i2c_bus = i2c_get_bus_num(); + + res = i2c_set_bus_num(eeprom_bus); + if (res < 0) + return res; + + data = malloc(size); + if (!data) + return -ENOMEM; + + res = i2c_read(VPD_EEPROM_ADDR, 0, VPD_EEPROM_ADDR_LEN, data, size); + if (res == 0) { + memset(&vpd, 0, sizeof(vpd)); + vpd_reader(size, data, &vpd, vpd_callback); + process_vpd(&vpd); + } + + free(data); + + i2c_set_bus_num(current_i2c_bus); + return res; +} + +static void check_time(void) +{ + int ret, i; + struct rtc_time tm; + u8 retry = 3; + + unsigned int current_i2c_bus = i2c_get_bus_num(); + + ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM); + if (ret < 0) + return; + + rtc_init(); + + for (i = 0; i < retry; i++) { + ret = rtc_get(&tm); + if (!ret || ret == -EINVAL) + break; + } + + if (ret < 0) + env_set("rtc_status", "RTC_ERROR"); + + if (tm.tm_year > 2037) { + tm.tm_sec = 0; + tm.tm_min = 0; + tm.tm_hour = 0; + tm.tm_mday = 1; + tm.tm_wday = 2; + tm.tm_mon = 1; + tm.tm_year = 2036; + + for (i = 0; i < retry; i++) { + ret = rtc_set(&tm); + if (!ret) + break; + } + + if (ret < 0) + env_set("rtc_status", "RTC_ERROR"); + } + + i2c_set_bus_num(current_i2c_bus); +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + mxc_set_sata_internal_clock(); + setup_iomux_i2c(); + + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + + return 0; +} + +int misc_init_r(void) +{ + const char *cause; + + /* We care about WDOG only, treating everything else as + * a power-on-reset. + */ + if (get_imx_reset_cause() & 0x0010) + cause = "WDOG"; + else + cause = "POR"; + + env_set("bootcause", cause); + + return 0; +} + +int board_late_init(void) +{ + int res; + + read_vpd(VPD_EEPROM_BUS); + + res = clock_1GHz(); + if (res != 0) + return res; + + print_cpuinfo(); + hw_watchdog_init(); + + check_time(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: GE PPD\n"); + + return 0; +} diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c new file mode 100644 index 0000000000..45974bccd6 --- /dev/null +++ b/board/ge/mx53ppd/mx53ppd_video.c @@ -0,0 +1,135 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/mx53loco_video.c: + * + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Fabio Estevam + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ppd_gpio.h" + +#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24) + +static struct fb_videomode const nv_spwg = { + .name = "NV-SPWGRGB888", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 15384, + .left_margin = 16, + .right_margin = 210, + .upper_margin = 10, + .lower_margin = 22, + .hsync_len = 30, + .vsync_len = 13, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +}; + +void setup_iomux_lcd(void) +{ + static const iomux_v3_cfg_t lcd_pads[] = { + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, + }; + + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); +} + +static void lcd_enable(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* Set LDB_DI0 as clock source for IPU_DI0 */ + clrsetbits_le32(&mxc_ccm->cscmr2, + MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK, + MXC_CCM_CSCMR2_DI0_CLK_SEL( + MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK)); + + /* Turn on IPU LDB DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_LDB_DI0(3)); + + /* Turn on IPU DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_IPU_DI0(3)); + + /* Configure LDB */ + writel(IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, + &iomux->gpr[2]); + + /* Enable backlights */ + pwm_init(1, 0, 0); + + /* duty cycle 5000000ns, period: 5000000ns */ + pwm_config(1, 5000000, 5000000); + + /* Backlight Power */ + gpio_direction_output(BACKLIGHT_ENABLE, 1); + + pwm_enable(1); +} + +static int do_lcd_enable(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + lcd_enable(); + return 0; +} + +U_BOOT_CMD( + ppd_lcd_enable, 1, 1, do_lcd_enable, + "enable PPD LCD", + "no parameters" +); + +int board_video_skip(void) +{ + int ret; + + ret = ipuv3_fb_init(&nv_spwg, 0, IPU_PIX_FMT_RGB24); + if (ret) + printf("Display cannot be configured: %d\n", ret); + + return ret; +} diff --git a/board/ge/mx53ppd/ppd_gpio.h b/board/ge/mx53ppd/ppd_gpio.h new file mode 100644 index 0000000000..71a88a1da7 --- /dev/null +++ b/board/ge/mx53ppd/ppd_gpio.h @@ -0,0 +1,96 @@ +/* + * (C) Copyright 2015 General Electric Company + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PPD_GPIO_H_ +#define __PPD_GPIO_H_ + +#include +#include + +#define PPD_UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) + +static const iomux_v3_cfg_t ppd_pads[] = { + /* FEC */ + MX53_PAD_EIM_A22__GPIO2_16, + /* UART */ + NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__UART1_RXD_MUX, PPD_UART_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__UART1_TXD_MUX, PPD_UART_PAD_CTRL), + /* Video */ + MX53_PAD_CSI0_DATA_EN__GPIO5_20, /* LR_SCAN_CTRL */ + MX53_PAD_CSI0_VSYNC__GPIO5_21, /* UD_SCAN_CTRL */ + MX53_PAD_CSI0_DAT10__GPIO5_28, /* DATA_WIDTH_CTRL */ + MX53_PAD_CSI0_PIXCLK__GPIO5_18, /* HOST_CONTROLLED_RESET_TO_LCD_N */ + MX53_PAD_EIM_DA2__GPIO3_2, /* LVDS1_MUX_CTRL */ + MX53_PAD_EIM_DA3__GPIO3_3, /* LVDS0_MUX_CTRL */ + MX53_PAD_EIM_A21__GPIO2_17, /* ENABLE_PWR_TO_LCD_AND_UI_INTERFACE */ + MX53_PAD_CSI0_DAT11__GPIO5_29, /* BACKLIGHT_ENABLE */ + MX53_PAD_DISP0_DAT9__PWM2_PWMO, /* IMX535_PWM2_TO_LCD_CONNECTOR */ + /* I2C */ + MX53_PAD_EIM_A20__GPIO2_18, /* RESET_I2C1_BUS_SEGMENT_MUX_N */ + + /* SPI */ + MX53_PAD_DISP0_DAT23__GPIO5_17, + MX53_PAD_KEY_COL2__GPIO4_10, + MX53_PAD_KEY_ROW2__GPIO4_11, + MX53_PAD_KEY_COL3__GPIO4_12, +}; + +struct gpio_cfg { + unsigned int gpio; + int value; +}; + +#define RESET_IMX535_ETHERNET_PHY_N IMX_GPIO_NR(2, 16) +#define UD_SCAN_CTRL IMX_GPIO_NR(5, 21) +#define LR_SCAN_CTRL IMX_GPIO_NR(5, 20) +#define LVDS0_MUX_CTRL IMX_GPIO_NR(3, 3) +#define LVDS1_MUX_CTRL IMX_GPIO_NR(3, 2) +#define HOST_CONTROLLED_RESET_TO_LCD_N IMX_GPIO_NR(5, 18) +#define DATA_WIDTH_CTRL IMX_GPIO_NR(5, 28) +#define RESET_DP0_TRANSMITTER_N IMX_GPIO_NR(2, 28) +#define RESET_DP1_TRANSMITTER_N IMX_GPIO_NR(2, 29) +#define POWER_DOWN_LVDS0_DESERIALIZER_N IMX_GPIO_NR(2, 22) +#define POWER_DOWN_LVDS1_DESERIALIZER_N IMX_GPIO_NR(2, 27) +#define ENABLE_PWR_TO_LCD_AND_UI_INTERFACE IMX_GPIO_NR(2, 17) +#define BACKLIGHT_ENABLE IMX_GPIO_NR(5, 29) +#define RESET_I2C1_BUS_SEGMENT_MUX_N IMX_GPIO_NR(2, 18) +#define ECSPI1_CS0 IMX_GPIO_NR(5, 17) +#define ECSPI1_CS1 IMX_GPIO_NR(4, 10) +#define ECSPI1_CS2 IMX_GPIO_NR(4, 11) +#define ECSPI1_CS3 IMX_GPIO_NR(4, 12) + +static const struct gpio_cfg ppd_gpios[] = { + /* FEC */ + /* Drive Low as GPIO output for 25ms per Eth Phy IX spec */ + /* Then Drive High as GPIO output to bring Eth Phy IC out of reset */ + { RESET_IMX535_ETHERNET_PHY_N, 0 }, + { RESET_IMX535_ETHERNET_PHY_N, 1 }, + /* Video */ + { UD_SCAN_CTRL, 0 }, + { LR_SCAN_CTRL, 1 }, +#ifdef PROPRIETARY_CHANGES + { LVDS0_MUX_CTRL, 1 }, +#else + { LVDS0_MUX_CTRL, 0 }, +#endif + { LVDS1_MUX_CTRL, 1 }, + { HOST_CONTROLLED_RESET_TO_LCD_N, 1 }, + { DATA_WIDTH_CTRL, 0 }, + { RESET_DP0_TRANSMITTER_N, 1 }, + { RESET_DP1_TRANSMITTER_N, 1 }, + { POWER_DOWN_LVDS0_DESERIALIZER_N, 1 }, + { POWER_DOWN_LVDS1_DESERIALIZER_N, 1 }, + { ENABLE_PWR_TO_LCD_AND_UI_INTERFACE, 1 }, + { BACKLIGHT_ENABLE, 0 }, + { RESET_I2C1_BUS_SEGMENT_MUX_N, 1 }, + { ECSPI1_CS0, 1 }, + { ECSPI1_CS1, 1 }, + { ECSPI1_CS2, 1 }, + { ECSPI1_CS3, 1 }, +}; + +#endif /* __PPD_GPIO_H_ */ diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig new file mode 100644 index 0000000000..0ab19e9f3a --- /dev/null +++ b/configs/mx53ppd_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX5=y +CONFIG_TARGET_MX53PPD=y +CONFIG_FIT=y +CONFIG_BOOTCOUNT=y +CONFIG_BOOTCOUNT_EXT=y +CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE="mmc" +CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" +CONFIG_SYS_BOOTCOUNT_EXT_NAME="/boot/failures" +CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 +CONFIG_NETDEVICES=y +CONFIG_VIDEO=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ge/mx53ppd/imximage.cfg" +CONFIG_BOOTDELAY=1 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_I2C=y +CONFIG_RTC_S35392A=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +# CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_OF_LIBFDT=y + +CONFIG_MMC=y diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h new file mode 100644 index 0000000000..92dd845c70 --- /dev/null +++ b/include/configs/mx53ppd.h @@ -0,0 +1,248 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu + * + * Configuration settings for Freescale MX53 low cost board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONSOLE_DEV "ttymxc0" + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_SYS_FSL_CLK + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 + +#define CONFIG_MISC_INIT_R +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_MXC_GPIO +#define CONFIG_REVISION_TAG + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 2 + +#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ + +/* Eth Configs */ +#define CONFIG_MII + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1F + +/* USB Configs */ +#define CONFIG_USB_EHCI_MX5 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +#define CONFIG_SYS_RTC_BUS_NUM 2 +#define CONFIG_SYS_I2C_RTC_ADDR 0x30 + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ + +/* PMIC Controller */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_DIALOG_POWER +#define CONFIG_POWER_FSL +#define CONFIG_POWER_FSL_MC13892 +#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#define CONFIG_SUPPORT_RAW_INITRD + +#define CONFIG_ETHPRIME "FEC0" + +#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0x77800000 + +#define PPD_CONFIG_NFS \ + "nfsserver=192.168.252.95\0" \ + "gatewayip=192.168.252.95\0" \ + "netmask=255.255.255.0\0" \ + "ipaddr=192.168.252.99\0" \ + "kernsize=0x2000\0" \ + "use_dhcp=0\0" \ + "nfsroot=/opt/springdale/rd\0" \ + "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ + "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \ + "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \ + "set getcmd dhcp; else set kern_ipconf " \ + "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \ + "set getcmd tftp; fi\0" \ + "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ + "${nfsserver}:${image}; bootm ${loadaddr}\0" \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + PPD_CONFIG_NFS \ + "bootlimit=10\0" \ + "image=/boot/fitImage\0" \ + "fdt_high=0xffffffff\0" \ + "dev=mmc\0" \ + "devnum=0\0" \ + "rootdev=mmcblk0p\0" \ + "quiet=quiet loglevel=0\0" \ + "console=" CONSOLE_DEV "\0" \ + "lvds=ldb\0" \ + "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \ + "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \ + "console=${console} ${rtc_status}\0" \ + "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \ + "rootwait ${bootargs}\0" \ + "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ + "then setenv quiet; fi\0" \ + "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ + "/boot/bootcause/firstboot\0" \ + "swappartitions=setexpr partnum 3 - ${partnum}\0" \ + "failbootcmd=" \ + "ppd_lcd_enable; " \ + "msg=\"Monitor failed to start. " \ + "Try again, or contact GE Service for support.\"; " \ + "echo $msg; " \ + "setenv stdout vga; " \ + "echo \"\n\n\n\n \" $msg; " \ + "setenv stdout serial; " \ + "mw.b 0x7000A000 0xbc; " \ + "mw.b 0x7000A001 0x00; " \ + "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ + "altbootcmd=" \ + "run doquiet; " \ + "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ + "run hasfirstboot || setenv partnum 0; " \ + "if test ${partnum} != 0; then " \ + "setenv bootcause REVERT; " \ + "run swappartitions loadimage doboot; " \ + "fi; " \ + "run failbootcmd\0" \ + "loadimage=" \ + "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ + "doboot=" \ + "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ + "run setargs; " \ + "run bootargs_emmc; " \ + "bootm ${loadaddr}\0" \ + "tryboot=" \ + "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ + "run loadimage || run swappartitions && run loadimage || " \ + "setenv partnum 0 && echo MISSING IMAGE;" \ + "run doboot; " \ + "run failbootcmd\0" \ + "video-mode=" \ + "lcd:800x480-24@60,monitor=lcd\0" \ + +#define CONFIG_MMCBOOTCOMMAND \ + "if mmc dev ${devnum}; then " \ + "run doquiet; " \ + "run tryboot; " \ + "fi; " \ + +#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ + +#define CONFIG_SYS_MAXARGS 48 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_2 CSD1_BASE_ADDR +#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_SIZE (gd->ram_size) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_CMD_FUSE +#define CONFIG_FSL_IIM + +#define CONFIG_SYS_I2C_SPEED 100000 + +/* I2C1 */ +#define CONFIG_SYS_NUM_I2C_BUSES 9 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ + } + +#define CONFIG_BCH + +#define CONFIG_BOOTCOUNT_LIMIT + +/* Backlight Control */ +#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66666000 + +/* Framebuffer and LCD */ +#ifdef CONFIG_VIDEO + #define CONFIG_VIDEO_IPUV3 +#endif + +#endif /* __CONFIG_H */ From 74da017a4966645d1c84d2107ec988bd9052bafe Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Nov 2017 17:04:03 -0200 Subject: [PATCH 17/31] mx6: Select MX6QDL option via Kconfig Currently the MX6QDL option is selected via CONFIG_SYS_EXTRA_OPTIONS, but it is better to select it directly via Kconfig. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/mx6/Kconfig | 11 +++++++++++ configs/cgtqmx6eval_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/wandboard_defconfig | 2 +- 15 files changed, 25 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index fd73c67fde..6f5a92a2be 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -109,6 +109,7 @@ config TARGET_ARISTAINETOS2B config TARGET_CGTQMX6EVAL bool "cgtqmx6eval" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -117,6 +118,7 @@ config TARGET_CGTQMX6EVAL config TARGET_CM_FX6 bool "CM-FX6" select SUPPORT_SPL + select MX6QDL select DM select DM_SERIAL select DM_GPIO @@ -131,6 +133,7 @@ config TARGET_COLIBRI_IMX6 config TARGET_DHCOMIMX6 bool "dh_imx6" + select MX6QDL select BOARD_LATE_INIT select BOARD_EARLY_INIT_F select SUPPORT_SPL @@ -165,6 +168,7 @@ config TARGET_GE_B850V3 config TARGET_GW_VENTANA bool "gw_ventana" + select MX6QDL select SUPPORT_SPL imply CMD_SATA imply CMD_SPL @@ -176,10 +180,12 @@ config TARGET_KOSAGI_NOVENA config TARGET_MCCMON6 bool "mccmon6" + select MX6QDL select SUPPORT_SPL config TARGET_MX6CUBOXI bool "Solid-run mx6 boards" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -231,6 +237,7 @@ config TARGET_MX6Q_ICORE_RQS config TARGET_MX6SABREAUTO bool "mx6sabreauto" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -239,6 +246,7 @@ config TARGET_MX6SABREAUTO config TARGET_MX6SABRESD bool "mx6sabresd" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -360,6 +368,7 @@ config TARGET_PCM058 config TARGET_PFLA02 bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -378,6 +387,7 @@ config TARGET_TQMA6 config TARGET_UDOO bool "udoo" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -398,6 +408,7 @@ config TARGET_SAMTEC_VINING_2000 config TARGET_WANDBOARD bool "wandboard" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 3521500b0d..47c0b4c622 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 68ae70e554..0773aca0d4 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -13,7 +13,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 175f9fa28c..814df1cd27 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 76bfbfdc2c..5379cf3b3b 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 9e6e458f8e..fe364d07ce 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index c9e8b8b1d6..dd4d73ce9e 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 0f9794c9f1..7c4657922a 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MCCMON6=y CONFIG_SPL_SERIAL_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 01a20e61a6..97f7f9aa73 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -6,7 +6,7 @@ CONFIG_TARGET_MCCMON6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 97a79e53f6..e729def89a 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -11,7 +11,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_SYS_STDIO_DEREGISTER is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 7e344a1537..d80a7e4783 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 90102b349c..caed26145f 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 456ae6581e..029c9de2ce 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index f064928b79..b92b181d4f 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 23a6403d52..a4518fcce0 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y From 4684aa798877b8b5ef57cd036724b64fe5a3688e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Nov 2017 17:04:04 -0200 Subject: [PATCH 18/31] mx6sabreauto: Remove unneeded SPL selection SPL option is already selected via Kconfig, so remove it from the CONFIG_SYS_EXTRA_OPTIONS line. Signed-off-by: Fabio Estevam --- configs/mx6sabreauto_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d80a7e4783..98c39bb22f 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y From 23ecca2cd829485c305d9a49c25508d74e041216 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 23 Nov 2017 09:18:53 -0200 Subject: [PATCH 19/31] mx6ull: Fix WDOG3 base address i.MX6ULL has the same WDOG3 base address as i.MX6UL, so take this into account in the base address definition. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan Reviewed-by: Stefano Babic --- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 624ccecfd6..7736b6a8ac 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -367,7 +367,7 @@ #include /* only for i.MX6SX/UL */ -#define WDOG3_BASE_ADDR ((is_mx6ul() ? \ +#define WDOG3_BASE_ADDR (((is_mx6ul() || is_mx6ull()) ? \ MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)) #define LCDIF1_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6SLL)) ? \ MX6SLL_LCDIF_BASE_ADDR : \ From b42287f4c92517022ab4e9a21ed27b9384c725cb Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 23 Nov 2017 09:18:54 -0200 Subject: [PATCH 20/31] imx: Also clear powerdown enable bit for WDOG3 on i.MX6ULL Clear powerdown enable bit for WDOG3 on i.MX6ULL to avoid unwanted kernel reboots. Suggested-by: Ye Li Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan Reviewed-by: Stefano Babic --- arch/arm/mach-imx/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/init.c b/arch/arm/mach-imx/init.c index 720ad672a6..2a05c59642 100644 --- a/arch/arm/mach-imx/init.c +++ b/arch/arm/mach-imx/init.c @@ -78,7 +78,7 @@ void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog1->wmcr); writew(enable, &wdog2->wmcr); - if (is_mx6sx() || is_mx6ul() || is_mx7()) + if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx7()) writew(enable, &wdog3->wmcr); #ifdef CONFIG_MX7D writew(enable, &wdog4->wmcr); From e2162d709f9c0f7d8b781cad849cdb2f2cc6efa8 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 23 Nov 2017 10:55:33 -0200 Subject: [PATCH 21/31] imx: Remove boolean parameter from wdog powerdown function imx_set_wdog_powerdown() is always used to disable the power down enable bit, so remove the boolean parameter of the function. It is also a bit strange to write a boolean value into registers, so this new version makes explicit that we are writing 0. While at it, rename it to imx_wdog_disable_powerdown(). Signed-off-by: Fabio Estevam --- arch/arm/include/asm/mach-imx/sys_proto.h | 2 +- arch/arm/mach-imx/init.c | 10 +++++----- arch/arm/mach-imx/mx6/soc.c | 2 +- arch/arm/mach-imx/mx7/soc.c | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 703634334f..a80a392a73 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -105,7 +105,7 @@ void set_chipselect_size(int const); void init_aips(void); void init_src(void); -void imx_set_wdog_powerdown(bool enable); +void imx_wdog_disable_powerdown(void); int board_mmc_get_env_dev(int devno); diff --git a/arch/arm/mach-imx/init.c b/arch/arm/mach-imx/init.c index 2a05c59642..0aa8295751 100644 --- a/arch/arm/mach-imx/init.c +++ b/arch/arm/mach-imx/init.c @@ -65,7 +65,7 @@ void init_aips(void) } } -void imx_set_wdog_powerdown(bool enable) +void imx_wdog_disable_powerdown(void) { struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; @@ -75,13 +75,13 @@ void imx_set_wdog_powerdown(bool enable) #endif /* Write to the PDE (Power Down Enable) bit */ - writew(enable, &wdog1->wmcr); - writew(enable, &wdog2->wmcr); + writew(0, &wdog1->wmcr); + writew(0, &wdog2->wmcr); if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx7()) - writew(enable, &wdog3->wmcr); + writew(0, &wdog3->wmcr); #ifdef CONFIG_MX7D - writew(enable, &wdog4->wmcr); + writew(0, &wdog4->wmcr); #endif } diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index ad72c12511..43cb58106b 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -436,7 +436,7 @@ int arch_cpu_init(void) if (is_mx6sl()) setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); - imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ + imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */ if (is_mx6sx()) setbits_le32(&ccm->cscdr1, MXC_CCM_CSCDR1_UART_CLK_SEL); diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 87bf105f38..d160e80146 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -236,7 +236,7 @@ int arch_cpu_init(void) init_csu(); /* Disable PDE bit of WMCR register */ - imx_set_wdog_powerdown(false); + imx_wdog_disable_powerdown(); imx_enet_mdio_fixup(); From f086812acd3f8dad365ab328e426178ca36a8408 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 22 Nov 2017 11:15:28 -0200 Subject: [PATCH 22/31] mx6sxsabresd: Use PARTUUID to specify the rootfs location mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline. Currently the rootfs location is passed via mmcblk number and the problem with this approach is that the mmcblk number for the SD card changes depending on the kernel version. In order to avoid such issue, use the UUID method to specify the rootfs location. Signed-off-by: Fabio Estevam Reviewed-by: Stefano Babic Reviewed-by: Lukasz Majewski --- configs/mx6sxsabresd_defconfig | 1 + include/configs/mx6sxsabresd.h | 5 +++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 1ec672e5a5..2c184f6f77 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 5ef78a75ab..f4c9c28397 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -57,9 +57,9 @@ "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ "mmcdev=2\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "finduuid=part uuid mmc 2:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ + "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ @@ -67,6 +67,7 @@ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ From 409b16d3e09da3c738b925311e3e59068558618d Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:10 +0530 Subject: [PATCH 23/31] i.MX6: engicam: Move set_fdt_file to common setenv_fdt_file to common code and set dtb based on CONFIG_DEFAULT_DEVICE_TREE and cpu_type. Signed-off-by: Jagan Teki --- board/engicam/common/board.c | 24 ++++++++++++++++++++++++ board/engicam/common/board.h | 1 - board/engicam/geam6ul/geam6ul.c | 6 ------ board/engicam/icorem6/icorem6.c | 8 -------- board/engicam/icorem6_rqs/icorem6_rqs.c | 8 -------- board/engicam/isiotmx6ul/isiotmx6ul.c | 11 ----------- 6 files changed, 24 insertions(+), 34 deletions(-) diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index c7ec55ff82..f86fb2be42 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -32,6 +32,30 @@ static void mmc_late_init(void) } #endif +static void setenv_fdt_file(void) +{ + const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE; + + if (!strcmp(cmp_dtb, "imx6q-icore")) { + if (is_mx6dq()) + env_set("fdt_file", "imx6q-icore.dtb"); + else if(is_mx6dl() || is_mx6solo()) + env_set("fdt_file", "imx6dl-icore.dtb"); + } else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) { + if (is_mx6dq()) + env_set("fdt_file", "imx6q-icore-rqs.dtb"); + else if(is_mx6dl() || is_mx6solo()) + env_set("fdt_file", "imx6dl-icore-rqs.dtb"); + } else if (!strcmp(cmp_dtb, "imx6ul-geam-kit")) + env_set("fdt_file", "imx6ul-geam-kit.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc")) + env_set("fdt_file", "imx6ul-isiot-mmc.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc")) + env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand")) + env_set("fdt_file", "imx6ul-isiot-nand.dtb"); +} + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> diff --git a/board/engicam/common/board.h b/board/engicam/common/board.h index f364a23296..c720b0bcd0 100644 --- a/board/engicam/common/board.h +++ b/board/engicam/common/board.h @@ -6,7 +6,6 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -void setenv_fdt_file(void); void setup_gpmi_nand(void); void setup_display(void); #endif /* _BOARD_H_ */ diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/geam6ul/geam6ul.c index ffd383a0ee..15bd8b2c30 100644 --- a/board/engicam/geam6ul/geam6ul.c +++ b/board/engicam/geam6ul/geam6ul.c @@ -90,12 +90,6 @@ void setup_gpmi_nand(void) } #endif /* CONFIG_NAND_MXS */ -void setenv_fdt_file(void) -{ - if (is_mx6ul()) - env_set("fdt_file", "imx6ul-geam-kit.dtb"); -} - #ifdef CONFIG_SPL_BUILD /* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index 3d4f713c3e..59c085bb2c 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -192,14 +192,6 @@ void setup_display(void) } #endif /* CONFIG_VIDEO_IPUV3 */ -void setenv_fdt_file(void) -{ - if (is_mx6dq()) - env_set("fdt_file", "imx6q-icore.dtb"); - else if(is_mx6dl() || is_mx6solo()) - env_set("fdt_file", "imx6dl-icore.dtb"); -} - #ifdef CONFIG_SPL_BUILD /* MMC board initialization is needed till adding DM support in SPL */ #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 01148894c3..8afc9beaf9 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -31,14 +31,6 @@ int board_mmc_get_env_dev(int devno) } #endif -void setenv_fdt_file(void) -{ - if (is_mx6dq()) - env_set("fdt_file", "imx6q-icore-rqs.dtb"); - else if(is_mx6dl() || is_mx6solo()) - env_set("fdt_file", "imx6dl-icore-rqs.dtb"); -} - #ifdef CONFIG_SPL_BUILD #include diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index fbf17242f8..9afa8e4065 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -98,17 +98,6 @@ int board_mmc_get_env_dev(int devno) } #endif -void setenv_fdt_file(void) -{ - if (is_mx6ul()) { -#ifdef CONFIG_ENV_IS_IN_MMC - env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); -#else - env_set("fdt_file", "imx6ul-isiot-nand.dtb"); -#endif - } -} - #ifdef CONFIG_SPL_BUILD #include From a1797beed262b171645af867303ecf76aad66178 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:11 +0530 Subject: [PATCH 24/31] i.MX6Q: icorem6: Move spl load fit to common/spl Move spl load fit code into common/spl Signed-off-by: Jagan Teki --- board/engicam/common/spl.c | 16 ++++++++++++++++ board/engicam/icorem6/icorem6.c | 12 ------------ board/engicam/icorem6_rqs/icorem6_rqs.c | 12 ------------ 3 files changed, 16 insertions(+), 24 deletions(-) diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index 8711418fb4..f8ae3acb0d 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -39,6 +39,22 @@ static iomux_v3_cfg_t const uart_pads[] = { #endif }; +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (is_mx6dq() && !strcmp(name, "imx6q-icore")) + return 0; + else if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) + return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore")) + return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) + return 0; + else + return -1; +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index 59c085bb2c..e173124fa1 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -264,16 +264,4 @@ int board_mmc_init(bd_t *bis) return 0; } #endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - if (is_mx6dq() && !strcmp(name, "imx6q-icore")) - return 0; - else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore")) - return 0; - else - return -1; -} -#endif #endif /* CONFIG_SPL_BUILD */ diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 8afc9beaf9..84ab936d0f 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -147,16 +147,4 @@ void board_boot_order(u32 *spl_boot_list) } #endif #endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) - return 0; - else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) - return 0; - else - return -1; -} -#endif #endif /* CONFIG_SPL_BUILD */ From 1f6e9bd2a730e23c69ec08537d3dd4c1731db7dc Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:12 +0530 Subject: [PATCH 25/31] i.MX6Q: icore: Add SPL_OF_CONTROL support Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 2 + arch/arm/dts/imx6qdl-icore.dtsi | 2 + arch/arm/dts/imx6qdl.dtsi | 5 ++ arch/arm/mach-imx/mx6/Kconfig | 8 ++ board/engicam/icorem6/icorem6.c | 75 ----------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 102 ------------------------ configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + include/configs/imx6-engicam.h | 20 ++--- 9 files changed, 30 insertions(+), 186 deletions(-) diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 8b9d5b4b08..65cbf5abb3 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -100,6 +100,7 @@ }; &usdhc3 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -165,6 +166,7 @@ }; pinctrl_usdhc3: usdhc3grp { + u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi index a485c3eb95..06d9bc3a42 100644 --- a/arch/arm/dts/imx6qdl-icore.dtsi +++ b/arch/arm/dts/imx6qdl-icore.dtsi @@ -118,6 +118,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -208,6 +209,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index b13b0b2db8..e04b57089a 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -77,6 +77,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-spl; dma_apbh: dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -225,6 +226,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -516,6 +518,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -805,6 +808,7 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; + u-boot,dm-spl; }; ldb: ldb@020e0008 { @@ -889,6 +893,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + u-boot,dm-spl; crypto: caam@2100000 { compatible = "fsl,sec-v4.0"; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 6f5a92a2be..b78ebc1e04 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -219,6 +219,10 @@ config TARGET_MX6Q_ICORE select DM_THERMAL select SUPPORT_SPL select SPL_LOAD_FIT + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6Q_ICORE_RQS bool "Support Engicam i.Core RQS" @@ -234,6 +238,10 @@ config TARGET_MX6Q_ICORE_RQS select DM_THERMAL select SUPPORT_SPL select SPL_LOAD_FIT + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6SABREAUTO bool "mx6sabreauto" diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index e173124fa1..a967ccd0a7 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -7,7 +7,6 @@ */ #include -#include #include #include @@ -191,77 +190,3 @@ void setup_display(void) writel(reg, &iomux->gpr[3]); } #endif /* CONFIG_VIDEO_IPUV3 */ - -#ifdef CONFIG_SPL_BUILD -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include -#include - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */ -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 4}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} -#endif -#endif /* CONFIG_SPL_BUILD */ diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 84ab936d0f..cd73dfa9ba 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -6,21 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include -#include - -#include -#include -#include - -#include -#include -#include -#include #include -#include - -#include "../common/board.h" DECLARE_GLOBAL_DATA_PTR; @@ -34,93 +20,6 @@ int board_mmc_get_env_dev(int devno) #ifdef CONFIG_SPL_BUILD #include -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include -#include - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR, 1, 4}, - {USDHC4_BASE_ADDR, 1, 8}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC3_BASE_ADDR: - case USDHC4_BASE_ADDR: - ret = 1; - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC3 - * mmc1 USDHC4 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 1: - SETUP_IOMUX_PADS(usdhc4_pads); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} - #ifdef CONFIG_ENV_IS_IN_MMC void board_boot_order(u32 *spl_boot_list) { @@ -146,5 +45,4 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[0] = boot_dev; } #endif -#endif #endif /* CONFIG_SPL_BUILD */ diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6e93c49b5c..31cf1e6184 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -48,3 +48,4 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index fbe96512c6..1e57debf48 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -40,3 +40,4 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 86c1d385cf..b88afd7ec6 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -216,16 +216,18 @@ # include "imx6_spl.h" # ifdef CONFIG_SPL_BUILD -# if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) || defined(CONFIG_TARGET_MX6UL_ISIOT) -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# else -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# endif +# if defined(CONFIG_IMX6UL) +# if defined(CONFIG_TARGET_MX6UL_ISIOT) +# define CONFIG_SYS_FSL_USDHC_NUM 2 +# else +# define CONFIG_SYS_FSL_USDHC_NUM 1 +# endif -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif +# define CONFIG_SYS_FSL_ESDHC_ADDR 0 +# undef CONFIG_DM_GPIO +# undef CONFIG_DM_MMC +# endif /* CONFIG_IMX6UL */ +# endif /* CONFIG_SPL_BUILD */ #endif #endif /* __IMX6_ENGICAM_CONFIG_H */ From bb0297ccbd47de6bafc7bf54b31f7181bb346f69 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:13 +0530 Subject: [PATCH 26/31] pinctrl: imx6ul: Fix pinctrl data overlapped with DT area before relocation pinctrl data BSS is overlapping DT area, when .data is using uninitialized global variable, imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID to prevent BSS overlap Suggested-by: Lokesh Vutla Reported-by: Jagan Teki Signed-off-by: Jagan Teki --- drivers/pinctrl/nxp/pinctrl-imx6.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c index 0f767d9079..cac577b40b 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx6.c +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c @@ -13,6 +13,11 @@ static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info; +/* FIXME Before reloaction, BSS is overlapped with DT area */ +static struct imx_pinctrl_soc_info imx6ul_pinctrl_soc_info = { + .flags = ZERO_OFFSET_VALID, +}; + static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = { .flags = ZERO_OFFSET_VALID, }; @@ -32,7 +37,7 @@ static const struct udevice_id imx6_pinctrl_match[] = { { .compatible = "fsl,imx6sll-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info }, { .compatible = "fsl,imx6sll-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, { .compatible = "fsl,imx6sx-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, - { .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, + { .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6ul_pinctrl_soc_info }, { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info }, { /* sentinel */ } }; From 152038ea1886782fff6f1c7ca5f3aaa2da9a66fb Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:14 +0530 Subject: [PATCH 27/31] i.MX6UL: icore: Add SPL_OF_CONTROL support Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki --- arch/arm/dts/imx6ul-geam-kit.dts | 4 + arch/arm/dts/imx6ul-isiot-emmc.dts | 2 + arch/arm/dts/imx6ul-isiot.dtsi | 2 + arch/arm/dts/imx6ul.dtsi | 6 ++ arch/arm/mach-imx/mx6/Kconfig | 9 +++ board/engicam/geam6ul/geam6ul.c | 81 --------------------- board/engicam/isiotmx6ul/isiotmx6ul.c | 101 -------------------------- configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 1 + include/configs/imx6-engicam.h | 13 ---- 11 files changed, 26 insertions(+), 195 deletions(-) diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts index 07c21cb0a2..15e3f94153 100644 --- a/arch/arm/dts/imx6ul-geam-kit.dts +++ b/arch/arm/dts/imx6ul-geam-kit.dts @@ -87,6 +87,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; @@ -134,6 +135,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -145,6 +147,7 @@ }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 @@ -156,6 +159,7 @@ }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts index 677de96473..a611e3bba5 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -50,6 +50,7 @@ }; &usdhc2 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; @@ -60,6 +61,7 @@ &iomuxc { pinctrl_usdhc2: usdhc2grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi index 9a3c35c56a..5007a88f45 100644 --- a/arch/arm/dts/imx6ul-isiot.dtsi +++ b/arch/arm/dts/imx6ul-isiot.dtsi @@ -82,6 +82,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; @@ -128,6 +129,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index def5f8cac9..7affab866f 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -134,6 +134,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-spl; pmu { compatible = "arm,cortex-a7-pmu"; @@ -185,6 +186,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -415,6 +417,7 @@ #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, <&iomuxc 16 33 16>; + u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -451,6 +454,7 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; + u-boot,dm-spl; }; gpio5: gpio@020ac000 { @@ -649,6 +653,7 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; + u-boot,dm-spl; }; gpr: iomuxc-gpr@020e4000 { @@ -729,6 +734,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + u-boot,dm-spl; usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index b78ebc1e04..412e48e12a 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -316,6 +316,11 @@ config TARGET_MX6UL_GEAM select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL + config TARGET_MX6UL_ISIOT bool "Support Engicam Is.IoT MX6UL" select BOARD_LATE_INIT @@ -328,6 +333,10 @@ config TARGET_MX6UL_ISIOT select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/geam6ul/geam6ul.c index 15bd8b2c30..23e7e4b0b9 100644 --- a/board/engicam/geam6ul/geam6ul.c +++ b/board/engicam/geam6ul/geam6ul.c @@ -7,7 +7,6 @@ */ #include -#include #include #include @@ -89,83 +88,3 @@ void setup_gpmi_nand(void) setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); } #endif /* CONFIG_NAND_MXS */ - -#ifdef CONFIG_SPL_BUILD -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include -#include - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - - /* VSELECT */ - IOMUX_PADS(PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* CD */ - IOMUX_PADS(PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), - /* RST_B */ - IOMUX_PADS(PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 4}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} -#endif /* CONFIG_FSL_ESDHC */ -#endif /* CONFIG_SPL_BUILD */ diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 9afa8e4065..05d23c2df2 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -101,106 +101,6 @@ int board_mmc_get_env_dev(int devno) #ifdef CONFIG_SPL_BUILD #include -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include -#include - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - - /* VSELECT */ - IOMUX_PADS(PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* CD */ - IOMUX_PADS(PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), - /* RST_B */ - IOMUX_PADS(PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc2_pads[] = { - IOMUX_PADS(PAD_NAND_ALE__USDHC2_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) -#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5) - -struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC1_BASE_ADDR, 0, 4}, - {USDHC2_BASE_ADDR, 0, 8}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - * mmc1 USDHC2 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - case 1: - SETUP_IOMUX_PADS(usdhc2_pads); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} - #ifdef CONFIG_ENV_IS_IN_MMC void board_boot_order(u32 *spl_boot_list) { @@ -226,5 +126,4 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[0] = boot_dev; } #endif -#endif /* CONFIG_FSL_ESDHC */ #endif /* CONFIG_SPL_BUILD */ diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index ce7c288803..c147d4a07f 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -40,3 +40,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 94af53e9c7..5f8a574b93 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -38,3 +38,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 0a990d7f75..367dfa1809 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -40,3 +40,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index b88afd7ec6..0c45e066d8 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -215,19 +215,6 @@ # endif # include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# if defined(CONFIG_IMX6UL) -# if defined(CONFIG_TARGET_MX6UL_ISIOT) -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# else -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# endif - -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif /* CONFIG_IMX6UL */ -# endif /* CONFIG_SPL_BUILD */ #endif #endif /* __IMX6_ENGICAM_CONFIG_H */ From 539b1e228f0dda602e4b64ccbdf0d338988dec6c Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:15 +0530 Subject: [PATCH 28/31] board: icore-rqs: Fix mmc get env device As per USDHC boot eFUSE descriptions: USDHC3 => devno 2 USDHC4 => devno 3 Linux will detect mmc0, mmc1, mmc2 based on the status "okay" on usdhc so imx6qdl-icore-rqs.dtsi has enabled usdhc1, usdhc3 and usdhc4.But U-Boot can detect based on the aliases so add mmc1, mmc2 for usdhc3 and usdhc4 respectively and return the board_mmc_get_env_dev by subtracting -1 Signed-off-by: Jagan Teki --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 5 +++++ board/engicam/icorem6_rqs/icorem6_rqs.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 65cbf5abb3..816cdce2f3 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -43,6 +43,11 @@ #include / { + aliases { + mmc1 = &usdhc3; + mmc2 = &usdhc4; + }; + memory { reg = <0x10000000 0x80000000>; }; diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index cd73dfa9ba..a55a754bc7 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_ENV_IS_IN_MMC int board_mmc_get_env_dev(int devno) { - return devno; + return devno - 1; } #endif From 52aaddd6f415397bb2eae0d68a8cc1c5c4a98bb3 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:16 +0530 Subject: [PATCH 29/31] i.MX6: engicam: Add imx6q/imx6ul boards for existing boards Add new board names for existing board support imx6q - icore and icore_rqs boards imx6ul - geam6ul and isiot boards Signed-off-by: Jagan Teki --- arch/arm/mach-imx/mx6/Kconfig | 50 +------ board/engicam/common/board.c | 2 +- board/engicam/common/spl.c | 26 ++++ board/engicam/geam6ul/MAINTAINERS | 8 -- board/engicam/geam6ul/README | 28 ---- board/engicam/icorem6_rqs/Kconfig | 12 -- board/engicam/icorem6_rqs/MAINTAINERS | 9 -- board/engicam/icorem6_rqs/Makefile | 6 - board/engicam/{geam6ul => imx6q}/Kconfig | 4 +- board/engicam/{icorem6 => imx6q}/MAINTAINERS | 8 +- board/engicam/{geam6ul => imx6q}/Makefile | 2 +- board/engicam/{icorem6_rqs => imx6q}/README | 9 +- .../{icorem6/icorem6.c => imx6q/imx6q.c} | 10 +- board/engicam/{icorem6 => imx6ul}/Kconfig | 4 +- .../{isiotmx6ul => imx6ul}/MAINTAINERS | 9 +- board/engicam/{icorem6 => imx6ul}/Makefile | 2 +- board/engicam/{icorem6 => imx6ul}/README | 11 +- .../{geam6ul/geam6ul.c => imx6ul/imx6ul.c} | 9 ++ board/engicam/isiotmx6ul/Kconfig | 12 -- board/engicam/isiotmx6ul/Makefile | 6 - board/engicam/isiotmx6ul/README | 28 ---- board/engicam/isiotmx6ul/isiotmx6ul.c | 129 ------------------ configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_mmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- 30 files changed, 89 insertions(+), 311 deletions(-) delete mode 100644 board/engicam/geam6ul/MAINTAINERS delete mode 100644 board/engicam/geam6ul/README delete mode 100644 board/engicam/icorem6_rqs/Kconfig delete mode 100644 board/engicam/icorem6_rqs/MAINTAINERS delete mode 100644 board/engicam/icorem6_rqs/Makefile rename board/engicam/{geam6ul => imx6q}/Kconfig (73%) rename board/engicam/{icorem6 => imx6q}/MAINTAINERS (58%) rename board/engicam/{geam6ul => imx6q}/Makefile (80%) rename board/engicam/{icorem6_rqs => imx6q}/README (71%) rename board/engicam/{icorem6/icorem6.c => imx6q/imx6q.c} (97%) rename board/engicam/{icorem6 => imx6ul}/Kconfig (72%) rename board/engicam/{isiotmx6ul => imx6ul}/MAINTAINERS (69%) rename board/engicam/{icorem6 => imx6ul}/Makefile (80%) rename board/engicam/{icorem6 => imx6ul}/README (74%) rename board/engicam/{geam6ul/geam6ul.c => imx6ul/imx6ul.c} (95%) delete mode 100644 board/engicam/isiotmx6ul/Kconfig delete mode 100644 board/engicam/isiotmx6ul/Makefile delete mode 100644 board/engicam/isiotmx6ul/README delete mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 412e48e12a..bee7eabe02 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -205,27 +205,8 @@ config TARGET_MX6LOGICPD config TARGET_MX6QARM2 bool "mx6qarm2" -config TARGET_MX6Q_ICORE - bool "Support Engicam i.Core" - select BOARD_LATE_INIT - select MX6QDL - select OF_CONTROL - select SPL_OF_LIBFDT - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL - select SPL_LOAD_FIT - select SPL_DM if SPL - select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL - select SPL_PINCTRL if SPL - -config TARGET_MX6Q_ICORE_RQS - bool "Support Engicam i.Core RQS" +config TARGET_MX6Q_ENGICAM + bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT select MX6QDL select OF_CONTROL @@ -304,25 +285,8 @@ config TARGET_MX6UL_14X14_EVK select DM_THERMAL select SUPPORT_SPL -config TARGET_MX6UL_GEAM - bool "Support Engicam GEAM6UL" - select BOARD_LATE_INIT - select MX6UL - select OF_CONTROL - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL - select SPL_DM if SPL - select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL - select SPL_PINCTRL if SPL - -config TARGET_MX6UL_ISIOT - bool "Support Engicam Is.IoT MX6UL" +config TARGET_MX6UL_ENGICAM + bool "Support Engicam GEAM6UL/Is.IoT" select BOARD_LATE_INIT select MX6UL select OF_CONTROL @@ -474,10 +438,8 @@ source "board/congatec/cgtqmx6eval/Kconfig" source "board/dhelectronics/dh_imx6/Kconfig" source "board/el/el6x/Kconfig" source "board/embest/mx6boards/Kconfig" -source "board/engicam/geam6ul/Kconfig" -source "board/engicam/icorem6/Kconfig" -source "board/engicam/icorem6_rqs/Kconfig" -source "board/engicam/isiotmx6ul/Kconfig" +source "board/engicam/imx6q/Kconfig" +source "board/engicam/imx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6sabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig" diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index f86fb2be42..f633c71916 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -49,7 +49,7 @@ static void setenv_fdt_file(void) } else if (!strcmp(cmp_dtb, "imx6ul-geam-kit")) env_set("fdt_file", "imx6ul-geam-kit.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc")) - env_set("fdt_file", "imx6ul-isiot-mmc.dtb"); + env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc")) env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand")) diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index f8ae3acb0d..6e2389dd4b 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -55,6 +55,32 @@ int board_fit_config_name_match(const char *name) } #endif +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/board/engicam/geam6ul/MAINTAINERS b/board/engicam/geam6ul/MAINTAINERS deleted file mode 100644 index 2b882d245a..0000000000 --- a/board/engicam/geam6ul/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -GEAM6UL BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/geam6ul -F: include/configs/imx6-engicam.h -F: configs/imx6ul_geam_mmc_defconfig -F: configs/imx6ul_geam_nand_defconfig -F: arch/arm/dts/imx6ul-geam-kit.dts diff --git a/board/engicam/geam6ul/README b/board/engicam/geam6ul/README deleted file mode 100644 index 0df6ae4a8c..0000000000 --- a/board/engicam/geam6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam GEAM6UL Starter Kit: -------------------------------------------------- - -- Configure U-Boot for Engicam GEAM6UL: - -$ make mrproper -$ make imx6ul_geam_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/icorem6_rqs/Kconfig b/board/engicam/icorem6_rqs/Kconfig deleted file mode 100644 index 6dc3a076c4..0000000000 --- a/board/engicam/icorem6_rqs/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6Q_ICORE_RQS - -config SYS_BOARD - default "icorem6_rqs" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS deleted file mode 100644 index 9a74265eea..0000000000 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ /dev/null @@ -1,9 +0,0 @@ -ICOREM6QDL_RQS BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/icorem6_rqs -F: include/configs/imx6-engicam.h -F: configs/imx6qdl_icore_rqs_defconfig -F: arch/arm/dts/imx6qdl-icore-rqs.dtsi -F: arch/arm/dts/imx6q-icore-rqs.dts -F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/icorem6_rqs/Makefile b/board/engicam/icorem6_rqs/Makefile deleted file mode 100644 index 2e3933c698..0000000000 --- a/board/engicam/icorem6_rqs/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := icorem6_rqs.o diff --git a/board/engicam/geam6ul/Kconfig b/board/engicam/imx6q/Kconfig similarity index 73% rename from board/engicam/geam6ul/Kconfig rename to board/engicam/imx6q/Kconfig index 7f4023e1ec..48eb60c09a 100644 --- a/board/engicam/geam6ul/Kconfig +++ b/board/engicam/imx6q/Kconfig @@ -1,7 +1,7 @@ -if TARGET_MX6UL_GEAM +if TARGET_MX6Q_ENGICAM config SYS_BOARD - default "geam6ul" + default "imx6q" config SYS_VENDOR default "engicam" diff --git a/board/engicam/icorem6/MAINTAINERS b/board/engicam/imx6q/MAINTAINERS similarity index 58% rename from board/engicam/icorem6/MAINTAINERS rename to board/engicam/imx6q/MAINTAINERS index a348bdde9e..82efb462c0 100644 --- a/board/engicam/icorem6/MAINTAINERS +++ b/board/engicam/imx6q/MAINTAINERS @@ -1,10 +1,14 @@ -ICOREM6QDL BOARD +MX6Q_ENGICAM BOARD M: Jagan Teki S: Maintained -F: board/engicam/icorem6 +F: board/engicam/imx6q F: include/configs/imx6-engicam.h F: configs/imx6qdl_icore_mmc_defconfig F: configs/imx6qdl_icore_nand_defconfig +F: configs/imx6qdl_icore_rqs_defconfig F: arch/arm/dts/imx6qdl-icore.dtsi F: arch/arm/dts/imx6q-icore.dts F: arch/arm/dts/imx6dl-icore.dts +F: arch/arm/dts/imx6qdl-icore-rqs.dtsi +F: arch/arm/dts/imx6q-icore-rqs.dts +F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/geam6ul/Makefile b/board/engicam/imx6q/Makefile similarity index 80% rename from board/engicam/geam6ul/Makefile rename to board/engicam/imx6q/Makefile index 0e367e2172..ef2fb6acaa 100644 --- a/board/engicam/geam6ul/Makefile +++ b/board/engicam/imx6q/Makefile @@ -3,4 +3,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := geam6ul.o +obj-y := imx6q.o diff --git a/board/engicam/icorem6_rqs/README b/board/engicam/imx6q/README similarity index 71% rename from board/engicam/icorem6_rqs/README rename to board/engicam/imx6q/README index 97e978cd6f..3f3478cc89 100644 --- a/board/engicam/icorem6_rqs/README +++ b/board/engicam/imx6q/README @@ -1,9 +1,12 @@ -How to use U-Boot on Engicam i.CoreM6 RQS Solo/DualLite and Quad/Dual Starter Kit: ----------------------------------------------------------------------------------- +Hsow to use U-Boot on Engicam i.CoreM6 (RQS) Solo/DualLite/Quad/Dual Starter Kit: +-------------------------------------------------------------------------------- $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual/Solo/DualLite: +- Configure U-Boot for Engicam i.CoreM6 Quad/Duali/Solo/DualLite: +$ make imx6qdl_icore_mmc_defconfig + +- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Duali/Solo/DualLite: $ make imx6qdl_icore_rqs_defconfig - Build U-Boot diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/imx6q/imx6q.c similarity index 97% rename from board/engicam/icorem6/icorem6.c rename to board/engicam/imx6q/imx6q.c index a967ccd0a7..bb0c866df6 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/imx6q/imx6q.c @@ -25,13 +25,12 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_NAND_MXS - #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) #define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ PAD_CTL_SRE_FAST) #define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) -iomux_v3_cfg_t gpmi_pads[] = { +static iomux_v3_cfg_t gpmi_pads[] = { IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), @@ -190,3 +189,10 @@ void setup_display(void) writel(reg, &iomux->gpr[3]); } #endif /* CONFIG_VIDEO_IPUV3 */ + +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + return devno - 1; +} +#endif diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/imx6ul/Kconfig similarity index 72% rename from board/engicam/icorem6/Kconfig rename to board/engicam/imx6ul/Kconfig index 4a1c9ac436..e91dd15970 100644 --- a/board/engicam/icorem6/Kconfig +++ b/board/engicam/imx6ul/Kconfig @@ -1,7 +1,7 @@ -if TARGET_MX6Q_ICORE +if TARGET_MX6UL_ENGICAM config SYS_BOARD - default "icorem6" + default "imx6ul" config SYS_VENDOR default "engicam" diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/imx6ul/MAINTAINERS similarity index 69% rename from board/engicam/isiotmx6ul/MAINTAINERS rename to board/engicam/imx6ul/MAINTAINERS index 9b66c8db39..37f84f8cc0 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/imx6ul/MAINTAINERS @@ -1,11 +1,14 @@ -ISIOTMX6UL BOARD +MX6UL_ENGICAM BOARD M: Jagan Teki S: Maintained -F: board/engicam/isiotmx6ul +F: board/engicam/imx6ul F: include/configs/imx6-engicam.h -F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_geam_mmc_defconfig +F: configs/imx6ul_geam_nand_defconfig F: configs/imx6ul_isiot_emmc_defconfig +F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_nand_defconfig +F: arch/arm/dts/imx6ul-geam-kit.dts F: arch/arm/dts/imx6ul-isiot.dtsi F: arch/arm/dts/imx6ul-isiot-mmc.dts F: arch/arm/dts/imx6ul-isiot-emmc.dts diff --git a/board/engicam/icorem6/Makefile b/board/engicam/imx6ul/Makefile similarity index 80% rename from board/engicam/icorem6/Makefile rename to board/engicam/imx6ul/Makefile index 9ec9ecdafb..c78c7e40fb 100644 --- a/board/engicam/icorem6/Makefile +++ b/board/engicam/imx6ul/Makefile @@ -3,4 +3,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := icorem6.o +obj-y := imx6ul.o diff --git a/board/engicam/icorem6/README b/board/engicam/imx6ul/README similarity index 74% rename from board/engicam/icorem6/README rename to board/engicam/imx6ul/README index 3779e9665d..1e85f618f1 100644 --- a/board/engicam/icorem6/README +++ b/board/engicam/imx6ul/README @@ -1,10 +1,13 @@ -How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and Quad/Dual Starter Kit: ------------------------------------------------------------------------------ +Hsow to use U-Boot on Engicam GEAM6UL and Is.IoT MX6UL Starter Kit: +------------------------------------------------------------------- $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 Quad/Dual/Solo/DualLite: -$ make imx6qdl_icore_mmc_defconfig +- Configure U-Boot for Engicam GEAM6UL: +$ make imx6ul_geam_mmc_defconfig + +- Configure U-Boot for Engicam Is.IoT MX6UL: +$ make imx6ul_isiot_mmc_defconfig - Build U-Boot $ make diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/imx6ul/imx6ul.c similarity index 95% rename from board/engicam/geam6ul/geam6ul.c rename to board/engicam/imx6ul/imx6ul.c index 23e7e4b0b9..a903a3603b 100644 --- a/board/engicam/geam6ul/geam6ul.c +++ b/board/engicam/imx6ul/imx6ul.c @@ -7,6 +7,7 @@ */ #include +#include #include #include @@ -88,3 +89,11 @@ void setup_gpmi_nand(void) setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); } #endif /* CONFIG_NAND_MXS */ + +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ + return (devno == 0) ? 0 : 1; +} +#endif diff --git a/board/engicam/isiotmx6ul/Kconfig b/board/engicam/isiotmx6ul/Kconfig deleted file mode 100644 index 10c2c50ed7..0000000000 --- a/board/engicam/isiotmx6ul/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6UL_ISIOT - -config SYS_BOARD - default "isiotmx6ul" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/isiotmx6ul/Makefile b/board/engicam/isiotmx6ul/Makefile deleted file mode 100644 index f4f8c780ae..0000000000 --- a/board/engicam/isiotmx6ul/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := isiotmx6ul.o diff --git a/board/engicam/isiotmx6ul/README b/board/engicam/isiotmx6ul/README deleted file mode 100644 index 1d177ac625..0000000000 --- a/board/engicam/isiotmx6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: ------------------------------------------------------ - -- Configure U-Boot for Engicam Is.IoT MX6UL - -$ make mrproper -$ make imx6ul_isiot_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c deleted file mode 100644 index 05d23c2df2..0000000000 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ - -#ifdef CONFIG_ENV_IS_IN_MMC -int board_mmc_get_env_dev(int devno) -{ - /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ - return (devno == 0) ? 0 : 1; -} -#endif - -#ifdef CONFIG_SPL_BUILD -#include - -#ifdef CONFIG_ENV_IS_IN_MMC -void board_boot_order(u32 *spl_boot_list) -{ - u32 bmode = imx6_src_get_boot_mode(); - u8 boot_dev = BOOT_DEVICE_MMC1; - - switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: - /* SD/eSD - BOOT_DEVICE_MMC1 */ - break; - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: - /* MMC/eMMC */ - boot_dev = BOOT_DEVICE_MMC2; - break; - default: - /* Default - BOOT_DEVICE_MMC1 */ - printf("Wrong board boot order\n"); - break; - } - - spl_boot_list[0] = boot_dev; -} -#endif -#endif /* CONFIG_SPL_BUILD */ diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 31cf1e6184..256ccb9b92 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ab8b6d20a7..21cfb85582 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 1e57debf48..6cf985221f 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE_RQS=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index c147d4a07f..b2ac4a276c 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 4e51892cf8..d920af74b9 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 5f8a574b93..72ae08e700 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 367dfa1809..ffd12bf48e 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index dde1cc2b33..aaaf9e6b01 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set From b596df45672917bd18dd8a17e39bf1560fc25e0e Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:17 +0530 Subject: [PATCH 30/31] engicam: imx6q: Return mmc dev 0 for icore icorem6 has sd on usdhci1 which is devno 0 so return proper devno from board_mmc_get_env_dev for icorem6 and icorem_6rqs Signed-off-by: Jagan Teki --- board/engicam/imx6q/imx6q.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/engicam/imx6q/imx6q.c b/board/engicam/imx6q/imx6q.c index bb0c866df6..fe37088b49 100644 --- a/board/engicam/imx6q/imx6q.c +++ b/board/engicam/imx6q/imx6q.c @@ -193,6 +193,7 @@ void setup_display(void) #ifdef CONFIG_ENV_IS_IN_MMC int board_mmc_get_env_dev(int devno) { - return devno - 1; + /* i.CoreM6 RQS has USDHC3 for SD and USDHC4 for eMMC */ + return (devno == 0) ? 0: (devno - 1); } #endif From 5451ca4da99f09bce7a693056865c93c1182f183 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:18 +0530 Subject: [PATCH 31/31] configs: icore-rqs: Enable falcon mode Signed-off-by: Jagan Teki --- configs/imx6qdl_icore_rqs_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 6cf985221f..aaf9646491 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " CONFIG_CRC32_VERIFY=y