From 1d2825aa30b63e01ac353ebf36159fda00e33a05 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 26 Feb 2019 13:43:14 +0200 Subject: [PATCH 1/9] x86: acpi: Add DMA descriptors for SPI5 on Intel Tangier Intel Tangier SoC has a general purpose DMA which can serve to speed up communications on SPI and I2C serial buses. Provide DMA descriptors to utilize this capability in the future. Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index baad98b1c7..8cb6f64b3d 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -179,6 +179,9 @@ Device (PCI0) "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } + + FixedDMA(0x000d, 0x0002, Width32bit, ) + FixedDMA(0x000c, 0x0003, Width32bit, ) }) Method (_CRS, 0, NotSerialized) From c652dd15571e6c7df35ff30eeb8b3e2b7e6300ba Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 26 Feb 2019 13:43:15 +0200 Subject: [PATCH 2/9] x86: acpi: Add DMA descriptors for I2C1 on Intel Tangier Intel Tangier SoC has a general purpose DMA which can serve to speed up communications on SPI and I2C serial buses. Provide DMA descriptors to utilize this capability in the future. Note, I2C6, which is available to user, has no DMA request lines connected. Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng --- .../include/asm/arch-tangier/acpi/southcluster.asl | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index 8cb6f64b3d..8b5b709045 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -222,6 +222,17 @@ Device (PCI0) { Return (STA_VISIBLE) } + + Name (RBUF, ResourceTemplate() + { + FixedDMA(0x0009, 0x0000, Width32bit, ) + FixedDMA(0x0008, 0x0001, Width32bit, ) + }) + + Method (_CRS, 0, NotSerialized) + { + Return (RBUF) + } } Device (I2C6) From edf18a83f8dc993279947cfc7faaba7dedf1ad82 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 28 Feb 2019 17:19:54 +0200 Subject: [PATCH 3/9] x86: acpi: Not every platform has serial console a first device We may not do an assumption that current console device is always a first of UCLASS_SERIAL one. For example, on properly described Intel Edison board the console UART is a third one. Use current serial device as described in global data. Fixes: a61cbad78e67 ("dm: serial: Adjust serial_getinfo() to use proper API") Cc: Simon Glass Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 04058a60d7..270274f6b3 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -347,7 +347,7 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) uint serial_width; int access_size; int space_id; - int ret; + int ret = -ENODEV; /* Fill out header fields */ acpi_fill_header(header, "SPCR"); @@ -355,8 +355,8 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) header->revision = 2; /* Read the device once, here. It is reused below */ - ret = uclass_first_device_err(UCLASS_SERIAL, &dev); - if (!ret) + dev = gd->cur_serial_dev; + if (dev) ret = serial_getinfo(dev, &serial_info); if (ret) serial_info.type = SERIAL_CHIP_UNKNOWN; From ab83e5c1a27461ea57b184fc4bdac4d8d79deb91 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 28 Feb 2019 10:10:06 +0200 Subject: [PATCH 4/9] x86: edison: Use proper number of serial interface The console is actually serial #2. When we would like to enable other ports, this would be not okay to mess up with the ordering. Thus, fix the number of default console interface to be 2. Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/dts/edison.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index ca8dfb4287..c3a7ae467b 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -17,11 +17,11 @@ compatible = "intel,edison"; aliases { - serial0 = &serial0; + serial2 = &serial2; }; chosen { - stdout-path = &serial0; + stdout-path = &serial2; }; cpus { @@ -53,7 +53,7 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; - serial0: serial@ff010180 { + serial2: serial@ff010180 { compatible = "intel,mid-uart"; reg = <0xff010180 0x100>; reg-shift = <0>; From d9b59fc9ae198785c1adce1462bd73ee56465d4e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 28 Feb 2019 10:10:07 +0200 Subject: [PATCH 5/9] x86: edison: Add the rest of UARTs present on board Intel Edison has three UART ports, i.e. port 0 - Bluetooth port 1 - auxiliary, available for general purpose use port 2 - debugging, usually console output is here Enable all of them for future use. Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng --- arch/x86/dts/edison.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index c3a7ae467b..e8564bbb8a 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -17,6 +17,8 @@ compatible = "intel,edison"; aliases { + serial0 = &serial0; + serial1 = &serial1; serial2 = &serial2; }; @@ -53,6 +55,22 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; + serial0: serial@ff010080 { + compatible = "intel,mid-uart"; + reg = <0xff010080 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + + serial1: serial@ff010100 { + compatible = "intel,mid-uart"; + reg = <0xff010100 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + serial2: serial@ff010180 { compatible = "intel,mid-uart"; reg = <0xff010180 0x100>; From 7d0a53a40cee6e40c173b782f26f5a2317cf39b5 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 26 Feb 2019 01:52:19 -0800 Subject: [PATCH 6/9] x86: Make sure i8254 is setup correctly before generating beeps The i8254 timer control IO port (0x43) should be setup correctly by using PIT counter 2 to generate beeps, however in U-Boot other codes like TSC driver utilizes PIT for TSC frequency calibration and configures the counter 2 to a different mode that does not beep. Fix this by always ensuring the PIT counter 2 is correctly initialized so that the i8254 beeper driver works as expected. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- arch/x86/lib/i8254.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c index d0227954b1..0f97538910 100644 --- a/arch/x86/lib/i8254.c +++ b/arch/x86/lib/i8254.c @@ -51,6 +51,10 @@ int i8254_enable_beep(uint frequency_hz) if (!frequency_hz) return -EINVAL; + /* make sure i8254 is setup correctly before generating beeps */ + outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3, + PIT_BASE + PIT_COMMAND); + i8254_set_beep_freq(frequency_hz); setio_8(SYSCTL_PORTB, PORTB_BEEP_ENABLE); From 9b2c8c30668c2d3ea8637cdce436be67241981b3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 26 Feb 2019 01:52:20 -0800 Subject: [PATCH 7/9] x86: Add a dtsi file for the pc speaker The pc speaker driven by the i8254 is generic enough to deserve a single dtsi file to be included by boards that use it. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- arch/x86/dts/pcspkr.dtsi | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 arch/x86/dts/pcspkr.dtsi diff --git a/arch/x86/dts/pcspkr.dtsi b/arch/x86/dts/pcspkr.dtsi new file mode 100644 index 0000000000..934ab1028d --- /dev/null +++ b/arch/x86/dts/pcspkr.dtsi @@ -0,0 +1,5 @@ +/ { + pcspkr { + compatible = "i8254,beeper"; + }; +}; From 8edaf34cfe8b672a4b7e129e8b7c736e12ead24a Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 26 Feb 2019 01:52:21 -0800 Subject: [PATCH 8/9] x86: coreboot: Add the missing pc speaker node in the device tree This is currently missing and without it the i8254 beeper driver won't work. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- arch/x86/dts/coreboot.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index e212f3dc7d..a88da6eafd 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -10,6 +10,7 @@ /include/ "skeleton.dtsi" /include/ "serial.dtsi" /include/ "keyboard.dtsi" +/include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" From 3592965aff313a379f6f10faa05c997391c5dd82 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 26 Feb 2019 01:52:22 -0800 Subject: [PATCH 9/9] x86: crownbay: Enable the beeper sound driver Use the i8254 sound driver to support creating simple beeps. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- arch/x86/dts/crownbay.dts | 1 + configs/crownbay_defconfig | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 2ffcc5f27e..8938a94e77 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -10,6 +10,7 @@ /include/ "skeleton.dtsi" /include/ "serial.dtsi" /include/ "keyboard.dtsi" +/include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 34c2eb323e..e0c98247a7 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y +CONFIG_CMD_SOUND=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -41,6 +42,8 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_E1000=y +CONFIG_SOUND=y +CONFIG_SOUND_I8254=y CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y