at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2. In some cases this this needs to be set to 4. Check the user has set environment mdiv to 4 to change the divisor. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
This commit is contained in:
committed by
Tom Rix
parent
d41768df35
commit
69df282a78
@@ -48,6 +48,7 @@
|
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||
#define CONFIG_MISC_INIT_R /* Call misc_init_r */
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
|
||||
|
||||
Reference in New Issue
Block a user