ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@@ -104,7 +104,11 @@
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#define COUNTER_FREQUENCY 50000000
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#define CONFIG_GICV3
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#define GICD_BASE 0x5fe00000
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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#define GICR_BASE 0x5fe40000
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#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
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#define GICR_BASE 0x5fe80000
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#endif
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#else
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/* Time clock 1MHz */
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#define CONFIG_SYS_TIMER_RATE 1000000
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@@ -270,7 +274,9 @@
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#define CONFIG_SPL_TEXT_BASE 0x00100000
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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#define CONFIG_SPL_STACK (0x30014c00)
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#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
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#define CONFIG_SPL_STACK (0x3001c000)
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#else
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#define CONFIG_SPL_STACK (0x00100000)
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@@ -301,7 +307,11 @@
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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#define CONFIG_SPL_BSS_START_ADDR 0x30012000
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#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
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#define CONFIG_SPL_BSS_START_ADDR 0x30016000
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#endif
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
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#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
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