From f6bc5d17afa9fe12418edaf1fc9f82beeda06132 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Thu, 12 Aug 2021 15:28:31 +0000 Subject: [PATCH 01/19] env: Make _init() expect _INVALID when _IS_NOWHERE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Avoid applying the "fix" introduced by commit 5557eec01cbf ("env: Fix invalid env handling in env_init()") to the environment "nowhere". This is necessary as that commit, by setting the return value of env_init() to -ENOENT if gd->env_valid is ENV_INVALID, forces that function to reset gd->env_valid to ENV_VALID. By doing so, it breaks the assumption (required by ENV_IS_NOWHERE) that gd->env_valid must be ENV_INVALID. This, in turn, results in env_relocate() calling env_load() (it should not), which itself, calls U_BOOT_ENV_LOCATION(nowhere).load() i.e. env_nowhere_load(). That function, being implemented under the assumption mentioned above, calls env_set_default(), which in turn, seeing that gd->env_valid is ENV_VALID (it should not), tries to dereference whatever lies in gd->env_addr (most likely garbage), leading to a faulty memory access. Note that other env_locations might be concerned by this bug but that this commit only intends to fix it for when ENV_IS_NOWHERE. Fixes: 5557eec01cbf ("env: Fix invalid env handling in env_init()") Signed-off-by: Pierre-Clément Tosi --- env/env.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/env/env.c b/env/env.c index e534008006..0a0f234747 100644 --- a/env/env.c +++ b/env/env.c @@ -336,7 +336,7 @@ int env_init(void) debug("%s: Environment %s init done (ret=%d)\n", __func__, drv->name, ret); - if (gd->env_valid == ENV_INVALID) + if (gd->env_valid == ENV_INVALID && drv->location != ENVL_NOWHERE) ret = -ENOENT; } From f050bfacc54deda3598a99645ec90727742494eb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Fri, 27 Aug 2021 18:03:45 +0200 Subject: [PATCH 02/19] armv8/cache.S: Read sysreg fields through ubfx MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Improve the file's readability and conciseness by using the appropriate Aarch64 instruction: ubfx (unsigned bitfield extract). This makes the code easier to follow as it directly manipulates the offsets and widths of the fields read from system registers, as they are expressed in the Standard (ARM ARM). This has the added benefit (albeit arguably negligible) of reducing the final code size. Signed-off-by: Pierre-Clément Tosi --- arch/arm/cpu/armv8/cache.S | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index e04907dd8c..eec2958107 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -27,13 +27,11 @@ ENTRY(__asm_dcache_level) msr csselr_el1, x12 /* select cache level */ isb /* sync change of cssidr_el1 */ mrs x6, ccsidr_el1 /* read the new cssidr_el1 */ - and x2, x6, #7 /* x2 <- log2(cache line size)-4 */ + ubfx x2, x6, #0, #3 /* x2 <- log2(cache line size)-4 */ + ubfx x3, x6, #3, #10 /* x3 <- number of cache ways - 1 */ + ubfx x4, x6, #13, #15 /* x4 <- number of cache sets - 1 */ add x2, x2, #4 /* x2 <- log2(cache line size) */ - mov x3, #0x3ff - and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */ clz w5, w3 /* bit position of #ways */ - mov x4, #0x7fff - and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */ /* x12 <- cache level << 1 */ /* x2 <- line length offset */ /* x3 <- number of cache ways - 1 */ @@ -72,8 +70,7 @@ ENTRY(__asm_dcache_all) mov x1, x0 dsb sy mrs x10, clidr_el1 /* read clidr_el1 */ - lsr x11, x10, #24 - and x11, x11, #0x7 /* x11 <- loc */ + ubfx x11, x10, #24, #3 /* x11 <- loc */ cbz x11, finished /* if loc is 0, exit */ mov x15, lr mov x0, #0 /* start flush at cache level 0 */ @@ -131,8 +128,7 @@ ENDPROC(__asm_invalidate_dcache_all) .pushsection .text.__asm_flush_dcache_range, "ax" ENTRY(__asm_flush_dcache_range) mrs x3, ctr_el0 - lsr x3, x3, #16 - and x3, x3, #0xf + ubfx x3, x3, #16, #4 mov x2, #4 lsl x2, x2, x3 /* cache line size */ @@ -158,7 +154,7 @@ ENDPROC(__asm_flush_dcache_range) .pushsection .text.__asm_invalidate_dcache_range, "ax" ENTRY(__asm_invalidate_dcache_range) mrs x3, ctr_el0 - ubfm x3, x3, #16, #19 + ubfx x3, x3, #16, #4 mov x2, #4 lsl x2, x2, x3 /* cache line size */ From 37479e65a353d6d5328092c092c8dc7dbcd4d001 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pierre-Cl=C3=A9ment=20Tosi?= Date: Fri, 27 Aug 2021 18:04:10 +0200 Subject: [PATCH 03/19] armv8/cache.S: Triple with single instruction MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the current 2-instruction 2-step tripling code by a corresponding single instruction leveraging ARMv8-A's "flexible second operand as a register with optional shift". This has the added benefit (albeit arguably negligible) of reducing the final code size. Fix the comment as the tripled cache level is placed in x12, not x0. Signed-off-by: Pierre-Clément Tosi --- arch/arm/cpu/armv8/cache.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index eec2958107..d1cee23437 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -80,8 +80,7 @@ ENTRY(__asm_dcache_all) /* x15 <- return address */ loop_level: - lsl x12, x0, #1 - add x12, x12, x0 /* x0 <- tripled cache level */ + add x12, x0, x0, lsl #1 /* x12 <- tripled cache level */ lsr x12, x10, x12 and x12, x12, #7 /* x12 <- cache type */ cmp x12, #2 From 270f8710f92fff3911a830b6c0bcb6fd229ccddd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 30 Aug 2021 15:05:23 +0200 Subject: [PATCH 04/19] crc32: Add crc32 implementation using __builtin_aarch64_crc32b ARMv8.0 has optional crc32 instruction for crc32 calculation. The instruction is mandatory since ARMv8.1. The crc32 calculation is faster using the dedicated instruction, e.g. 1.4 GHz iMX8MN gives: => time crc32 0x50000000 0x2000000 time: 0.126 seconds # crc32 instruction time: 0.213 seconds # software crc32 Add implementation using the compiler builtin wrapper for the crc32 instruction and enable it by default, since we don't support any platforms which do not implement this instruction. Signed-off-by: Marek Vasut Cc: Simon Glass [trini: Make crc32_table guarded by CONFIG_ARM64_CRC32] Signed-off-by: Tom Rini --- arch/arm/Kconfig | 10 ++++++++++ arch/arm/Makefile | 4 ++++ lib/crc32.c | 9 ++++++++- 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f0fd57f8d6..95102d386b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -9,6 +9,16 @@ config ARM64 select PHYS_64BIT select SYS_CACHE_SHIFT_6 +config ARM64_CRC32 + bool "Enable support for CRC32 instruction" + depends on ARM64 + default y + help + ARMv8 implements dedicated crc32 instruction for crc32 calculation. + This is faster than software crc32 calculation. This instruction may + not be present on all ARMv8.0, but is always present on ARMv8.1 and + newer. + config POSITION_INDEPENDENT bool "Generate position-independent pre-relocation code" depends on ARM64 || CPU_V7A diff --git a/arch/arm/Makefile b/arch/arm/Makefile index c68e598a67..ce977bf632 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -18,7 +18,11 @@ arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ $(call cc-option, -march=armv7)) arch-$(CONFIG_CPU_V7M) =-march=armv7-m arch-$(CONFIG_CPU_V7R) =-march=armv7-r +ifeq ($(CONFIG_ARM64_CRC32),y) +arch-$(CONFIG_ARM64) =-march=armv8-a+crc +else arch-$(CONFIG_ARM64) =-march=armv8-a +endif # On Tegra systems we must build SPL for the armv4 core on the device # but otherwise we can use the value in CONFIG_SYS_ARM_ARCH diff --git a/lib/crc32.c b/lib/crc32.c index f2acc107fe..5a3127e03a 100644 --- a/lib/crc32.c +++ b/lib/crc32.c @@ -84,7 +84,7 @@ static void __efi_runtime make_crc_table(void) } crc_table_empty = 0; } -#else +#elif !defined(CONFIG_ARM64_CRC32) /* ======================================================================== * Table of CRC-32's of all single-byte values (made by make_crc_table) */ @@ -184,6 +184,12 @@ const uint32_t * ZEXPORT get_crc_table() */ uint32_t __efi_runtime crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) { +#ifdef CONFIG_ARM64_CRC32 + crc = cpu_to_le32(crc); + while (len--) + crc = __builtin_aarch64_crc32b(crc, *buf++); + return le32_to_cpu(crc); +#else const uint32_t *tab = crc_table; const uint32_t *b =(const uint32_t *)buf; size_t rem_len; @@ -221,6 +227,7 @@ uint32_t __efi_runtime crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len) } return le32_to_cpu(crc); +#endif } #undef DO_CRC From 2ddb8fcd2e587f13a9b6f837518e64be6c44c29f Mon Sep 17 00:00:00 2001 From: Artem Lapkin Date: Tue, 31 Aug 2021 18:22:18 +0800 Subject: [PATCH 05/19] image: add lz4 zstd compression magic map Add lz4 and zstd compression magic map. Already can decompress images with lz4 and zstd compression type. Signed-off-by: Artem Lapkin --- common/image.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/image.c b/common/image.c index 59c52a1f9a..e199d61a4c 100644 --- a/common/image.c +++ b/common/image.c @@ -216,6 +216,8 @@ static const struct comp_magic_map image_comp[] = { { IH_COMP_GZIP, "gzip", {0x1f, 0x8b},}, { IH_COMP_LZMA, "lzma", {0x5d, 0x00},}, { IH_COMP_LZO, "lzo", {0x89, 0x4c},}, + { IH_COMP_LZ4, "lz4", {0x04, 0x22},}, + { IH_COMP_ZSTD, "zstd", {0x28, 0xb5},}, { IH_COMP_NONE, "none", {}, }, }; From 8120e0681c342e4951d99b67dd3bcffce5a39a6e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:07 +0200 Subject: [PATCH 06/19] lmb: Always compile arch_lmb_reserve() into U-Boot on arm The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even if CMD_BOOT{I,M,Z} is not enabled. However, the arm32/arm64 variant of arch_lmb_reserve() is only compiled in if CMD_BOOT{I,M,Z} is enabled. This currently does not trigger build error, because there is an empty weak implementation of arch_lmb_reserve(), however that is not the function that should be used on arm32/arm64. Fix this by moving the arch_lmb_reserve() implementation into common code and always compile it in. Reviewed-by: Tom Rini Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Simon Goldschmidt Cc: Tom Rini --- arch/arm/lib/bootm.c | 45 -------------------------------------------- arch/arm/lib/stack.c | 45 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 45 deletions(-) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index f60ee3a7e6..dd6a69315a 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -43,50 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; static struct tag *params; -static ulong get_sp(void) -{ - ulong ret; - - asm("mov %0, sp" : "=r"(ret) : ); - return ret; -} - -void arch_lmb_reserve(struct lmb *lmb) -{ - ulong sp, bank_end; - int bank; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - if (!gd->bd->bi_dram[bank].size || - sp < gd->bd->bi_dram[bank].start) - continue; - /* Watch out for RAM at end of address space! */ - bank_end = gd->bd->bi_dram[bank].start + - gd->bd->bi_dram[bank].size - 1; - if (sp > bank_end) - continue; - if (bank_end > gd->ram_top) - bank_end = gd->ram_top - 1; - - lmb_reserve(lmb, sp, bank_end - sp + 1); - break; - } -} - __weak void board_quiesce_devices(void) { } diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index b03e1cfc80..3f961f4454 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -12,6 +12,7 @@ */ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -33,3 +34,47 @@ int arch_reserve_stacks(void) return 0; } + +static ulong get_sp(void) +{ + ulong ret; + + asm("mov %0, sp" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + ulong sp, bank_end; + int bank; + + /* + * Booting a (Linux) kernel image + * + * Allocate space for command line and board info - the + * address should be as high as possible within the reach of + * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused + * memory, which means far enough below the current stack + * pointer. + */ + sp = get_sp(); + debug("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + if (!gd->bd->bi_dram[bank].size || + sp < gd->bd->bi_dram[bank].start) + continue; + /* Watch out for RAM at end of address space! */ + bank_end = gd->bd->bi_dram[bank].start + + gd->bd->bi_dram[bank].size - 1; + if (sp > bank_end) + continue; + if (bank_end > gd->ram_top) + bank_end = gd->ram_top - 1; + + lmb_reserve(lmb, sp, bank_end - sp + 1); + break; + } +} From cfa1971977bbf2c5c4aa076924ca36f964a16a1a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:08 +0200 Subject: [PATCH 07/19] lmb: Always compile arch_lmb_reserve() into U-Boot on arc The arch_lmb_reserve() is called by lib/lmb.c lmb_reserve_common() even if CMD_BOOTM is not enabled. However, the arc variant of arch_lmb_reserve() is only compiled in if CMD_BOOTM is enabled. This currently does not trigger build error, because there is an empty weak implementation of arch_lmb_reserve(), however that is not the function that should be used on arc. Fix this by moving the arch_lmb_reserve() implementation into common code and always compile it in. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Simon Goldschmidt Cc: Tom Rini --- arch/arc/lib/bootm.c | 30 ------------------------------ arch/arc/lib/cache.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c index 8a8d394a5f..41408c2b46 100644 --- a/arch/arc/lib/bootm.c +++ b/arch/arc/lib/bootm.c @@ -8,42 +8,12 @@ #include #include #include -#include #include #include #include DECLARE_GLOBAL_DATA_PTR; -static ulong get_sp(void) -{ - ulong ret; - - asm("mov %0, sp" : "=r"(ret) : ); - return ret; -} - -void arch_lmb_reserve(struct lmb *lmb) -{ - ulong sp; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); -} - static int cleanup_before_linux(void) { disable_interrupts(); diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index f807cd83d6..4ba180482c 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -820,3 +821,32 @@ void sync_n_cleanup_cache_all(void) __ic_entire_invalidate(); } + +static ulong get_sp(void) +{ + ulong ret; + + asm("mov %0, sp" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + ulong sp; + + /* + * Booting a (Linux) kernel image + * + * Allocate space for command line and board info - the + * address should be as high as possible within the reach of + * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused + * memory, which means far enough below the current stack + * pointer. + */ + sp = get_sp(); + debug("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= 4096; + lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); +} From 1274698d13ce1dfd00275b821b512e17cdc88d98 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:09 +0200 Subject: [PATCH 08/19] lmb: Add generic arch_lmb_reserve_generic() The arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() implementations are all mostly the same, except for a couple of details. Implement a generic arch_lmb_reserve_generic() function which can be parametrized enough to cater for those differences between architectures. This can also be parametrized enough so it can handle cases where U-Boot is not relocated to the end of DRAM e.g. because there is some other reserved memory past U-Boot (e.g. unmovable firmware for coprocessor), it is not relocated at all, and other such use cases. Signed-off-by: Marek Vasut Cc: Alexey Brodkin Cc: Angelo Dureghello Cc: Daniel Schwierzeck Cc: Eugeniy Paltsev Cc: Hai Pham Cc: Michal Simek Cc: Simon Goldschmidt Cc: Tom Rini Cc: Wolfgang Denk Reviewed-by: Tom Rini --- include/lmb.h | 1 + lib/lmb.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/include/lmb.h b/include/lmb.h index 3c4afdf9f0..1984291132 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -122,6 +122,7 @@ lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) void board_lmb_reserve(struct lmb *lmb); void arch_lmb_reserve(struct lmb *lmb); +void arch_lmb_reserve_generic(struct lmb *lmb, ulong sp, ulong end, ulong align); /* Low level functions */ diff --git a/lib/lmb.c b/lib/lmb.c index 7bd1255f7a..793647724c 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -12,6 +12,10 @@ #include #include +#include + +DECLARE_GLOBAL_DATA_PTR; + #define LMB_ALLOC_ANYWHERE 0 static void lmb_dump_region(struct lmb_region *rgn, char *name) @@ -113,6 +117,37 @@ void lmb_init(struct lmb *lmb) lmb->reserved.cnt = 0; } +void arch_lmb_reserve_generic(struct lmb *lmb, ulong sp, ulong end, ulong align) +{ + ulong bank_end; + int bank; + + /* + * Reserve memory from aligned address below the bottom of U-Boot stack + * until end of U-Boot area using LMB to prevent U-Boot from overwriting + * that memory. + */ + debug("## Current stack ends at 0x%08lx ", sp); + + /* adjust sp by 4K to be safe */ + sp -= align; + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + if (!gd->bd->bi_dram[bank].size || + sp < gd->bd->bi_dram[bank].start) + continue; + /* Watch out for RAM at end of address space! */ + bank_end = gd->bd->bi_dram[bank].start + + gd->bd->bi_dram[bank].size - 1; + if (sp > bank_end) + continue; + if (bank_end > end) + bank_end = end - 1; + + lmb_reserve(lmb, sp, bank_end - sp + 1); + break; + } +} + static void lmb_reserve_common(struct lmb *lmb, void *fdt_blob) { arch_lmb_reserve(lmb); From 1f391c34547e79391ad4b167d68351521c49c6d0 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:10 +0200 Subject: [PATCH 09/19] lmb: Switch to generic arch_lmb_reserve_generic() Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to arch_lmb_reserve_generic(). Reviewed-by: Tom Rini Signed-off-by: Marek Vasut Cc: Alexey Brodkin Cc: Angelo Dureghello Cc: Daniel Schwierzeck Cc: Eugeniy Paltsev Cc: Hai Pham Cc: Michal Simek Cc: Simon Goldschmidt Cc: Tom Rini Cc: Wolfgang Denk --- arch/arc/lib/cache.c | 18 +----------------- arch/arm/lib/stack.c | 33 +-------------------------------- arch/m68k/lib/bootm.c | 18 +----------------- arch/microblaze/lib/bootm.c | 28 +--------------------------- arch/mips/lib/bootm.c | 9 +-------- arch/powerpc/lib/bootm.c | 18 ++---------------- 6 files changed, 7 insertions(+), 117 deletions(-) diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index 4ba180482c..4c696cb53a 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -832,21 +832,5 @@ static ulong get_sp(void) void arch_lmb_reserve(struct lmb *lmb) { - ulong sp; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); } diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index 3f961f4454..52d9f15298 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -45,36 +45,5 @@ static ulong get_sp(void) void arch_lmb_reserve(struct lmb *lmb) { - ulong sp, bank_end; - int bank; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - if (!gd->bd->bi_dram[bank].size || - sp < gd->bd->bi_dram[bank].start) - continue; - /* Watch out for RAM at end of address space! */ - bank_end = gd->bd->bi_dram[bank].start + - gd->bd->bi_dram[bank].size - 1; - if (sp > bank_end) - continue; - if (bank_end > gd->ram_top) - bank_end = gd->ram_top - 1; - - lmb_reserve(lmb, sp, bank_end - sp + 1); - break; - } + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); } diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c index 51a6f93858..27729db67e 100644 --- a/arch/m68k/lib/bootm.c +++ b/arch/m68k/lib/bootm.c @@ -32,23 +32,7 @@ static void set_clocks_in_mhz (struct bd_info *kbd); void arch_lmb_reserve(struct lmb *lmb) { - ulong sp; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug ("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 1K to be safe */ - sp -= 1024; - lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp)); + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 1024); } int do_bootm_linux(int flag, int argc, char *const argv[], diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index 6695ac63c7..3a6da6e29f 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -34,33 +34,7 @@ static ulong get_sp(void) void arch_lmb_reserve(struct lmb *lmb) { - ulong sp, bank_end; - int bank; - - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - if (sp < gd->bd->bi_dram[bank].start) - continue; - bank_end = gd->bd->bi_dram[bank].start + - gd->bd->bi_dram[bank].size; - if (sp >= bank_end) - continue; - lmb_reserve(lmb, sp, bank_end - sp); - break; - } + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); } static void boot_jump_linux(bootm_headers_t *images, int flag) diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index fde90fced4..cab8da4860 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -39,14 +39,7 @@ static ulong arch_get_sp(void) void arch_lmb_reserve(struct lmb *lmb) { - ulong sp; - - sp = arch_get_sp(); - debug("## Current stack ends at 0x%08lx\n", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - lmb_reserve(lmb, sp, gd->ram_top - sp); + arch_lmb_reserve_generic(lmb, arch_get_sp(), gd->ram_top, 4096); } static void linux_cmdline_init(void) diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 31c17b5bb3..8d65047aa4 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -119,7 +119,7 @@ static void boot_jump_linux(bootm_headers_t *images) void arch_lmb_reserve(struct lmb *lmb) { phys_size_t bootm_size; - ulong size, sp, bootmap_base; + ulong size, bootmap_base; bootmap_base = env_get_bootm_low(); bootm_size = env_get_bootm_size(); @@ -141,21 +141,7 @@ void arch_lmb_reserve(struct lmb *lmb) lmb_reserve(lmb, base, bootm_size - size); } - /* - * Booting a (Linux) kernel image - * - * Allocate space for command line and board info - the - * address should be as high as possible within the reach of - * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused - * memory, which means far enough below the current stack - * pointer. - */ - sp = get_sp(); - debug("## Current stack ends at 0x%08lx\n", sp); - - /* adjust sp by 4K to be safe */ - sp -= 4096; - lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - sp)); + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); #ifdef CONFIG_MP cpu_mp_lmb_reserve(lmb); From b1d0487cfe8dfaa5c4124bbe504b120b705f2d8e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:11 +0200 Subject: [PATCH 10/19] lmb: arm: Increase LMB alignment to 16k in arch_lmb_reserve_generic() According to input NXP, the 4k alignment is not always sufficient. Currently iMX works around this problem by implementing board specific LMB reservation, however it is likely this could also occur on other systems. Increase the LMB reservation alignment to 16k by default. Signed-off-by: Marek Vasut Cc: Alexey Brodkin Cc: Angelo Dureghello Cc: Daniel Schwierzeck Cc: Eugeniy Paltsev Cc: Hai Pham Cc: Michal Simek Cc: Simon Goldschmidt Cc: Tom Rini Cc: Wolfgang Denk Cc: Ye Li Reviewed-by: Tom Rini --- arch/arm/lib/stack.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index 52d9f15298..656084c7e5 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -45,5 +45,5 @@ static ulong get_sp(void) void arch_lmb_reserve(struct lmb *lmb) { - arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 16384); } From c16de86ec0ac7dc208cd397eeb3f6bdf4406aad7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:12 +0200 Subject: [PATCH 11/19] lmb: Remove imx board_lmb_reserve() This function is clearly architecture specific code, not board specific code. The only difference from the previous arm arch_lmb_reserve() is the extra reservation of 16k of memory below the stack bottom, rather than the 4k. The common code now also uses 16k alignment. Remove this custom implementation, as it now behaves exactly as the common code. Signed-off-by: Marek Vasut Cc: Alexey Brodkin Cc: Angelo Dureghello Cc: Daniel Schwierzeck Cc: Eugeniy Paltsev Cc: Hai Pham Cc: Michal Simek Cc: Simon Goldschmidt Cc: Tom Rini Cc: Wolfgang Denk Cc: Ye Li --- arch/arm/mach-imx/misc.c | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c index d82efa7f8f..09a758ff6e 100644 --- a/arch/arm/mach-imx/misc.c +++ b/arch/arm/mach-imx/misc.c @@ -77,33 +77,3 @@ int mxs_reset_block(struct mxs_register_32 *reg) return 0; } - -static ulong get_sp(void) -{ - ulong ret; - - asm("mov %0, sp" : "=r"(ret) : ); - return ret; -} - -void board_lmb_reserve(struct lmb *lmb) -{ - ulong sp, bank_end; - int bank; - - sp = get_sp(); - debug("## Current stack ends at 0x%08lx ", sp); - - /* adjust sp by 16K to be safe */ - sp -= 4096 << 2; - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - if (sp < gd->bd->bi_dram[bank].start) - continue; - bank_end = gd->bd->bi_dram[bank].start + - gd->bd->bi_dram[bank].size; - if (sp >= bank_end) - continue; - lmb_reserve(lmb, sp, bank_end - sp); - break; - } -} From a02c18f31f8b99418be8b17135c7a10910dc10e8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:13 +0200 Subject: [PATCH 12/19] lmb: nios2: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut Cc: Simon Goldschmidt Cc: Thomas Chou Cc: Tom Rini --- arch/nios2/lib/bootm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c index 5037467151..3cb59bd977 100644 --- a/arch/nios2/lib/bootm.c +++ b/arch/nios2/lib/bootm.c @@ -10,6 +10,9 @@ #include #include #include +#include + +DECLARE_GLOBAL_DATA_PTR; #define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */ @@ -60,3 +63,16 @@ int do_bootm_linux(int flag, int argc, char *const argv[], return 1; } + +static ulong get_sp(void) +{ + ulong ret; + + asm("mov %0, sp" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From 6a0890a61e10d5f8b71e99c7d732bd65cebe31b4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:14 +0200 Subject: [PATCH 13/19] lmb: nds32: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Reviewed-by: Rick Chen Signed-off-by: Marek Vasut Cc: Rick Chen Cc: Simon Goldschmidt Cc: Tom Rini --- arch/nds32/lib/bootm.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c index 4cb0f530ae..a7c8978f23 100644 --- a/arch/nds32/lib/bootm.c +++ b/arch/nds32/lib/bootm.c @@ -245,3 +245,16 @@ static void setup_end_tag(struct bd_info *bd) } #endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */ + +static ulong get_sp(void) +{ + ulong ret; + + asm("move %0, $sp" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From eeaa3fe65270758ab0bdb1515e14f9bf936d3a25 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:15 +0200 Subject: [PATCH 14/19] lmb: riscv: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Reviewed-by: Rick Chen Signed-off-by: Marek Vasut Cc: Atish Patra Cc: Leo Cc: Rick Chen Cc: Simon Goldschmidt Cc: Tom Rini --- arch/riscv/lib/bootm.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index 8dd1820540..ff1bdf7131 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -135,3 +135,16 @@ int do_bootm_vxworks(int flag, int argc, char *const argv[], { return do_bootm_linux(flag, argc, argv, images); } + +static ulong get_sp(void) +{ + ulong ret; + + asm("mv %0, sp" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From 1e0e5577742baece8cc3aac3cf3da61a6b3276b0 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:16 +0200 Subject: [PATCH 15/19] lmb: sh: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). This architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut Cc: Simon Goldschmidt Cc: Tom Rini --- arch/sh/lib/bootm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c index dc94f83785..9b71424dfe 100644 --- a/arch/sh/lib/bootm.c +++ b/arch/sh/lib/bootm.c @@ -12,8 +12,11 @@ #include #include #include +#include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SYS_DEBUG static void hexdump(unsigned char *buf, int len) { @@ -111,3 +114,16 @@ int do_bootm_linux(int flag, int argc, char *const argv[], /* does not return */ return 1; } + +static ulong get_sp(void) +{ + ulong ret; + + asm("mov r15, %0" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From 7996b7e9f5826d172b820cea0d072e68cfe485ba Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:17 +0200 Subject: [PATCH 16/19] lmb: xtensa: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut Cc: Chris Zankel Cc: Simon Goldschmidt Cc: Tom Rini --- arch/xtensa/lib/bootm.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c index bb1e2886ab..277af18168 100644 --- a/arch/xtensa/lib/bootm.c +++ b/arch/xtensa/lib/bootm.c @@ -197,3 +197,15 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) return 1; } +static ulong get_sp(void) +{ + ulong ret; + + asm("mov %0, a1" : "=r"(ret) : ); + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From a69753f31d5863c692522f0b92db6e9cad06d553 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 10 Sep 2021 22:47:18 +0200 Subject: [PATCH 17/19] lmb: x86: Add arch_lmb_reserve() Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). It is rather likely this architecture also needs to cover U-Boot with LMB before booting Linux. Signed-off-by: Marek Vasut Cc: Simon Glass Cc: Simon Goldschmidt Cc: Tom Rini --- arch/x86/lib/bootm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 733dd71257..667e5e689e 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -223,3 +223,21 @@ int do_bootm_linux(int flag, int argc, char *const argv[], return boot_jump_linux(images); } + +static ulong get_sp(void) +{ + ulong ret; + +#if CONFIG_IS_ENABLED(X86_64) + ret = gd->start_addr_sp; +#else + asm("mov %%esp, %0" : "=r"(ret) : ); +#endif + + return ret; +} + +void arch_lmb_reserve(struct lmb *lmb) +{ + arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 4096); +} From df3ab898f644db6d8b7337f0a7f0995ecf41b730 Mon Sep 17 00:00:00 2001 From: Guillaume La Roque Date: Fri, 10 Sep 2021 10:21:06 +0200 Subject: [PATCH 18/19] arm: mediatek: merge board Kconfigs into mach-mediatek On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME variables from defconfig. This is because in board/mediatek/mtXXXX/Kconfig this value was override by default due to the if CONFIG_TARGET_MTXXXX condition. Merge all the Kconfigs to the mach-medatek/Kconfig. This way: - we only define SYS_{SOC,VENDOR} once - all board definitions are in a single place, simplifying the build logic. Signed-off-by: Guillaume La Roque --- arch/arm/mach-mediatek/Kconfig | 42 +++++++++++++++++++++++----- arch/mips/mach-mtmips/Kconfig | 3 ++ arch/mips/mach-mtmips/mt7620/Kconfig | 8 +++++- arch/mips/mach-mtmips/mt7628/Kconfig | 9 +++++- board/mediatek/mt7620/Kconfig | 12 -------- board/mediatek/mt7622/Kconfig | 17 ----------- board/mediatek/mt7623/Kconfig | 13 --------- board/mediatek/mt7628/Kconfig | 12 -------- board/mediatek/mt7629/Kconfig | 17 ----------- board/mediatek/mt8183/Kconfig | 13 --------- board/mediatek/mt8512/Kconfig | 14 ---------- board/mediatek/mt8516/Kconfig | 13 --------- board/mediatek/mt8518/Kconfig | 14 ---------- 13 files changed, 53 insertions(+), 134 deletions(-) delete mode 100644 board/mediatek/mt7620/Kconfig delete mode 100644 board/mediatek/mt7622/Kconfig delete mode 100644 board/mediatek/mt7623/Kconfig delete mode 100644 board/mediatek/mt7628/Kconfig delete mode 100644 board/mediatek/mt7629/Kconfig delete mode 100644 board/mediatek/mt8183/Kconfig delete mode 100644 board/mediatek/mt8512/Kconfig delete mode 100644 board/mediatek/mt8516/Kconfig delete mode 100644 board/mediatek/mt8518/Kconfig diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 134b6b17c2..f79a5c62cd 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -79,12 +79,40 @@ config TARGET_MT8518 endchoice -source "board/mediatek/mt7622/Kconfig" -source "board/mediatek/mt7623/Kconfig" -source "board/mediatek/mt7629/Kconfig" -source "board/mediatek/mt8183/Kconfig" -source "board/mediatek/mt8512/Kconfig" -source "board/mediatek/mt8516/Kconfig" -source "board/mediatek/mt8518/Kconfig" +config SYS_BOARD + string "Board name" + default "mt7622" if TARGET_MT7622 + default "mt7623" if TARGET_MT7623 + default "mt7629" if TARGET_MT7629 + default "mt8183" if TARGET_MT8183 + default "mt8512" if TARGET_MT8512 + default "mt8516" if TARGET_MT8516 + default "mt8518" if TARGET_MT8518 + default "" + help + This option contains information about board name. + Based on this option board// will + be used. + +config SYS_CONFIG_NAME + string "Board configuration name" + default "mt7622" if TARGET_MT7622 + default "mt7623" if TARGET_MT7623 + default "mt7629" if TARGET_MT7629 + default "mt8183" if TARGET_MT8183 + default "mt8512" if TARGET_MT8512 + default "mt8516" if TARGET_MT8516 + default "mt8518" if TARGET_MT8518 + default "" + help + This option contains information about board configuration name. + Based on this option include/configs/.h header + will be used for board configuration. + +config MTK_BROM_HEADER_INFO + string + default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7629 || TARGET_MT7622 + default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 + default "lk=1" if TARGET_MT7623 endif diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index 9f300a98ba..151b004603 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -1,6 +1,9 @@ menu "MediaTek MIPS platforms" depends on ARCH_MTMIPS +config SYS_VENDOR + default "mediatek" if BOARD_MT7628_RFB || BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB + config SYS_MALLOC_F_LEN default 0x1000 diff --git a/arch/mips/mach-mtmips/mt7620/Kconfig b/arch/mips/mach-mtmips/mt7620/Kconfig index 5db83eb9d9..3ca711ad0f 100644 --- a/arch/mips/mach-mtmips/mt7620/Kconfig +++ b/arch/mips/mach-mtmips/mt7620/Kconfig @@ -66,6 +66,12 @@ config CPU_FREQ_MULTI default 6 if CPU_FREQ_600MHZ default 7 if CPU_FREQ_620MHZ -source "board/mediatek/mt7620/Kconfig" +config SYS_CONFIG_NAME + string "Board configuration name" + default "mt7620" if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB + +config SYS_BOARD + string "Board name" + default "mt7620" if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB endif diff --git a/arch/mips/mach-mtmips/mt7628/Kconfig b/arch/mips/mach-mtmips/mt7628/Kconfig index f451c1593f..e7273591bc 100644 --- a/arch/mips/mach-mtmips/mt7628/Kconfig +++ b/arch/mips/mach-mtmips/mt7628/Kconfig @@ -44,8 +44,15 @@ config SPL_UART2_SPIS_PINMUX Select this if the UART2 of your board is connected to GPIO 16/17 (shared with SPIS) rather than the usual GPIO 20/21. +config SYS_BOARD + string "Board name" + default "mt7628" if BOARD_MT7628_RFB + +config SYS_CONFIG_NAME + string "Board configuration name" + default "mt7628" if BOARD_MT7628_RFB + source "board/gardena/smart-gateway-mt7688/Kconfig" -source "board/mediatek/mt7628/Kconfig" source "board/seeed/linkit-smart-7688/Kconfig" source "board/vocore/vocore2/Kconfig" diff --git a/board/mediatek/mt7620/Kconfig b/board/mediatek/mt7620/Kconfig deleted file mode 100644 index b9137adcc9..0000000000 --- a/board/mediatek/mt7620/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB - -config SYS_BOARD - default "mt7620" - -config SYS_VENDOR - default "mediatek" - -config SYS_CONFIG_NAME - default "mt7620" - -endif diff --git a/board/mediatek/mt7622/Kconfig b/board/mediatek/mt7622/Kconfig deleted file mode 100644 index d0abdc0a67..0000000000 --- a/board/mediatek/mt7622/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -if TARGET_MT7622 - -config SYS_BOARD - default "mt7622" - -config SYS_CONFIG_NAME - default "mt7622" - -config MTK_BROM_HEADER_INFO - string - default "lk=1" - -config MTK_BROM_HEADER_INFO - string - default "media=nor" - -endif diff --git a/board/mediatek/mt7623/Kconfig b/board/mediatek/mt7623/Kconfig deleted file mode 100644 index a8c670e71f..0000000000 --- a/board/mediatek/mt7623/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -if TARGET_MT7623 - -config SYS_BOARD - default "mt7623" - -config SYS_CONFIG_NAME - default "mt7623" - -config MTK_BROM_HEADER_INFO - string - default "lk=1" - -endif diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig deleted file mode 100644 index d6b6f9d632..0000000000 --- a/board/mediatek/mt7628/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if BOARD_MT7628_RFB - -config SYS_BOARD - default "mt7628" - -config SYS_VENDOR - default "mediatek" - -config SYS_CONFIG_NAME - default "mt7628" - -endif diff --git a/board/mediatek/mt7629/Kconfig b/board/mediatek/mt7629/Kconfig deleted file mode 100644 index 6055164b52..0000000000 --- a/board/mediatek/mt7629/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -if TARGET_MT7629 - -config SYS_BOARD - default "mt7629" - -config SYS_CONFIG_NAME - default "mt7629" - -config MTK_SPL_PAD_SIZE - hex - default 0x10000 - -config MTK_BROM_HEADER_INFO - string - default "media=nor" - -endif diff --git a/board/mediatek/mt8183/Kconfig b/board/mediatek/mt8183/Kconfig deleted file mode 100644 index b75c3b8d80..0000000000 --- a/board/mediatek/mt8183/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -if TARGET_MT8183 - -config SYS_BOARD - default "mt8183" - -config SYS_CONFIG_NAME - default "mt8183" - -config MTK_BROM_HEADER_INFO - string - default "media=emmc" - -endif diff --git a/board/mediatek/mt8512/Kconfig b/board/mediatek/mt8512/Kconfig deleted file mode 100644 index 87bd1fbe69..0000000000 --- a/board/mediatek/mt8512/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -if TARGET_MT8512 - -config SYS_BOARD - default "mt8512" - -config SYS_CONFIG_NAME - default "mt8512" - - -config MTK_BROM_HEADER_INFO - string - default "media=nor" - -endif diff --git a/board/mediatek/mt8516/Kconfig b/board/mediatek/mt8516/Kconfig deleted file mode 100644 index a87d3872fe..0000000000 --- a/board/mediatek/mt8516/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -if TARGET_MT8516 - -config SYS_BOARD - default "mt8516" - -config SYS_CONFIG_NAME - default "mt8516" - -config MTK_BROM_HEADER_INFO - string - default "media=emmc" - -endif diff --git a/board/mediatek/mt8518/Kconfig b/board/mediatek/mt8518/Kconfig deleted file mode 100644 index 1971c4d8c3..0000000000 --- a/board/mediatek/mt8518/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -if TARGET_MT8518 - -config SYS_BOARD - default "mt8518" - -config SYS_CONFIG_NAME - default "mt8518" - - -config MTK_BROM_HEADER_INFO - string - default "media=nor" - -endif From 8e85f36a8fabb4bd5216f6bfcc9a8224adb63496 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 10 Sep 2021 13:33:35 +0200 Subject: [PATCH 19/19] pci: Fix configuring io/memory base and limit registers of PCI bridges MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved and should be zero. So do not set them to non-zero value. Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers contain information if 64-bit memory addressing is supported. So preserve this information when overwriting these registers. Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information if 32-bit io addressing is supported. So preserve this information and do not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 registers) when it is unsupported. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- drivers/pci/pci_auto.c | 39 +++++++++++++++++++++++++++++---------- 1 file changed, 29 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index b128a05dd3..7b6e629cae 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -165,6 +165,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) struct pci_region *pci_prefetch; struct pci_region *pci_io; u16 cmdstat, prefechable_64; + u8 io_32; struct udevice *ctlr = pci_get_controller(dev); struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); @@ -175,6 +176,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat); dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64); prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK; + dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32); + io_32 &= PCI_IO_RANGE_TYPE_MASK; /* Configure bus number registers */ dm_pci_write_config8(dev, PCI_PRIMARY_BUS, @@ -191,7 +194,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) * I/O space */ dm_pci_write_config16(dev, PCI_MEMORY_BASE, - (pci_mem->bus_lower & 0xfff00000) >> 16); + ((pci_mem->bus_lower & 0xfff00000) >> 16) & + PCI_MEMORY_RANGE_MASK); cmdstat |= PCI_COMMAND_MEMORY; } @@ -205,7 +209,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) * I/O space */ dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, - (pci_prefetch->bus_lower & 0xfff00000) >> 16); + (((pci_prefetch->bus_lower & 0xfff00000) >> 16) & + PCI_PREF_RANGE_MASK) | prefechable_64); if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) #ifdef CONFIG_SYS_PCI_64BIT dm_pci_write_config32(dev, PCI_PREF_BASE_UPPER32, @@ -217,8 +222,10 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) cmdstat |= PCI_COMMAND_MEMORY; } else { /* We don't support prefetchable memory for now, so disable */ - dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0x1000); - dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, 0x0); + dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0x1000 | + prefechable_64); + dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, 0x0 | + prefechable_64); if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) { dm_pci_write_config16(dev, PCI_PREF_BASE_UPPER32, 0x0); dm_pci_write_config16(dev, PCI_PREF_LIMIT_UPPER32, 0x0); @@ -230,8 +237,10 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) pciauto_region_align(pci_io, 0x1000); dm_pci_write_config8(dev, PCI_IO_BASE, - (pci_io->bus_lower & 0x0000f000) >> 8); - dm_pci_write_config16(dev, PCI_IO_BASE_UPPER16, + (((pci_io->bus_lower & 0x0000f000) >> 8) & + PCI_IO_RANGE_MASK) | io_32); + if (io_32 == PCI_IO_RANGE_TYPE_32) + dm_pci_write_config16(dev, PCI_IO_BASE_UPPER16, (pci_io->bus_lower & 0xffff0000) >> 16); cmdstat |= PCI_COMMAND_IO; @@ -261,7 +270,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus) pciauto_region_align(pci_mem, 0x100000); dm_pci_write_config16(dev, PCI_MEMORY_LIMIT, - (pci_mem->bus_lower - 1) >> 16); + ((pci_mem->bus_lower - 1) >> 16) & + PCI_MEMORY_RANGE_MASK); } if (pci_prefetch) { @@ -275,7 +285,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus) pciauto_region_align(pci_prefetch, 0x100000); dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, - (pci_prefetch->bus_lower - 1) >> 16); + (((pci_prefetch->bus_lower - 1) >> 16) & + PCI_PREF_RANGE_MASK) | prefechable_64); if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) #ifdef CONFIG_SYS_PCI_64BIT dm_pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, @@ -286,12 +297,20 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus) } if (pci_io) { + u8 io_32; + + dm_pci_read_config8(dev, PCI_IO_LIMIT, + &io_32); + io_32 &= PCI_IO_RANGE_TYPE_MASK; + /* Round I/O allocator to 4KB boundary */ pciauto_region_align(pci_io, 0x1000); dm_pci_write_config8(dev, PCI_IO_LIMIT, - ((pci_io->bus_lower - 1) & 0x0000f000) >> 8); - dm_pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, + ((((pci_io->bus_lower - 1) & 0x0000f000) >> 8) & + PCI_IO_RANGE_MASK) | io_32); + if (io_32 == PCI_IO_RANGE_TYPE_32) + dm_pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, ((pci_io->bus_lower - 1) & 0xffff0000) >> 16); } }