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mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

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For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.

After commit b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.

Fixes: b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
This commit is contained in:
Haibo Chen
2021-03-03 17:05:46 +08:00
committed by Stefano Babic
parent dec7755c44
commit 63756575b4
2 changed files with 23 additions and 8 deletions
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2
include/fsl_esdhc_imx.h
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@@ -39,6 +39,7 @@
#define VENDORSPEC_HCKEN 0x00001000
#define VENDORSPEC_IPGEN 0x00000800
#define VENDORSPEC_INIT 0x20007809
#define VENDORSPEC_FRC_SDCLK_ON 0x00000100
#define IRQSTAT 0x0002e030
#define IRQSTAT_DMAE (0x10000000)
@@ -96,6 +97,7 @@
#define PRSSTAT_CINS (0x00010000)
#define PRSSTAT_BREN (0x00000800)
#define PRSSTAT_BWEN (0x00000400)
#define PRSSTAT_SDOFF (0x00000080)
#define PRSSTAT_SDSTB (0X00000008)
#define PRSSTAT_DLA (0x00000004)
#define PRSSTAT_CICHB (0x00000002)