configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-12-27 13:53:48 +00:00
parent 968c6210e6
commit 5e2fd60b97
28 changed files with 27 additions and 53 deletions

View File

@@ -95,8 +95,6 @@ CONFIG_CON_ROT
CONFIG_CPLD_BR_PRELIM
CONFIG_CPLD_OR_PRELIM
CONFIG_CPM2
CONFIG_CPU_ARMV8
CONFIG_CPU_FREQ_HZ
CONFIG_CQSPI_REF_CLK
CONFIG_CUSTOMER_BOARD_SUPPORT
CONFIG_DB_784MP_GP
@@ -461,14 +459,12 @@ CONFIG_IRAM_SIZE
CONFIG_IRAM_STACK
CONFIG_IRAM_TOP
CONFIG_IRDA_BASE
CONFIG_JFFS2_PART_SIZE
CONFIG_JRSTARTR_JR0
CONFIG_KEEP_SERVERADDR
CONFIG_KEY_REVOCATION
CONFIG_KIRKWOOD_EGIGA_INIT
CONFIG_KIRKWOOD_PCIE_INIT
CONFIG_KIRKWOOD_RGMII_PAD_1V8
CONFIG_KM8321
CONFIG_KMTEGR1
CONFIG_KM_BOARD_EXTRA_ENV
CONFIG_KM_COGE5UN
@@ -631,7 +627,6 @@ CONFIG_PCI_MEM_BUS
CONFIG_PCI_MEM_PHYS
CONFIG_PCI_MEM_SIZE
CONFIG_PCI_MSC01
CONFIG_PCI_NOSCAN
CONFIG_PCI_OHCI
CONFIG_PCI_PREF_BUS
CONFIG_PCI_PREF_PHYS
@@ -803,7 +798,6 @@ CONFIG_SPL_NAND_INIT
CONFIG_SPL_NAND_MINIMAL
CONFIG_SPL_NAND_RAW_ONLY
CONFIG_SPL_NAND_SOFTECC
CONFIG_SPL_NAND_WORKSPACE
CONFIG_SPL_PAD_TO
CONFIG_SPL_PBL_PAD
CONFIG_SPL_RELOC_MALLOC_ADDR
@@ -1103,7 +1097,6 @@ CONFIG_SYS_EEPROM_WREN
CONFIG_SYS_EHCI_USB1_ADDR
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
CONFIG_SYS_ENET_BD_BASE
CONFIG_SYS_ENV_ADDR
CONFIG_SYS_ENV_SECT_SIZE
CONFIG_SYS_ETHOC_BASE
CONFIG_SYS_ETHOC_BUFFER_ADDR
@@ -1759,7 +1752,6 @@ CONFIG_SYS_PCIE1_MEM_BASE
CONFIG_SYS_PCIE1_MEM_PHYS
CONFIG_SYS_PCIE1_MEM_SIZE
CONFIG_SYS_PCIE1_MEM_VIRT
CONFIG_SYS_PCIE1_NAME
CONFIG_SYS_PCIE1_PHYS_ADDR
CONFIG_SYS_PCIE1_PHYS_BASE
CONFIG_SYS_PCIE1_VIRT_ADDR
@@ -1775,7 +1767,6 @@ CONFIG_SYS_PCIE2_MEM_BASE
CONFIG_SYS_PCIE2_MEM_PHYS
CONFIG_SYS_PCIE2_MEM_SIZE
CONFIG_SYS_PCIE2_MEM_VIRT
CONFIG_SYS_PCIE2_NAME
CONFIG_SYS_PCIE2_PHYS_ADDR
CONFIG_SYS_PCIE2_PHYS_BASE
CONFIG_SYS_PCIE2_VIRT_ADDR
@@ -1784,7 +1775,6 @@ CONFIG_SYS_PCIE3_IO_PHYS
CONFIG_SYS_PCIE3_IO_VIRT
CONFIG_SYS_PCIE3_MEM_PHYS
CONFIG_SYS_PCIE3_MEM_VIRT
CONFIG_SYS_PCIE3_NAME
CONFIG_SYS_PCIE3_PHYS_ADDR
CONFIG_SYS_PCIE3_PHYS_SIZE
CONFIG_SYS_PCIE4_ADDR
@@ -1793,7 +1783,6 @@ CONFIG_SYS_PCIE4_IO_VIRT
CONFIG_SYS_PCIE4_MEM_BUS
CONFIG_SYS_PCIE4_MEM_PHYS
CONFIG_SYS_PCIE4_MEM_VIRT
CONFIG_SYS_PCIE4_NAME
CONFIG_SYS_PCIE4_PHYS_ADDR
CONFIG_SYS_PCIE_MMAP_SIZE
CONFIG_SYS_PCI_IO_BASE