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Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

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This commit is contained in:
Albert ARIBAUD
2013-10-02 08:10:36 +02:00
parent 12eba1b493 827512fb11
commit 5c8d5b6fc1
21 changed files with 629 additions and 31 deletions
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6
include/configs/am335x_evm.h
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@@ -170,6 +170,7 @@
"run mmcboot;" \
"setenv mmcdev 1; " \
"setenv bootpart 1:2; " \
"setenv mmcroot /dev/mmcblk1p2 ro; " \
"run mmcboot;" \
"run nandboot;"
@@ -189,8 +190,13 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_MULTI_EEPROMS
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910
/* SPL */
#ifndef CONFIG_NOR_BOOT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
/* CPSW support */

8
include/configs/dra7xx_evm.h
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@@ -14,7 +14,13 @@
#define CONFIG_DRA7XX
#define CONFIG_ENV_IS_NOWHERE /* For now. */
/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
#define CONFIG_ENV_OFFSET 0xE0000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_CMD_SAVEENV
#define CONSOLEDEV "ttyO0"
#define CONFIG_CONS_INDEX 1

1
include/configs/pcm051.h
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@@ -201,6 +201,7 @@
/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
/*
* Place the image at the start of the ROM defined image space.
* We limit our size to the ROM-defined downloaded image area, and use the

83
include/power/tps65217.h Normal file
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@@ -0,0 +1,83 @@
/*
* (C) Copyright 2011-2013
* Texas Instruments, <www.ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* For more details, please see the TRM at http://www.ti.com/product/tps65217a
*/
#ifndef __POWER_TPS65217_H__
#define __POWER_TPS65217_H__
/* I2C chip address */
#define TPS65217_CHIP_PM 0x24
/* Registers */
enum {
TPS65217_CHIPID = 0x00,
TPS65217_POWER_PATH,
TPS65217_INTERRUPT,
TPS65217_CHGCONFIG0,
TPS65217_CHGCONFIG1,
TPS65217_CHGCONFIG2,
TPS65217_CHGCONFIG3,
TPS65217_WLEDCTRL1,
TPS65217_WLEDCTRL2,
TPS65217_MUXCTRL,
TPS65217_STATUS,
TPS65217_PASSWORD,
TPS65217_PGOOD,
TPS65217_DEFPG,
TPS65217_DEFDCDC1,
TPS65217_DEFDCDC2,
TPS65217_DEFDCDC3,
TPS65217_DEFSLEW,
TPS65217_DEFLDO1,
TPS65217_DEFLDO2,
TPS65217_DEFLS1,
TPS65217_DEFLS2,
TPS65217_ENABLE,
TPS65217_DEFUVLO,
TPS65217_SEQ1,
TPS65217_SEQ2,
TPS65217_SEQ3,
TPS65217_SEQ4,
TPS65217_SEQ5,
TPS65217_SEQ6,
TPS65217_PMIC_NUM_OF_REGS,
};
#define TPS65217_PROT_LEVEL_NONE 0x00
#define TPS65217_PROT_LEVEL_1 0x01
#define TPS65217_PROT_LEVEL_2 0x02
#define TPS65217_PASSWORD_LOCK_FOR_WRITE 0x00
#define TPS65217_PASSWORD_UNLOCK 0x7D
#define TPS65217_DCDC_GO 0x80
#define TPS65217_MASK_ALL_BITS 0xFF
#define TPS65217_USB_INPUT_CUR_LIMIT_MASK 0x03
#define TPS65217_USB_INPUT_CUR_LIMIT_100MA 0x00
#define TPS65217_USB_INPUT_CUR_LIMIT_500MA 0x01
#define TPS65217_USB_INPUT_CUR_LIMIT_1300MA 0x02
#define TPS65217_USB_INPUT_CUR_LIMIT_1800MA 0x03
#define TPS65217_DCDC_VOLT_SEL_1125MV 0x09
#define TPS65217_DCDC_VOLT_SEL_1275MV 0x0F
#define TPS65217_DCDC_VOLT_SEL_1325MV 0x11
#define TPS65217_LDO_MASK 0x1F
#define TPS65217_LDO_VOLTAGE_OUT_1_8 0x06
#define TPS65217_LDO_VOLTAGE_OUT_3_3 0x1F
#define TPS65217_PWR_SRC_USB_BITMASK 0x4
#define TPS65217_PWR_SRC_AC_BITMASK 0x8
int tps65217_reg_read(uchar src_reg, uchar *src_val);
int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
uchar mask);
int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel);
#endif /* __POWER_TPS65217_H__ */

77
include/power/tps65910.h Normal file
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@@ -0,0 +1,77 @@
/*
* (C) Copyright 2011-2013
* Texas Instruments, <www.ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* For more details, please see the TRM at http://www.ti.com/product/tps65910
*/
#ifndef __POWER_TPS65910_H__
#define __POWER_TPS65910_H__
#define MPU 0
#define CORE 1
#define TPS65910_SR_I2C_ADDR 0x12
#define TPS65910_CTRL_I2C_ADDR 0x2D
/* PMIC Register offsets */
enum {
TPS65910_VDD1_REG = 0x21,
TPS65910_VDD1_OP_REG = 0x22,
TPS65910_VDD2_REG = 0x24,
TPS65910_VDD2_OP_REG = 0x25,
TPS65910_DEVCTRL_REG = 0x3F,
};
/* VDD2 & VDD1 control register (VDD2_REG & VDD1_REG) */
#define TPS65910_VGAIN_SEL_MASK (0x3 << 6)
#define TPS65910_ILMAX_MASK (0x1 << 5)
#define TPS65910_TSTEP_MASK (0x7 << 2)
#define TPS65910_ST_MASK (0x3)
#define TPS65910_REG_VGAIN_SEL_X1 (0x0 << 6)
#define TPS65910_REG_VGAIN_SEL_X1_0 (0x1 << 6)
#define TPS65910_REG_VGAIN_SEL_X3 (0x2 << 6)
#define TPS65910_REG_VGAIN_SEL_X4 (0x3 << 6)
#define TPS65910_REG_ILMAX_1_0_A (0x0 << 5)
#define TPS65910_REG_ILMAX_1_5_A (0x1 << 5)
#define TPS65910_REG_TSTEP_ (0x0 << 2)
#define TPS65910_REG_TSTEP_12_5 (0x1 << 2)
#define TPS65910_REG_TSTEP_9_4 (0x2 << 2)
#define TPS65910_REG_TSTEP_7_5 (0x3 << 2)
#define TPS65910_REG_TSTEP_6_25 (0x4 << 2)
#define TPS65910_REG_TSTEP_4_7 (0x5 << 2)
#define TPS65910_REG_TSTEP_3_12 (0x6 << 2)
#define TPS65910_REG_TSTEP_2_5 (0x7 << 2)
#define TPS65910_REG_ST_OFF (0x0)
#define TPS65910_REG_ST_ON_HI_POW (0x1)
#define TPS65910_REG_ST_OFF_1 (0x2)
#define TPS65910_REG_ST_ON_LOW_POW (0x3)
/* VDD2 & VDD1 voltage selection register. (VDD2_OP_REG & VDD1_OP_REG) */
#define TPS65910_OP_REG_SEL (0x7F)
#define TPS65910_OP_REG_CMD_MASK (0x1 << 7)
#define TPS65910_OP_REG_CMD_OP (0x0 << 7)
#define TPS65910_OP_REG_CMD_SR (0x1 << 7)
#define TPS65910_OP_REG_SEL_MASK (0x7F)
#define TPS65910_OP_REG_SEL_0_9_5 (0x1F) /* 0.9500 V */
#define TPS65910_OP_REG_SEL_1_1_3 (0x2E) /* 1.1375 V */
#define TPS65910_OP_REG_SEL_1_2_0 (0x33) /* 1.2000 V */
#define TPS65910_OP_REG_SEL_1_2_6 (0x38) /* 1.2625 V */
#define TPS65910_OP_REG_SEL_1_3_2_5 (0x3D) /* 1.3250 V */
/* Device control register . (DEVCTRL_REG) */
#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_MASK (0x1 << 4)
#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C (0x0 << 4)
#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C (0x1 << 4)
int tps65910_set_i2c_control(void);
int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel);
#endif /* __POWER_TPS65910_H__ */