Tom Rini
2022-09-06 09:01:39 -04:00
8 changed files with 130 additions and 136 deletions

View File

@@ -1,10 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0 OR MIT */
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* Copyright (C) 2020-2021 SiFive, Inc.
* Copyright (C) 2019 SiFive, Inc.
* Wesley Terpstra
* Paul Walmsley
* Zong Li
* Pragnesh Patel
*/
#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H
@@ -12,14 +11,14 @@
/* Clock indexes for use by Device Tree data and the PRCI driver */
#define PRCI_CLK_COREPLL 0
#define PRCI_CLK_DDRPLL 1
#define PRCI_CLK_GEMGXLPLL 2
#define PRCI_CLK_DVFSCOREPLL 3
#define PRCI_CLK_HFPCLKPLL 4
#define PRCI_CLK_CLTXPLL 5
#define PRCI_CLK_TLCLK 6
#define PRCI_CLK_PCLK 7
#define PRCI_CLK_PCIEAUX 8
#define FU740_PRCI_CLK_COREPLL 0
#define FU740_PRCI_CLK_DDRPLL 1
#define FU740_PRCI_CLK_GEMGXLPLL 2
#define FU740_PRCI_CLK_DVFSCOREPLL 3
#define FU740_PRCI_CLK_HFPCLKPLL 4
#define FU740_PRCI_CLK_CLTXPLL 5
#define FU740_PRCI_CLK_TLCLK 6
#define FU740_PRCI_CLK_PCLK 7
#define FU740_PRCI_CLK_PCIE_AUX 8
#endif
#endif /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */