Merge tag 'u-boot-imx-20210303' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
This commit is contained in:
Tom Rini
@@ -21,9 +21,6 @@
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Networking */
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#define FEC_QUIRK_ENET_MAC
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#define FEC_ENET_ENABLE_TXC_DELAY
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#define CONFIG_TFTP_TSIZE
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#define CONFIG_IPADDR 192.168.10.2
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@@ -25,9 +25,6 @@
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_SERVERIP 192.168.10.1
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#define FEC_ENET_ENABLE_TXC_DELAY
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#define FEC_ENET_ENABLE_RXC_DELAY
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#define MEM_LAYOUT_ENV_SETTINGS \
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"kernel_addr_r=0x80280000\0" \
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"fdt_addr_r=0x83100000\0" \
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@@ -143,7 +140,6 @@
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#define CONFIG_FEC_MXC_PHYADDR 0x4
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#define CONFIG_ETHPRIME "eth0"
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define FEC_QUIRK_ENET_MAC
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#define PHY_ANEG_TIMEOUT 20000
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#endif /* __APALIS_IMX8X_H */
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@@ -43,7 +43,6 @@
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/* ENET Config */
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#define CONFIG_FEC_XCV_TYPE RMII
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#define FEC_QUIRK_ENET_MAC
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/* ENET1 connects to base board and MUX with ESAI */
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#define CONFIG_FEC_ENET_DEV 1
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@@ -22,8 +22,6 @@
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Networking */
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#define FEC_QUIRK_ENET_MAC
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#define CONFIG_TFTP_TSIZE
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#define CONFIG_IPADDR 192.168.10.2
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125
include/configs/imx8mm_venice.h
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125
include/configs/imx8mm_venice.h
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@@ -0,0 +1,125 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 Gateworks Corporation
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*/
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#ifndef __IMX8MM_VENICE_H
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#define __IMX8MM_VENICE_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#define CONFIG_SPL_MAX_SIZE (148 * 1024)
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_STACK 0x920000
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#define CONFIG_SPL_BSS_START_ADDR 0x910000
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#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CONFIG_MALLOC_F_ADDR 0x930000
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/* For RAW image gives a error info not panic */
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#endif
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#define MEM_LAYOUT_ENV_SETTINGS \
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"fdt_addr_r=0x44000000\0" \
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"kernel_addr_r=0x42000000\0" \
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"ramdisk_addr_r=0x46400000\0" \
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"scriptaddr=0x46000000\0"
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/* Link Definitions */
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#define CONFIG_LOADADDR 0x40480000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Enable Distro Boot */
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#undef CONFIG_ISO_PARTITION
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#else
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#define BOOTENV
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#endif
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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"script=boot.scr\0" \
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"bootm_size=0x10000000\0" \
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"ipaddr=192.168.1.22\0" \
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"serverip=192.168.1.146\0" \
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"dev=2\0" \
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"preboot=gsc wd-disable\0" \
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"console=ttymxc1,115200\0" \
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"update_firmware=" \
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"tftpboot $loadaddr $image && " \
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"setexpr blkcnt $filesize + 0x1ff && " \
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"setexpr blkcnt $blkcnt / 0x200 && " \
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"mmc dev $dev && " \
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"mmc write $loadaddr 0x42 $blkcnt\0" \
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"boot_net=" \
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"tftpboot $kernel_addr_r $image && " \
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"booti $kernel_addr_r - $fdtcontroladdr\0" \
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"update_rootfs=" \
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"tftpboot $loadaddr $image && " \
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"gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \
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"update_all=" \
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"tftpboot $loadaddr $image && " \
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"gzwrite mmc $dev $loadaddr $filesize\0" \
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"erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0"
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN SZ_32M
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* SDRAM configuration */
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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/* Monitor Command Prompt */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_CBSIZE SZ_2K
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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/* I2C */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* FEC */
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#define CONFIG_ETHPRIME "eth0"
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define FEC_QUIRK_ENET_MAC
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#define IMX_FEC_BASE 0x30BE0000
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#endif
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@@ -126,7 +126,11 @@
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR)
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#else
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#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
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#endif
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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@@ -173,6 +173,5 @@
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/* Networking */
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define FEC_QUIRK_ENET_MAC
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#endif /* __IMX8QM_MEK_H */
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@@ -161,7 +161,6 @@
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/* Networking */
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define FEC_QUIRK_ENET_MAC
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#include <linux/stringify.h>
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#endif /* __IMX8QM_ROM7720_H */
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@@ -177,7 +177,6 @@
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/* Networking */
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define FEC_QUIRK_ENET_MAC
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/* Misc configuration */
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#define CONFIG_SYS_CBSIZE 2048
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@@ -51,14 +51,6 @@
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#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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/*
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* Eth Configs
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*/
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1F
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/* USB Configs */
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
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@@ -30,12 +30,6 @@
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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/* Eth Configs */
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1F
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/* USB Configs */
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@@ -73,11 +73,14 @@
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=PARTUUID=${uuid} rootwait rw\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script} || " \
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"load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \
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"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} || " \
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"load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \
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"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile} || " \
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"load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run finduuid; " \
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"run mmcargs; " \
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