Merge git://git.denx.de/u-boot-sunxi

This commit is contained in:
Tom Rini
2017-10-05 08:26:36 -04:00
220 changed files with 1865 additions and 1137 deletions

View File

@@ -263,12 +263,6 @@
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_USB_MUSB_GADGET */
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
* DM support in SPL

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@@ -55,11 +55,6 @@
#endif /* CONFIG_USB_MUSB_HOST */
#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_USB_MUSB_GADGET */
#endif /* CONFIG_USB_MUSB_AM35X */
/* I2C */

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@@ -89,9 +89,9 @@
#undef CONFIG_USB_GADGET_DOWNLOAD
#undef CONFIG_USB_GADGET_VBUS_DRAW
#undef CONFIG_G_DNL_MANUFACTURER
#undef CONFIG_G_DNL_VENDOR_NUM
#undef CONFIG_G_DNL_PRODUCT_NUM
#undef CONFIG_USB_GADGET_MANUFACTURER
#undef CONFIG_USB_GADGET_VENDOR_NUM
#undef CONFIG_USB_GADGET_PRODUCT_NUM
#undef CONFIG_USB_GADGET_DUALSPEED
#endif

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@@ -73,7 +73,6 @@
#include <configs/ti_omap5_common.h>
/* Enhance our eMMC support / experience. */
#define CONFIG_RANDOM_UUID
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */

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@@ -283,12 +283,6 @@
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_OTG
#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_USB_MUSB_GADGET */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
/* disable host part of MUSB in SPL */
/* disable EFI partitions and partition UUID support */

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@@ -92,7 +92,6 @@
#include <configs/ti_omap5_common.h>
/* Enhance our eMMC support / experience. */
#define CONFIG_RANDOM_UUID
#define CONFIG_HSMMC2_8BIT
/* CPSW Ethernet */

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@@ -13,7 +13,6 @@
#define CONFIG_BOOTCOMMAND "run bootcmd"
/* DISK Partition support */
#define CONFIG_RANDOM_UUID
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP

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@@ -146,8 +146,6 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
/* USB Mass Storage Gadget */

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@@ -123,11 +123,9 @@
"bootm ; "
#define CONFIG_USB_GADGET_PXA2XX
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_SUBSET
#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
#define CONFIG_EXTRA_ENV_SETTINGS \
"stdin=serial\0" \
"stdout=serial\0" \

View File

@@ -100,9 +100,6 @@
#ifdef CONFIG_CMD_USB
/* USB device */
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_MANUFACTURER "AriesEmbedded"
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 * 1024 * 1024)
#define DFU_DEFAULT_POLL_TIMEOUT 300

View File

@@ -19,8 +19,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#define CONFIG_MXC_UART

View File

@@ -129,8 +129,6 @@
#define CONFIG_MXC_USB_FLAGS 0
/* Gadget part */
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#endif

View File

@@ -174,7 +174,6 @@
"fdtaddr=40800000\0"
/* GPT */
#define CONFIG_RANDOM_UUID
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA

View File

@@ -45,7 +45,7 @@
#define DFU_MANIFEST_POLL_TIMEOUT 25000
/* THOR */
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_USB_FUNCTION_THOR

View File

@@ -46,7 +46,6 @@
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_TWL4030_USB 1
#define CONFIG_USB_ETHER
/* USB EHCI */

View File

@@ -81,7 +81,6 @@
#define CONFIG_USB_OMAP3
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_ETHER
/* USB EHCI */
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1

View File

@@ -57,7 +57,6 @@
/* USB */
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_ETHER
/* TWL4030 */
#define CONFIG_TWL4030_USB

View File

@@ -133,11 +133,6 @@
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_USB_MUSB_GADGET */
#define CONFIG_PHY_SMSC
#endif /* ! __CONFIG_PCM051_H */

View File

@@ -27,8 +27,6 @@
func(DHCP, dchp, na)
#endif
#define CONFIG_RANDOM_UUID
#ifdef CONFIG_ARM64
#define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
#else

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@@ -62,9 +62,6 @@
#endif
/* USB device */
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC"
/* Ethernet Hardware */
#define CONFIG_MACB

View File

@@ -39,8 +39,6 @@
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#endif

View File

@@ -178,12 +178,6 @@
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_USB_MUSB_GADGET */
/* USB DRACO ID as default */
#define CONFIG_USBD_HS

View File

@@ -148,7 +148,13 @@
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
/* If we have two devices (most likely eMMC + MMC), favour the eMMC */
#define CONFIG_SYS_MMC_ENV_DEV 1
#else
/* Otherwise, use the only device we have */
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#define CONFIG_SYS_MMC_MAX_DEVICE 4
#elif defined(CONFIG_ENV_IS_NOWHERE)
#define CONFIG_ENV_SIZE (128 << 10)
@@ -382,15 +388,28 @@ extern int soft_i2c_gpio_scl;
"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
BOOTENV_DEV_MMC(MMC, mmc, 0) \
BOOTENV_DEV_MMC(MMC, mmc, 1) \
"bootcmd_mmc_auto=" \
"if test ${mmc_bootdev} -eq 1; then " \
"run bootcmd_mmc1; " \
"run bootcmd_mmc0; " \
"elif test ${mmc_bootdev} -eq 0; then " \
"run bootcmd_mmc0; " \
"run bootcmd_mmc1; " \
"fi\0"
#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
"mmc_auto "
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
#else
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#endif
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif
#ifdef CONFIG_AHCI
@@ -418,7 +437,6 @@ extern int soft_i2c_gpio_scl;
#define BOOT_TARGET_DEVICES(func) \
func(FEL, fel, na) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
BOOT_TARGET_DEVICES_SCSI(func) \
BOOT_TARGET_DEVICES_USB(func) \
func(PXE, pxe, na) \

View File

@@ -212,8 +212,6 @@
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
#define CONFIG_USB_ETHER
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE

View File

@@ -168,7 +168,6 @@
#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
/* GPT */
#define CONFIG_RANDOM_UUID
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA

View File

@@ -150,7 +150,6 @@
"fdtaddr=40800000\0" \
/* GPT */
#define CONFIG_RANDOM_UUID
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA

View File

@@ -62,14 +62,10 @@
#define CONFIG_SYS_MMC_CLK_OD 500000
/* For generating MMC partitions */
#define CONFIG_RANDOM_UUID
#endif
/* USB device */
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_MANUFACTURER "L+G VInCo"
/* Ethernet Hardware */
#define CONFIG_PHY_SMSC

View File

@@ -136,10 +136,6 @@
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01"
#endif

View File

@@ -39,8 +39,6 @@
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#endif

View File

@@ -103,7 +103,6 @@
DFU_ALT_INFO_RAM
#ifndef CONFIG_SPL_BUILD
# define CONFIG_RANDOM_UUID
# define PARTS_DEFAULT \
"partitions=uuid_disk=${uuid_gpt_disk};" \
"name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \

View File

@@ -0,0 +1,127 @@
/*
* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
#define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
#define CLK_CPUX 18
#define CLK_BUS_MIPI_DSI 23
#define CLK_BUS_SS 24
#define CLK_BUS_DMA 25
#define CLK_BUS_MMC0 26
#define CLK_BUS_MMC1 27
#define CLK_BUS_MMC2 28
#define CLK_BUS_NAND 29
#define CLK_BUS_DRAM 30
#define CLK_BUS_HSTIMER 31
#define CLK_BUS_SPI0 32
#define CLK_BUS_SPI1 33
#define CLK_BUS_OTG 34
#define CLK_BUS_EHCI 35
#define CLK_BUS_OHCI 36
#define CLK_BUS_VE 37
#define CLK_BUS_LCD 38
#define CLK_BUS_CSI 39
#define CLK_BUS_DE_BE 40
#define CLK_BUS_DE_FE 41
#define CLK_BUS_GPU 42
#define CLK_BUS_MSGBOX 43
#define CLK_BUS_SPINLOCK 44
#define CLK_BUS_DRC 45
#define CLK_BUS_SAT 46
#define CLK_BUS_CODEC 47
#define CLK_BUS_PIO 48
#define CLK_BUS_I2S0 49
#define CLK_BUS_I2S1 50
#define CLK_BUS_I2C0 51
#define CLK_BUS_I2C1 52
#define CLK_BUS_I2C2 53
#define CLK_BUS_UART0 54
#define CLK_BUS_UART1 55
#define CLK_BUS_UART2 56
#define CLK_BUS_UART3 57
#define CLK_BUS_UART4 58
#define CLK_NAND 59
#define CLK_MMC0 60
#define CLK_MMC0_SAMPLE 61
#define CLK_MMC0_OUTPUT 62
#define CLK_MMC1 63
#define CLK_MMC1_SAMPLE 64
#define CLK_MMC1_OUTPUT 65
#define CLK_MMC2 66
#define CLK_MMC2_SAMPLE 67
#define CLK_MMC2_OUTPUT 68
#define CLK_SS 69
#define CLK_SPI0 70
#define CLK_SPI1 71
#define CLK_I2S0 72
#define CLK_I2S1 73
#define CLK_USB_PHY0 74
#define CLK_USB_PHY1 75
#define CLK_USB_HSIC 76
#define CLK_USB_HSIC_12M 77
#define CLK_USB_OHCI 78
#define CLK_DRAM_VE 80
#define CLK_DRAM_CSI 81
#define CLK_DRAM_DRC 82
#define CLK_DRAM_DE_FE 83
#define CLK_DRAM_DE_BE 84
#define CLK_DE_BE 85
#define CLK_DE_FE 86
#define CLK_LCD_CH0 87
#define CLK_LCD_CH1 88
#define CLK_CSI_SCLK 89
#define CLK_CSI_MCLK 90
#define CLK_VE 91
#define CLK_AC_DIG 92
#define CLK_AC_DIG_4X 93
#define CLK_AVS 94
#define CLK_DSI_SCLK 96
#define CLK_DSI_DPHY 97
#define CLK_DRC 98
#define CLK_GPU 99
#define CLK_ATS 100
#endif /* _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ */

View File

@@ -0,0 +1,87 @@
/*
* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RST_SUN8I_A23_A33_H_
#define _DT_BINDINGS_RST_SUN8I_A23_A33_H_
#define RST_USB_PHY0 0
#define RST_USB_PHY1 1
#define RST_USB_HSIC 2
#define RST_MBUS 3
#define RST_BUS_MIPI_DSI 4
#define RST_BUS_SS 5
#define RST_BUS_DMA 6
#define RST_BUS_MMC0 7
#define RST_BUS_MMC1 8
#define RST_BUS_MMC2 9
#define RST_BUS_NAND 10
#define RST_BUS_DRAM 11
#define RST_BUS_HSTIMER 12
#define RST_BUS_SPI0 13
#define RST_BUS_SPI1 14
#define RST_BUS_OTG 15
#define RST_BUS_EHCI 16
#define RST_BUS_OHCI 17
#define RST_BUS_VE 18
#define RST_BUS_LCD 19
#define RST_BUS_CSI 20
#define RST_BUS_DE_BE 21
#define RST_BUS_DE_FE 22
#define RST_BUS_GPU 23
#define RST_BUS_MSGBOX 24
#define RST_BUS_SPINLOCK 25
#define RST_BUS_DRC 26
#define RST_BUS_SAT 27
#define RST_BUS_LVDS 28
#define RST_BUS_CODEC 29
#define RST_BUS_I2S0 30
#define RST_BUS_I2S1 31
#define RST_BUS_I2C0 32
#define RST_BUS_I2C1 33
#define RST_BUS_I2C2 34
#define RST_BUS_UART0 35
#define RST_BUS_UART1 36
#define RST_BUS_UART2 37
#define RST_BUS_UART3 38
#define RST_BUS_UART4 39
#endif /* _DT_BINDINGS_RST_SUN8I_A23_A33_H_ */