Merge branch 'master' of /home/wd/git/u-boot/custodians

2009-07-13 23:37:59 +02:00
parent 17f098bd4a ed01c4f59d
commit 4b96cb6777
36 changed files with 720 additions and 1136 deletions
--- a/include/asm-sh/clk.h
+++ b/include/asm-sh/clk.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_SH_CLK_H__
+#define __ASM_SH_CLK_H__
+
+static inline unsigned long get_peripheral_clk_rate(void)
+{
+	return CONFIG_SYS_CLK_FREQ;
+}
+
+static inline unsigned long get_tmu0_clk_rate(void)
+{
+	return CONFIG_SYS_CLK_FREQ;
+}
+
+#endif /* __ASM_SH_CLK_H__ */
--- a/include/asm-sh/macro.h
+++ b/include/asm-sh/macro.h
@@ -29,7 +29,7 @@

 .macro	write16, addr, data
 	mov.l \addr ,r1
-	mov.l \data ,r0
+	mov.w \data ,r0
 	mov.w r0, @r1
 .endm

--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -141,7 +141,7 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 #endif	/* __MIGO_R_H */
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -170,7 +170,7 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 #endif	/* __AP325RXA_H */
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@@ -0,0 +1,126 @@
+/*
+ * Configuation settings for the ESPT-GIGA board
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ESPT_H
+#define __ESPT_H
+
+#define CONFIG_SH		1
+#define CONFIG_SH4		1
+#define CONFIG_CPU_SH7763	1
+#define CONFIG_ESPT	1
+#define __LITTLE_ENDIAN		1
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SAVEENV
+
+#define CONFIG_BOOTDELAY        -1
+#define CONFIG_BOOTARGS         "console=ttySC0,115200 root=1f01"
+#define CONFIG_ENV_OVERWRITE    1
+
+#define CONFIG_VERSION_VARIABLE
+#undef  CONFIG_SHOW_BOOT_PROGRESS
+
+/* SCIF */
+#define CONFIG_SCIF_CONSOLE		1
+#define CONFIG_BAUDRATE         115200
+#define CONFIG_CONS_SCIF0		1
+
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE		256	/* Buffer size for input from the Console */
+#define CONFIG_SYS_PBSIZE		256	/* Buffer size for Console output */
+#define CONFIG_SYS_MAXARGS		16	/* max args accepted for monitor commands */
+#define CONFIG_SYS_BARGSIZE	512	/* Buffer size for Boot Arguments
+								passed to kernel */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate
+												settings for this board */
+
+/* SDRAM */
+#define CONFIG_SYS_SDRAM_BASE		(0x8C000000)
+#define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
+#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
+
+/* Flash(NOR) S29JL064H */
+#define CONFIG_SYS_FLASH_BASE		(0xA0000000)
+#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
+#define CONFIG_SYS_MAX_FLASH_BANKS (1)
+#define CONFIG_SYS_MAX_FLASH_SECT  (150)
+
+/* U-boot setting */
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
+#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
+/* Size of DRAM reserved for malloc() use */
+#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	(256)
+#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#undef  CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
+/* Timeout for Flash erase operations (in ms) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
+/* Timeout for Flash write operations (in ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
+/* Timeout for Flash set sector lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
+/* Timeout for Flash clear lock bit operations (in ms) */
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
+/* Use hardware flash sectors protection instead of U-Boot software protection */
+#undef  CONFIG_SYS_FLASH_PROTECTION
+#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
+#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
+/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
+#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
+
+/* Clock */
+#define CONFIG_SYS_CLK_FREQ	66666666
+#define CONFIG_SYS_TMU_CLK_DIV      4
+#define CONFIG_SYS_HZ       1000
+
+/* Ether */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_SH_ETHER 1
+#define CONFIG_SH_ETHER_USE_PORT (1)
+#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
+
+#endif /* __SH7763RDP_H */
--- a/include/configs/mpr2.h
+++ b/include/configs/mpr2.h
@@ -82,8 +82,8 @@

 /* Clocks */
 #define CONFIG_SYS_CLK_FREQ	24000000
-#define TMU_CLK_DIVIDER		4	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 /* UART */
 #define CONFIG_SCIF_CONSOLE	1
--- a/include/configs/ms7720se.h
+++ b/include/configs/ms7720se.h
@@ -101,8 +101,8 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 /* PCMCIA */
 #define CONFIG_IDE_PCMCIA	1
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -128,7 +128,7 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 #endif	/* __MS7722SE_H */
--- a/include/configs/ms7750se.h
+++ b/include/configs/ms7750se.h
@@ -101,7 +101,7 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4
+#define CONFIG_SYS_HZ		1000

 #endif /* __MS7750SE_H */
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -80,8 +80,8 @@
 * SuperH Clock setting
 */
 #define CONFIG_SYS_CLK_FREQ	60000000
-#define TMU_CLK_DIVIDER		4
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4
+#define CONFIG_SYS_HZ		1000
 #define	CONFIG_SYS_PLL_SETTLING_TIME	100/* in us */

 /*
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -121,8 +121,8 @@

 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4
-#define CONFIG_SYS_HZ	(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4
+#define CONFIG_SYS_HZ		1000

 /* PCI Controller */
 #if defined(CONFIG_CMD_PCI)
@@ -144,6 +144,9 @@
 #define CONFIG_PCI_IO_BUS	0xFE200000	/* IO space base address */
 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */
+#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_BUS  CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
 #endif /* CONFIG_CMD_PCI */

 #if defined(CONFIG_CMD_NET)
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -114,8 +114,8 @@

 /* Clock */
 #define CONFIG_SYS_CLK_FREQ	66666666
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ				(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000

 /* Ether */
 #define CONFIG_NET_MULTI 1
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -186,7 +186,7 @@
 /* Board Clock */
 /* The SCIF used external clock. system clock only used timer. */
 #define CONFIG_SYS_CLK_FREQ	50000000
-#define TMU_CLK_DIVIDER		4
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		4
+#define CONFIG_SYS_HZ		1000

 #endif	/* __SH7785LCR_H */