Merge with git://www.denx.de/git/u-boot.git
This commit is contained in:
Peter Pearse
@@ -43,7 +43,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \
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sed13806.o sed156x.o \
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serial.o serial_max3100.o \
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serial_pl010.o serial_pl011.o serial_xuartlite.o \
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sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
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sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
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status_led.o sym53c8xx.o systemace.o ahci.o \
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ti_pci1410a.o tigon3.o tsec.o \
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tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
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@@ -2,9 +2,11 @@ include $(TOPDIR)/config.mk
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LIB := $(obj)libatibiosemu.a
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X86DIR = ./x86emu
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X86DIR = x86emu
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OBJS = atibios.o biosemu.o besys.o bios.o \
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$(shell mkdir -p $(obj)$(X86DIR))
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COBJS = atibios.o biosemu.o besys.o bios.o \
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$(X86DIR)/decode.o \
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$(X86DIR)/ops2.o \
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$(X86DIR)/ops.o \
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@@ -12,19 +14,24 @@ OBJS = atibios.o biosemu.o besys.o bios.o \
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$(X86DIR)/sys.o \
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$(X86DIR)/debug.o
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CFLAGS += -I. -I./include -I$(X86DIR) -I$(TOPDIR)/include \
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \
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-D__PPC__ -D__BIG_ENDIAN__
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CFLAGS += $(EXTRA_CFLAGS)
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HOST_CFLAGS += $(EXTRA_CFLAGS)
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all: $(LIB)
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$(LIB): $(OBJS)
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$(AR) crv $@ $(OBJS)
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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#########################################################################
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.depend: Makefile $(OBJS:.o=.c)
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$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
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include $(SRCTREE)/rules.mk
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sinclude .depend
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sinclude $(obj).depend
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#########################################################################
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@@ -99,7 +99,7 @@ void eth_halt(void);
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static int dm9000_probe(void);
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static u16 phy_read(int);
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static void phy_write(int, u16);
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static u16 read_srom_word(int);
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u16 read_srom_word(int);
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static u8 DM9000_ior(int);
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static void DM9000_iow(int reg, u8 value);
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@@ -537,7 +537,7 @@ eth_rx(void)
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/*
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Read a word data from SROM
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*/
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static u16
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u16
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read_srom_word(int offset)
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{
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DM9000_iow(DM9000_EPAR, offset);
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@@ -547,6 +547,18 @@ read_srom_word(int offset)
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return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8));
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}
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void
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write_srom_word(int offset, u16 val)
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{
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DM9000_iow(DM9000_EPAR, offset);
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DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
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DM9000_iow(DM9000_EPDRL, (val & 0xff));
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DM9000_iow(DM9000_EPCR, 0x12);
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udelay(8000);
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DM9000_iow(DM9000_EPCR, 0);
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}
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/*
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Read a byte from I/O port
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*/
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@@ -28,6 +28,11 @@
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#define PCIAUTO_IDE_MODE_MASK 0x05
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/* the user can define CFG_PCI_CACHE_LINE_SIZE to avoid problems */
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#ifndef CFG_PCI_CACHE_LINE_SIZE
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#define CFG_PCI_CACHE_LINE_SIZE 8
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#endif
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/*
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*
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*/
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@@ -150,7 +155,8 @@ void pciauto_setup_device(struct pci_controller *hose,
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}
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pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
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pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
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pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
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CFG_PCI_CACHE_LINE_SIZE);
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pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
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}
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110
drivers/sil680.c
Normal file
110
drivers/sil680.c
Normal file
@@ -0,0 +1,110 @@
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/*
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* (C) Copyright 2007
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* Gary Jennejohn, DENX Software Engineering, garyj@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/* sil680.c - ide support functions for the Sil0680A controller */
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/*
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* The following parameters must be defined in the configuration file
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* of the target board:
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*
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* #define CFG_IDE_SIL680
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*
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* #define CONFIG_PCI_PNP
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* NOTE it may also be necessary to define this if the default of 8 is
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* incorrect for the target board (e.g. the sequoia board requires 0).
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* #define CFG_PCI_CACHE_LINE_SIZE 0
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*
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* #define CONFIG_CMD_IDE
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* #undef CONFIG_IDE_8xx_DIRECT
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* #undef CONFIG_IDE_LED
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* #undef CONFIG_IDE_RESET
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* #define CONFIG_IDE_PREINIT
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* #define CFG_IDE_MAXBUS 2 - modify to suit
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* #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) - modify to suit
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* #define CFG_ATA_BASE_ADDR 0
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* #define CFG_ATA_IDE0_OFFSET 0
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* #define CFG_ATA_IDE1_OFFSET 0
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* #define CFG_ATA_DATA_OFFSET 0
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* #define CFG_ATA_REG_OFFSET 0
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* #define CFG_ATA_ALT_OFFSET 0x0004
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*
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* The mapping for PCI IO-space.
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* NOTE this is the value for the sequoia board. Modify to suit.
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* #define CFG_PCI0_IO_SPACE 0xE8000000
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*/
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#include <common.h>
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#if defined(CFG_IDE_SIL680)
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#include <ata.h>
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#include <ide.h>
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#include <pci.h>
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extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
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int ide_preinit (void)
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{
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int status;
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pci_dev_t devbusfn;
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int l;
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status = 1;
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for (l = 0; l < CFG_IDE_MAXBUS; l++) {
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ide_bus_offset[l] = -ATA_STATUS;
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}
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devbusfn = pci_find_device (0x1095, 0x0680, 0);
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if (devbusfn != -1) {
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status = 0;
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
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(u32 *) &ide_bus_offset[0]);
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ide_bus_offset[0] &= 0xfffffff8;
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ide_bus_offset[0] += CFG_PCI0_IO_SPACE;
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
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(u32 *) &ide_bus_offset[1]);
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ide_bus_offset[1] &= 0xfffffff8;
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ide_bus_offset[1] += CFG_PCI0_IO_SPACE;
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/* init various things - taken from the Linux driver */
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/* set PIO mode */
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pci_write_config_byte(devbusfn, 0x80, 0x00);
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pci_write_config_byte(devbusfn, 0x84, 0x00);
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/* IDE0 */
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pci_write_config_byte(devbusfn, 0xA1, 0x02);
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pci_write_config_word(devbusfn, 0xA2, 0x328A);
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pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD);
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pci_write_config_dword(devbusfn, 0xA8, 0x43924392);
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pci_write_config_dword(devbusfn, 0xAC, 0x40094009);
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/* IDE1 */
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pci_write_config_byte(devbusfn, 0xB1, 0x02);
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pci_write_config_word(devbusfn, 0xB2, 0x328A);
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pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD);
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pci_write_config_dword(devbusfn, 0xB8, 0x43924392);
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pci_write_config_dword(devbusfn, 0xBC, 0x40094009);
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}
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return (status);
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}
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void ide_set_reset (int flag) {
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return;
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}
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#endif /* CFG_IDE_SIL680 */
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