From 9c2aee1b1943f538e3f38e4884f186033e29831c Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Tue, 10 Dec 2019 16:55:39 +0200 Subject: [PATCH 01/30] drivers: net: fsl_enetc: Pass on primary MAC address to Linux Passes on the primary address used by u-boot to Linux. The code does a DT fix-up for ENETC PFs and sets the primary MAC address in IERB. The address in IERB is restored on ENETC PCI functions at FLR. Signed-off-by: Alex Marginean Reviewed-by: Vladimir Oltean Reviewed-by: Priyanka Jain --- board/freescale/ls1028a/ls1028a.c | 5 +++ drivers/net/fsl_enetc.c | 65 ++++++++++++++++++++++++++++++- drivers/net/fsl_enetc.h | 3 ++ 3 files changed, 72 insertions(+), 1 deletion(-) diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index 1151e77531..c080a6b22e 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -25,6 +25,7 @@ #include #include #include "../common/qixis.h" +#include "../drivers/net/fsl_enetc.h" DECLARE_GLOBAL_DATA_PTR; @@ -162,6 +163,10 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_icid(blob); +#ifdef CONFIG_FSL_ENETC + fdt_fixup_enetc_mac(blob); +#endif + return 0; } #endif diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index 02c1ee70d9..f8fe7d4d8d 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -14,6 +14,69 @@ #include "fsl_enetc.h" +#define ENETC_DRIVER_NAME "enetc_eth" + +/* + * sets the MAC address in IERB registers, this setting is persistent and + * carried over to Linux. + */ +static void enetc_set_ierb_primary_mac(struct udevice *dev, int devfn, + const u8 *enetaddr) +{ +#ifdef CONFIG_ARCH_LS1028A +/* + * LS1028A is the only part with IERB at this time and there are plans to change + * its structure, keep this LS1028A specific for now + */ +#define IERB_BASE 0x1f0800000ULL +#define IERB_PFMAC(pf, vf, n) (IERB_BASE + 0x8000 + (pf) * 0x100 + (vf) * 8 \ + + (n) * 4) + +static int ierb_fn_to_pf[] = {0, 1, 2, -1, -1, -1, 3}; + + u16 lower = *(const u16 *)(enetaddr + 4); + u32 upper = *(const u32 *)enetaddr; + + if (ierb_fn_to_pf[devfn] < 0) + return; + + out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 0), upper); + out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 1), (u32)lower); +#endif +} + +/* sets up primary MAC addresses in DT/IERB */ +void fdt_fixup_enetc_mac(void *blob) +{ + struct pci_child_platdata *ppdata; + struct eth_pdata *pdata; + struct udevice *dev; + struct uclass *uc; + char path[256]; + int offset; + int devfn; + + uclass_get(UCLASS_ETH, &uc); + uclass_foreach_dev(dev, uc) { + if (!dev->driver || !dev->driver->name || + strcmp(dev->driver->name, ENETC_DRIVER_NAME)) + continue; + + pdata = dev_get_platdata(dev); + ppdata = dev_get_parent_platdata(dev); + devfn = PCI_FUNC(ppdata->devfn); + + enetc_set_ierb_primary_mac(dev, devfn, pdata->enetaddr); + + snprintf(path, 256, "/soc/pcie@1f0000000/ethernet@%x,%x", + PCI_DEV(ppdata->devfn), PCI_FUNC(ppdata->devfn)); + offset = fdt_path_offset(blob, path); + if (offset < 0) + continue; + fdt_setprop(blob, offset, "mac-address", pdata->enetaddr, 6); + } +} + /* * Bind the device: * - set a more explicit name on the interface @@ -551,7 +614,7 @@ static const struct eth_ops enetc_ops = { }; U_BOOT_DRIVER(eth_enetc) = { - .name = "enetc_eth", + .name = ENETC_DRIVER_NAME, .id = UCLASS_ETH, .bind = enetc_bind, .probe = enetc_probe, diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h index 9a36cdad80..48c3005cb3 100644 --- a/drivers/net/fsl_enetc.h +++ b/drivers/net/fsl_enetc.h @@ -227,4 +227,7 @@ int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int addr, int devad, int enetc_mdio_write_priv(struct enetc_mdio_priv *priv, int addr, int devad, int reg, u16 val); +/* sets up primary MAC addresses in DT/IERB */ +void fdt_fixup_enetc_mac(void *blob); + #endif /* _ENETC_H */ From 43202be27d77b9e9b2f3706af61a6b35bc8a1fc1 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Mon, 16 Dec 2019 15:07:32 +0800 Subject: [PATCH 02/30] configs: ls1046afwry: Enable usb network cards support Enable RTL8152, AX88179 and AX8817X USB network cards support for ls1046afrwy Signed-off-by: Yinbo Zhu Reviewed-by: Priyanka Jain --- configs/ls1046afrwy_tfa_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index d572e4df4e..96efee6736 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -56,5 +56,9 @@ CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y From afa65fb782830adf617666d60ebfe1933a5bb03a Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Mon, 16 Dec 2019 15:07:33 +0800 Subject: [PATCH 03/30] configs: ls1088ardb: Enable usb network cards support Enable RTL8152, AX88179 and AX8817X USB network cards support for ls1088ardb Signed-off-by: Yinbo Zhu Reviewed-by: Priyanka Jain --- configs/ls1088ardb_tfa_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index ccbf1c6625..829dcc6052 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -72,4 +72,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_GADGET=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_RTL8152=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y From d2f11d7a074ebc36f6e93994c9f05eb3cc0521e0 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Mon, 16 Dec 2019 15:07:34 +0800 Subject: [PATCH 04/30] configs: ls1012afwry: Enable usb network cards support Enable RTL8152, AX88179 and AX8817X USB network cards support for ls1012afwry Signed-off-by: Yinbo Zhu Reviewed-by: Priyanka Jain --- configs/ls1012afrwy_tfa_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 5ac35a4b15..ca732c4b48 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -55,4 +55,8 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_XHCI_DWC3=y From f8203e3bb5f99c88199769034fe0f0af2879b96b Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Tue, 17 Dec 2019 10:10:40 +0000 Subject: [PATCH 05/30] pci: layerscape: Fix the disabling of Expansion ROM BAR The software will still get non-zero Expansion ROM BAR size even when the BAR_EN bit is cleared. The BAR_EN bit of register EXP_ROM_BAR_MASK_RC is not working as expected, so this patch changes to mask all the bits. Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM") Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 47394bdba7..22d10cf737 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -325,7 +325,7 @@ static void ls_pcie_disable_bars(struct ls_pcie *pcie) dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_0); dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); - dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_ROM_ADDRESS1); + dbi_writel(pcie, 0xfffffffe, PCIE_CS2_OFFSET + PCI_ROM_ADDRESS1); } static void ls_pcie_setup_ctrl(struct ls_pcie *pcie) From 282d992e1a66ecd8e8cca74e0759b7e5b6516e40 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Tue, 17 Dec 2019 10:10:43 +0000 Subject: [PATCH 06/30] pci: layerscape: Fix the BARs disable function There is not any difference for disabling BARs in RC mode between PCIe controllers with and without SRIOV. Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM") Signed-off-by: Hou Zhiqiang Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 22d10cf737..2ab67d1fc9 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -312,17 +312,6 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) /* Disable all bars in RC mode */ static void ls_pcie_disable_bars(struct ls_pcie *pcie) { - u32 sriov; - - sriov = in_le32(pcie->dbi + PCIE_SRIOV); - - /* - * TODO: For PCIe controller with SRIOV, the method to disable bars - * is different and more complex, so will add later. - */ - if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) - return; - dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_0); dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); dbi_writel(pcie, 0xfffffffe, PCIE_CS2_OFFSET + PCI_ROM_ADDRESS1); From 054f474eaead35ff751f7323cdc5094c63c751d8 Mon Sep 17 00:00:00 2001 From: Pramod Kumar Date: Fri, 20 Dec 2019 11:19:55 +0000 Subject: [PATCH 07/30] board: ls1046afwry: Disable sgmii support LS1046A SoC serdes protocol 0x3040 supports both sgmi and qsgmii, however ls1046afrwy supports only qsgmii on board. So, disable unsupported sgmii on board. Signed-off-by: Pramod Kumar Signed-off-by: Priyanka Jain --- board/freescale/ls1046afrwy/eth.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/ls1046afrwy/eth.c b/board/freescale/ls1046afrwy/eth.c index 9f8bd92850..d38e4d7ac7 100644 --- a/board/freescale/ls1046afrwy/eth.c +++ b/board/freescale/ls1046afrwy/eth.c @@ -53,6 +53,8 @@ int board_eth_init(bd_t *bis) fm_info_set_mdio(FM1_DTSEC10, dev); fm_info_set_mdio(FM1_DTSEC1, dev); + fm_disable_port(FM1_DTSEC9); + cpu_eth_init(bis); #endif From ee5c70b8f74e4676327c9415cb8a36a7a7f35d8f Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 20 Dec 2019 14:16:47 +0100 Subject: [PATCH 08/30] drivers: net: fsl_enetc: use write_hwaddr() Intead of setting the MAC address in enetc_start() use the proper write_hwaddr(). U-Boot takes care of the random MAC address, too. Signed-off-by: Michael Walle Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- drivers/net/fsl_enetc.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index f8fe7d4d8d..7c0ed9f606 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -330,14 +330,19 @@ static int enetc_remove(struct udevice *dev) return 0; } -/* ENETC Port MAC address registers, accepts big-endian format */ -static void enetc_set_primary_mac_addr(struct enetc_priv *priv, const u8 *addr) +static int enetc_write_hwaddr(struct udevice *dev) { + struct eth_pdata *plat = dev_get_platdata(dev); + struct enetc_priv *priv = dev_get_priv(dev); + u8 *addr = plat->enetaddr; + u16 lower = *(const u16 *)(addr + 4); u32 upper = *(const u32 *)addr; enetc_write_port(priv, ENETC_PSIPMAR0, upper); enetc_write_port(priv, ENETC_PSIPMAR1, lower); + + return 0; } /* Configure port parameters (# of rings, frame size, enable port) */ @@ -468,7 +473,6 @@ static void enetc_setup_rx_bdr(struct udevice *dev) */ static int enetc_start(struct udevice *dev) { - struct eth_pdata *plat = dev_get_platdata(dev); struct enetc_priv *priv = dev_get_priv(dev); /* reset and enable the PCI device */ @@ -476,12 +480,6 @@ static int enetc_start(struct udevice *dev) dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - if (!is_valid_ethaddr(plat->enetaddr)) { - enetc_dbg(dev, "invalid MAC address, generate random ...\n"); - net_random_ethaddr(plat->enetaddr); - } - enetc_set_primary_mac_addr(priv, plat->enetaddr); - enetc_enable_si_port(priv); /* setup Tx/Rx buffer descriptors */ @@ -611,6 +609,7 @@ static const struct eth_ops enetc_ops = { .send = enetc_send, .recv = enetc_recv, .stop = enetc_stop, + .write_hwaddr = enetc_write_hwaddr, }; U_BOOT_DRIVER(eth_enetc) = { From 42c66f057f6f35b4e3463a4ba37c7460cab48964 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Fri, 20 Dec 2019 14:16:48 +0100 Subject: [PATCH 09/30] drivers: net: fsl_enetc: add write_hwaddr() for LS1028A The LS1028A SoC is special in the handling of the MAC addresses. We need to write to the IERB version of the PSIPMAR0/1 register. This value will be sampled into the corresponding port PSIPMAR0/1 register if the PCI memory access is enabled. Signed-off-by: Michael Walle Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- drivers/net/fsl_enetc.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index 7c0ed9f606..2ffab1bb14 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -330,12 +330,50 @@ static int enetc_remove(struct udevice *dev) return 0; } +/* + * LS1028A is the only part with IERB at this time and there are plans to + * change its structure, keep this LS1028A specific for now. + */ +#define LS1028A_IERB_BASE 0x1f0800000ULL +#define LS1028A_IERB_PSIPMAR0(pf, vf) (LS1028A_IERB_BASE + 0x8000 \ + + (pf) * 0x100 + (vf) * 8) +#define LS1028A_IERB_PSIPMAR1(pf, vf) (LS1028A_IERB_PSIPMAR0(pf, vf) + 4) + +static int enetc_ls1028a_write_hwaddr(struct udevice *dev) +{ + struct pci_child_platdata *ppdata = dev_get_parent_platdata(dev); + const int devfn_to_pf[] = {0, 1, 2, -1, -1, -1, 3}; + struct eth_pdata *plat = dev_get_platdata(dev); + int devfn = PCI_FUNC(ppdata->devfn); + u8 *addr = plat->enetaddr; + u32 lower, upper; + int pf; + + if (devfn >= ARRAY_SIZE(devfn_to_pf)) + return 0; + + pf = devfn_to_pf[devfn]; + if (pf < 0) + return 0; + + lower = *(const u16 *)(addr + 4); + upper = *(const u32 *)addr; + + out_le32(LS1028A_IERB_PSIPMAR0(pf, 0), upper); + out_le32(LS1028A_IERB_PSIPMAR1(pf, 0), lower); + + return 0; +} + static int enetc_write_hwaddr(struct udevice *dev) { struct eth_pdata *plat = dev_get_platdata(dev); struct enetc_priv *priv = dev_get_priv(dev); u8 *addr = plat->enetaddr; + if (IS_ENABLED(CONFIG_ARCH_LS1028A)) + return enetc_ls1028a_write_hwaddr(dev); + u16 lower = *(const u16 *)(addr + 4); u32 upper = *(const u32 *)addr; From d085c9ad06e9c98a94985772685ea1df6befed99 Mon Sep 17 00:00:00 2001 From: Ran Wang Date: Thu, 26 Dec 2019 18:11:17 +0800 Subject: [PATCH 10/30] armv8: ls1012a: Make USB masters snoopable Program register bit of SCFG_SNPCNFGCR_USBRDSNP and SCFG_SNPCNFGCR_USBWRSNP to drive USB read/write snoop signal on LS1012A. Signed-off-by: Ran Wang Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 2175266a30..d0e10cb007 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -647,6 +647,11 @@ void fsl_lsch2_early_init_f(void) SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP | SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP | SCFG_SNPCNFGCR_SATAWRSNP); +#elif defined(CONFIG_ARCH_LS1012A) + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | + SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP | + SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_SATARDSNP | + SCFG_SNPCNFGCR_SATAWRSNP); #else setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP | From 1185b229cca55a5ce3ee7bb35b203f788254f1a1 Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Mon, 6 Jan 2020 12:05:57 +0000 Subject: [PATCH 11/30] pci: layerscape: Common device tree fixup for NXP SoCs Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup. Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + drivers/pci/Makefile | 5 ++-- drivers/pci/pcie_layerscape_fixup.c | 7 ++--- drivers/pci/pcie_layerscape_fixup_common.c | 27 ++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 20 +++++++++++++++ drivers/pci/pcie_layerscape_gen4_fixup.c | 7 ++--- 9 files changed, 62 insertions(+), 8 deletions(-) create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 6c6631f13d..3507fd4b8e 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -55,6 +55,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index ad8156144f..d0783cb5d6 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -57,6 +57,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index fe8154b002..02abfc49cb 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -51,6 +51,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index b7c0e32d44..17a7f9d04e 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -56,6 +56,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 8a33eb0266..c051ecc9f3 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -34,9 +34,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o +obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \ - pcie_layerscape_gen4_fixup.o pcie_layerscape.o + pcie_layerscape_gen4_fixup.o \ + pcie_layerscape_fixup_common.o obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 27ef20d4c3..e77404cd01 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017-2019 NXP + * Copyright 2017-2020 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -17,6 +17,7 @@ #include #endif #include "pcie_layerscape.h" +#include "pcie_layerscape_fixup_common.h" #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) } /* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { struct ls_pcie *pcie; @@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd) } #else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c new file mode 100644 index 0000000000..b32236e5f8 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2020 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan + * + */ + +#include +#include +#include +#include "pcie_layerscape_fixup_common.h" + +void ft_pci_setup(void *blob, bd_t *bd) +{ +#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4) + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0)) + ft_pci_setup_ls_gen4(blob, bd); + else +#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ + ft_pci_setup_ls(blob, bd); +} diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h new file mode 100644 index 0000000000..be729b6fb0 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019-2020 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan + * + */ +#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ +#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ + +#include + +void ft_pci_setup_ls(void *blob, bd_t *bd); + +#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); +#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ + +#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index da9817159f..b99ab0fa5d 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR X11 /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP * * PCIe Gen4 driver for NXP Layerscape SoCs * Author: Hou Zhiqiang @@ -19,6 +19,7 @@ #include #endif #include "pcie_layerscape_gen4.h" +#include "pcie_layerscape_fixup_common.h" #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) } /* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { struct ls_pcie_g4 *pcie; @@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd) } #else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { } #endif From d20eb7a6db2e297cd16a85cdbef9c183abdade1c Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Mon, 6 Jan 2020 12:05:59 +0000 Subject: [PATCH 12/30] pci: layerscape: Move streamId allocation to common device tree fixup Move streamId allocation to layerscape common device tree fixup. Calculate streamId based on SoC variant. Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape_fixup.c | 15 +++----------- drivers/pci/pcie_layerscape_fixup_common.c | 24 ++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 1 + drivers/pci/pcie_layerscape_gen4_fixup.c | 17 +++------------ 4 files changed, 31 insertions(+), 26 deletions(-) diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index e77404cd01..56de6d97be 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie) return -ENOSPC; /* LUT is full */ } -/* returns the next available streamid for pcie, -errno if failed */ -static int ls_pcie_next_streamid(void) -{ - static int next_stream_id = FSL_PEX_STREAM_ID_START; - - if (next_stream_id > FSL_PEX_STREAM_ID_END) - return -EINVAL; - - return next_stream_id++; -} - static void lut_writel(struct ls_pcie *pcie, unsigned int value, unsigned int offset) { @@ -192,10 +181,12 @@ static void fdt_fixup_pcie_ls(void *blob) bus = bus->parent; pcie = dev_get_priv(bus); - streamid = ls_pcie_next_streamid(); + streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx); if (streamid < 0) { debug("ERROR: no stream ids free\n"); continue; + } else { + pcie->stream_id_cur++; } index = ls_pcie_next_lut_index(pcie); diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index b32236e5f8..828dfff03f 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -25,3 +25,27 @@ void ft_pci_setup(void *blob, bd_t *bd) #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ ft_pci_setup_ls(blob, bd); } + +#if defined(CONFIG_FSL_LAYERSCAPE) +#ifdef CONFIG_ARCH_LX2160A +/* returns the next available streamid for pcie, -errno if failed */ +int pcie_next_streamid(int currentid, int idx) +{ + if (currentid > FSL_PEX_STREAM_ID_END) + return -EINVAL; + + return currentid | ((idx + 1) << 11); +} +#else +/* returns the next available streamid for pcie, -errno if failed */ +int pcie_next_streamid(int currentid, int idx) +{ + static int next_stream_id = FSL_PEX_STREAM_ID_START; + + if (next_stream_id > FSL_PEX_STREAM_ID_END) + return -EINVAL; + + return next_stream_id++; +} +#endif +#endif /* CONFIG_FSL_LAYERSCAPE */ diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h index be729b6fb0..ecf4f44089 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.h +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -16,5 +16,6 @@ void ft_pci_setup_ls(void *blob, bd_t *bd); #ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ +int pcie_next_streamid(int currentid, int id); #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index b99ab0fa5d..bfe197e7d8 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -33,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie) return -ENOSPC; /* LUT is full */ } -/* returns the next available streamid for pcie, -errno if failed */ -static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie) -{ - int stream_id = pcie->stream_id_cur; - - if (stream_id > FSL_PEX_STREAM_ID_END) - return -EINVAL; - - pcie->stream_id_cur++; - - return stream_id | ((pcie->idx + 1) << 11); -} - /* * Program a single LUT entry */ @@ -162,10 +149,12 @@ static void fdt_fixup_pcie_ls_gen4(void *blob) bus = bus->parent; pcie = dev_get_priv(bus); - streamid = ls_pcie_g4_next_streamid(pcie); + streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx); if (streamid < 0) { debug("ERROR: no stream ids free\n"); continue; + } else { + pcie->stream_id_cur++; } index = ls_pcie_g4_next_lut_index(pcie); From 9c2969e92cdf57c73d6667bed10fa23e3489b055 Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Mon, 6 Jan 2020 12:06:00 +0000 Subject: [PATCH 13/30] pci: layerscape: device tree fixup based on SoC and lx2160a rev1 requires layerscape_gen4 device tree fixup and lx2160a rev2 requires layerscape device tree fixup. Add device tree fixup for lx2160a based on SoC and Version. Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- drivers/pci/pcie_layerscape_fixup.c | 1 + drivers/pci/pcie_layerscape_fixup_common.c | 73 ++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 1 + 3 files changed, 75 insertions(+) diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 56de6d97be..ec6acbb138 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -207,6 +207,7 @@ static void fdt_fixup_pcie_ls(void *blob) fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8, streamid); } + pcie_board_fix_fdt(blob); } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index 828dfff03f..b010a6300c 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -27,6 +27,79 @@ void ft_pci_setup(void *blob, bd_t *bd) } #if defined(CONFIG_FSL_LAYERSCAPE) +int lx2_board_fix_fdt(void *fdt) +{ + char *reg_name, *old_str, *new_str; + const char *reg_names; + int names_len, old_str_len, new_str_len, remaining_str_len; + struct str_map { + char *old_str; + char *new_str; + } reg_names_map[] = { + { "csr_axi_slave", "regs" }, + { "config_axi_slave", "config" } + }; + int off = -1, i; + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); + while (off != -FDT_ERR_NOTFOUND) { + fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie", + strlen("fsl,ls2088a-pcie") + 1); + + reg_names = fdt_getprop(fdt, off, "reg-names", &names_len); + if (!reg_names) + continue; + reg_name = (char *)reg_names; + remaining_str_len = names_len - (reg_name - reg_names); + i = 0; + while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) { + old_str = reg_names_map[i].old_str; + new_str = reg_names_map[i].new_str; + old_str_len = strlen(old_str); + new_str_len = strlen(new_str); + if (memcmp(reg_name, old_str, old_str_len) == 0) { + /* first only leave required bytes for new_str + * and copy rest of the string after it + */ + memcpy(reg_name + new_str_len, + reg_name + old_str_len, + remaining_str_len - old_str_len); + + /* Now copy new_str */ + memcpy(reg_name, new_str, new_str_len); + names_len -= old_str_len; + names_len += new_str_len; + i++; + } + + reg_name = memchr(reg_name, '\0', remaining_str_len); + if (!reg_name) + break; + reg_name += 1; + + remaining_str_len = names_len - (reg_name - reg_names); + } + fdt_setprop(fdt, off, "reg-names", reg_names, names_len); + fdt_delprop(fdt, off, "apio-wins"); + fdt_delprop(fdt, off, "ppio-wins"); + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie"); + } + return 0; +} + +int pcie_board_fix_fdt(void *fdt) +{ + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0)) + return lx2_board_fix_fdt(fdt); + + return 0; +} + #ifdef CONFIG_ARCH_LX2160A /* returns the next available streamid for pcie, -errno if failed */ int pcie_next_streamid(int currentid, int idx) diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h index ecf4f44089..e1970a5790 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.h +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -17,5 +17,6 @@ void ft_pci_setup_ls(void *blob, bd_t *bd); void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); #endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */ int pcie_next_streamid(int currentid, int id); +int pcie_board_fix_fdt(void *fdt); #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ From b91f739bb073ef3620d9ea64729400f2afd3989c Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Mon, 6 Jan 2020 12:06:02 +0000 Subject: [PATCH 14/30] configs: lx2160a: enable CONFIG_OF_BOARD_FIXUP for SECURE_BOOT defconfig lx2160a rev1 and rev2 SoC has different pcie controller. The pcie controller device tree node fields "compatible" and registers names needs to be updated accordingly. Enable CONFIG_OF_BOARD_FIXUP to apply board_fix_fdt which updates the "compatible" and registers names. Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 3507fd4b8e..1832e3fe26 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 02abfc49cb..01a356f3fe 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD_FIXUP=y CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y From a393629c7c444ee57918d06fce61afb6d8d4eb0c Mon Sep 17 00:00:00 2001 From: Xiaowei Bao Date: Wed, 8 Jan 2020 14:29:54 +0800 Subject: [PATCH 15/30] board/lx2160aqds: Update the DSPI status fixup The dts node of the DSPI controller in kernel is spi instead of dspi, it is not correct if use "/soc/dspi@" to fix up the status of the dts in kernel, so, modify it to "/soc/spi@". The DSPI2 and I2C5 are muxed, and the status of DSPI2 node in kernel dts default value is okay, So set the status of DSPI2 node in kernel dts to disabled if it is muxed as I2C5. Signed-off-by: Xiaowei Bao Reviewed-by: Priyanka Jain --- board/freescale/lx2160a/lx2160a.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 7536153433..3dfc56df7c 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -191,9 +191,9 @@ void esdhc_dspi_status_fixup(void *blob) { const char esdhc0_path[] = "/soc/esdhc@2140000"; const char esdhc1_path[] = "/soc/esdhc@2150000"; - const char dspi0_path[] = "/soc/dspi@2100000"; - const char dspi1_path[] = "/soc/dspi@2110000"; - const char dspi2_path[] = "/soc/dspi@2120000"; + const char dspi0_path[] = "/soc/spi@2100000"; + const char dspi1_path[] = "/soc/spi@2110000"; + const char dspi2_path[] = "/soc/spi@2120000"; struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); u32 sdhc1_base_pmux; @@ -243,10 +243,12 @@ void esdhc_dspi_status_fixup(void *blob) & FSL_CHASSIS3_IIC5_PMUX_MASK; iic5_pmux >>= FSL_CHASSIS3_IIC5_PMUX_SHIFT; - if (iic5_pmux == IIC5_PMUX_SPI3) { + if (iic5_pmux == IIC5_PMUX_SPI3) do_fixup_by_path(blob, dspi2_path, "status", "okay", sizeof("okay"), 1); - } + else + do_fixup_by_path(blob, dspi2_path, "status", "disabled", + sizeof("disabled"), 1); } #endif From 6ce26f8fd310f7ce5236983778ab423c7bf44fa5 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 8 Jan 2020 19:46:45 +0900 Subject: [PATCH 16/30] ARM: LS1021A: remove redundant "depends on ARCH_LS1021A" These config entries are inside the menu block, which already depends on ARCH_LS1021A: menu "LS102xA architecture" depends on ARCH_LS1021A Signed-off-by: Masahiro Yamada Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv7/ls102xa/Kconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 57d7fd9e55..937989b278 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -29,11 +29,9 @@ menu "LS102xA architecture" config LS1_DEEP_SLEEP bool "Deep sleep" - depends on ARCH_LS1021A config MAX_CPUS int "Maximum number of CPUs permitted for LS102xA" - depends on ARCH_LS1021A default 2 help Set this number to the maximum number of possible CPUs in the SoC. @@ -98,7 +96,6 @@ config SYS_HAS_SERDES config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" - depends on ARCH_LS1021A default 8 config SYS_FSL_ERRATUM_A008407 From 0b7435107b6b376e4f458db986fe17b14a7e85f7 Mon Sep 17 00:00:00 2001 From: Pramod Kumar Date: Thu, 9 Jan 2020 08:53:16 +0000 Subject: [PATCH 17/30] armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port LS1088A has four personalities, LS1088A, LS1084A, LS1048A and LS1044A. LS1044A, LS1048A are LS1088A personalities, which support only one 1x 10GE port. MAC1 and MAC2 are associated with 1G SGMII, 2.5G SGMII, and XFI. Disable MAC1 to have only one 1x 10GE port for LS1044A, LS1048A. Signed-off-by: Pramod Kumar Signed-off-by: Priyanka Jain --- .../cpu/armv8/fsl-layerscape/ls1088a_serdes.c | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c index 8e8b45ad9b..280afbbf98 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c @@ -1,10 +1,12 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017 NXP + * Copyright 2017-2019 NXP */ #include #include +#include +#include struct serdes_config { u8 ip_protocol; @@ -32,6 +34,7 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0x3A, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 3, 3 } }, {} }; + static struct serdes_config serdes2_cfg_tbl[] = { /* SerDes 2 */ {0x0C, {PCIE1, PCIE1, PCIE1, PCIE1 }, {8, 8, 8, 8 } }, @@ -48,6 +51,15 @@ static struct serdes_config *serdes_cfg_tbl[] = { serdes2_cfg_tbl, }; +bool soc_has_mac1(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + unsigned int svr = gur_in32(&gur->svr); + unsigned int version = SVR_SOC_VER(svr); + + return (version == SVR_LS1088A || version == SVR_LS1084A); +} + int serdes_get_number(int serdes, int cfg) { struct serdes_config *ptr; @@ -87,7 +99,14 @@ enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; - + /* + * LS1044A/1048A support only one XFI port + * Disable MAC1 for LS1044A/1048A + */ + if (serdes == FSL_SRDS_1 && lane == 2) { + if (!soc_has_mac1()) + return 0; + } ptr = serdes_cfg_tbl[serdes]; while (ptr->ip_protocol) { if (ptr->ip_protocol == cfg) From 63d3464d2e72158e2d6f20c187be0a066b5d8577 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Fri, 10 Jan 2020 17:16:04 +0800 Subject: [PATCH 18/30] include/configs: ls1012ardb: adjust kernel_addr_r The linux kernel Image is growing quite quickly, if kernel Image size grow beyond 36 MB then kernel Image at load address 0x81000000 overlaps with the reserved memory region at 0x83400000. Adjust kernel load address(kernel_addr_r) from 0x81000000 to 0x96000000 to avoid kernel Image overlapping with reserved memory region. This change fixes the below U-Boot error while booting uncompressed kernel Image through booti command, ERROR: reserving fdt memory region failed (addr=83400000 size=c00000) Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- include/configs/ls1012ardb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 0341495dfb..b419c46829 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -69,7 +69,7 @@ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ - "kernel_addr_r=0x81000000\0" \ + "kernel_addr_r=0x96000000\0" \ "fdt_addr_r=0x90000000\0" \ "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ From f0d4cd4307ba7b90bd2cf18ef14bb84a95c7c01c Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Fri, 10 Jan 2020 17:16:05 +0800 Subject: [PATCH 19/30] include/configs: ls1012afrwy: adjust kernel_addr_r The linux kernel Image is growing quite quickly, if kernel Image size grow beyond 36 MB then kernel Image at load address 0x81000000 overlaps with the reserved memory region at 0x83400000. Adjust kernel load address(kernel_addr_r) from 0x81000000 to 0x96000000 to avoid kernel Image overlapping with reserved memory region. This change fixes the below U-Boot error while booting uncompressed kernel Image through booti command, ERROR: reserving fdt memory region failed (addr=83400000 size=c00000) Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- include/configs/ls1012afrwy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c0519e3c11..dde4369c97 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -63,7 +63,7 @@ "fdtheader_addr_r=0x80100000\0" \ "kernelheader_addr_r=0x80200000\0" \ "kernelheader_size=0x40000\0" \ - "kernel_addr_r=0x81000000\0" \ + "kernel_addr_r=0x96000000\0" \ "fdt_addr_r=0x90000000\0" \ "load_addr=0x96000000\0" \ "kernel_size=0x2800000\0" \ From 69b3894e6fe91d260cac1a7ab34f16c4a0c92f66 Mon Sep 17 00:00:00 2001 From: Meenakshi Aggarwal Date: Fri, 10 Jan 2020 20:13:19 +0530 Subject: [PATCH 20/30] lx2160: Correct default environment variable Create separate "boot_scripts" and "boot_script_hdr" environment variable for LX2160A RDB and QDS board. Signed-off-by: Meenakshi Aggarwal Reviewed-by: Priyanka Jain --- include/configs/lx2160a_common.h | 4 +--- include/configs/lx2160aqds.h | 4 +++- include/configs/lx2160ardb.h | 4 +++- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index cd3e2c4c85..02cccff0c8 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #ifndef __LX2_COMMON_H @@ -229,8 +229,6 @@ unsigned long get_board_ddr_clk(void); BOOTENV \ "mcmemsize=0x70000000\0" \ XSPI_MC_INIT_CMD \ - "boot_scripts=lx2160ardb_boot.scr\0" \ - "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \ "scan_dev_for_boot_part=" \ "part list ${devtype} ${devnum} devplist; " \ "env exists devplist || setenv devplist 1; " \ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 662e601f0f..f25cab18ae 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #ifndef __LX2_QDS_H @@ -120,6 +120,8 @@ u8 qixis_esdhc_detect_quirk(void); #define CONFIG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ "lx2160aqds_vdd_mv=800\0" \ + "boot_scripts=lx2160aqds_boot.scr\0" \ + "boot_script_hdr=hdr_lx2160aqds_bs.out\0" \ "BOARD=lx2160aqds\0" \ "xspi_bootcmd=echo Trying load from flexspi..;" \ "sf probe 0:0 && sf read $load_addr " \ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index c6bacb65ec..de385f82c8 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018 NXP + * Copyright 2018,2020 NXP */ #ifndef __LX2_RDB_H @@ -89,6 +89,8 @@ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ + "boot_scripts=lx2160ardb_boot.scr\0" \ + "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \ "lx2160ardb_vdd_mv=800\0" \ "BOARD=lx2160ardb\0" \ "xspi_bootcmd=echo Trying load from flexspi..;" \ From b8e4eec79cb4e4c9a08084050a2111d13aa6a260 Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Fri, 10 Jan 2020 23:32:20 +0200 Subject: [PATCH 21/30] drivers: net: fsl_enetc: fix SXGMII MAC configuration Separate MAC and serdes configuration, MAC configuration must be applied at each enetc_start() as FLR clears it. This restores traffic for ENETC interfaces in USXGMII mode. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- drivers/net/fsl_enetc.c | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index 2ffab1bb14..f0d15febcc 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -185,16 +185,34 @@ static int enetc_init_rgmii(struct udevice *dev) return 0; } -/* set up MAC and serdes for SXGMII */ -static int enetc_init_sxgmii(struct udevice *dev) +/* set up MAC configuration for the given interface type */ +static void enetc_setup_mac_iface(struct udevice *dev) { struct enetc_priv *priv = dev_get_priv(dev); u32 if_mode; - /* set ifmode to (US)XGMII */ - if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE); - if_mode &= ~ENETC_PM_IF_IFMODE_MASK; - enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode); + switch (priv->if_type) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + enetc_init_rgmii(dev); + break; + case PHY_INTERFACE_MODE_XGMII: + case PHY_INTERFACE_MODE_USXGMII: + case PHY_INTERFACE_MODE_XFI: + /* set ifmode to (US)XGMII */ + if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE); + if_mode &= ~ENETC_PM_IF_IFMODE_MASK; + enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode); + break; + }; +} + +/* set up serdes for SXGMII */ +static int enetc_init_sxgmii(struct udevice *dev) +{ + struct enetc_priv *priv = dev_get_priv(dev); if (!enetc_has_imdio(dev)) return 0; @@ -524,11 +542,7 @@ static int enetc_start(struct udevice *dev) enetc_setup_tx_bdr(dev); enetc_setup_rx_bdr(dev); - if (priv->if_type == PHY_INTERFACE_MODE_RGMII || - priv->if_type == PHY_INTERFACE_MODE_RGMII_ID || - priv->if_type == PHY_INTERFACE_MODE_RGMII_RXID || - priv->if_type == PHY_INTERFACE_MODE_RGMII_TXID) - enetc_init_rgmii(dev); + enetc_setup_mac_iface(dev); if (priv->phy) phy_startup(priv->phy); From 430a5542f33153b30a283c1d28d92f5826b176a1 Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Fri, 10 Jan 2020 23:51:32 +0200 Subject: [PATCH 22/30] armv8: ls1028a_serdes: Add few missing serdes protocols Add serdes protocol 0x7777, 0x9999, 0xb998, 0xbb56 to supported list. These protocols are supported and functional but they trigger a warning in U-Boot console at boot because they are not on this list. Signed-off-by: Alex Marginean Signed-off-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 313f3f1e8a..80d2910f67 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -35,6 +35,10 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} }, {0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} }, {0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} }, + {0x7777, {SGMII1, SGMII2, SGMII3, SGMII4} }, + {0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} }, + {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} }, + {0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} }, {} }; From 2a322ff8121b66db138c74c1b6b657e326f60a8b Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Sat, 11 Jan 2020 01:05:36 +0200 Subject: [PATCH 23/30] board: fsl: lx2160a: free up arch_misc_init Currently LX2 board code uses arch_misc_init to set up the board mux on RDB and QDS. Move this code to misc_init_r. This is consistent with LS gen 2 and T series SoCs/boards. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- arch/arm/Kconfig | 2 -- board/freescale/lx2160a/lx2160a.c | 4 ++-- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + 6 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9608f54804..291f6275f7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1235,7 +1235,6 @@ config TARGET_LS2081ARDB config TARGET_LX2160ARDB bool "Support lx2160ardb" select ARCH_LX2160A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT @@ -1249,7 +1248,6 @@ config TARGET_LX2160ARDB config TARGET_LX2160AQDS bool "Support lx2160aqds" select ARCH_LX2160A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 3dfc56df7c..0b0d6bf91a 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -582,8 +582,8 @@ void detail_board_ddr_info(void) print_ddr_info(0); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) { config_board_mux(); diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 1832e3fe26..87f193f4fc 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index d0783cb5d6..c9a6ffb284 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 01a356f3fe..92020cbf8d 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 17a7f9d04e..b998cb64dd 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y From 196ada6a6906a85c73b1a68acd5eb403224b04e2 Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Sat, 11 Jan 2020 01:05:37 +0200 Subject: [PATCH 24/30] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init The arch_misc_init function is empty on LS2 SoCs/boards, remove it. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- arch/arm/Kconfig | 5 ----- board/freescale/ls2080a/ls2080a.c | 7 ------- board/freescale/ls2080aqds/ls2080aqds.c | 7 ------- board/freescale/ls2080ardb/ls2080ardb.c | 7 ------- 4 files changed, 26 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 291f6275f7..84bbf4dae4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1141,7 +1141,6 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2080A_EMU bool "Support ls2080a_emu" select ARCH_LS2080A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select FSL_DDR_SYNC_REFRESH @@ -1154,7 +1153,6 @@ config TARGET_LS2080A_EMU config TARGET_LS2080A_SIMU bool "Support ls2080a_simu" select ARCH_LS2080A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select BOARD_LATE_INIT @@ -1183,7 +1181,6 @@ config TARGET_LS1088AQDS config TARGET_LS2080AQDS bool "Support ls2080aqds" select ARCH_LS2080A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT @@ -1202,7 +1199,6 @@ config TARGET_LS2080AQDS config TARGET_LS2080ARDB bool "Support ls2080ardb" select ARCH_LS2080A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT @@ -1221,7 +1217,6 @@ config TARGET_LS2080ARDB config TARGET_LS2081ARDB bool "Support ls2081ardb" select ARCH_LS2080A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select BOARD_LATE_INIT diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 949b57c24e..f144bf6b37 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -49,13 +49,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - int board_eth_init(bd_t *bis) { int error = 0; diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 5792a564bc..4034bdee28 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -289,13 +289,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) void fdt_fixup_board_enet(void *fdt) { diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 6a1b8e3f53..282aaf47fb 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -318,13 +318,6 @@ void detail_board_ddr_info(void) #endif } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #ifdef CONFIG_FSL_MC_ENET void fdt_fixup_board_enet(void *fdt) { From 9d7df5015d0a91edf43460ce66ac71120cf0ccbc Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Sat, 11 Jan 2020 01:05:38 +0200 Subject: [PATCH 25/30] board: fsl: ls1088a: remove empty arch_misc_init The arch_misc_init function is empty on LS108x SoCs/boards, remove it. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- arch/arm/Kconfig | 2 -- board/freescale/ls1088a/ls1088a.c | 7 ------- 2 files changed, 9 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 84bbf4dae4..4f7a2928ea 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1165,7 +1165,6 @@ config TARGET_LS2080A_SIMU config TARGET_LS1088AQDS bool "Support ls1088aqds" select ARCH_LS1088A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT @@ -1387,7 +1386,6 @@ config TARGET_LS1028ARDB config TARGET_LS1088ARDB bool "Support ls1088ardb" select ARCH_LS1088A - select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 4ecf6dce68..0bd397a0be 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -811,13 +811,6 @@ void detail_board_ddr_info(void) print_ddr_info(0); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) -{ - return 0; -} -#endif - #ifdef CONFIG_FSL_MC_ENET void board_quiesce_devices(void) { From a2a1474674df7c924d7a328b6afb665ab7c4a26a Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Sat, 11 Jan 2020 01:05:39 +0200 Subject: [PATCH 26/30] board: fsl: ls1028a: free up arch_misc_init Currently LS1028A board code uses arch_misc_init to set up the board mux on QDS. Move this code to misc_init_r. This is consistent with LS gen 2 and T series SoCs/boards. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- arch/arm/Kconfig | 1 - board/freescale/ls1028a/ls1028a.c | 4 ++-- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4f7a2928ea..1236315168 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1364,7 +1364,6 @@ config TARGET_LS1028AQDS select ARMV8_MULTIENTRY select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT - select ARCH_MISC_INIT help Support for Freescale LS1028AQDS platform The LS1028A Development System (QDS) is a high-performance diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index c080a6b22e..aa93534ac6 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -109,8 +109,8 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } -#if defined(CONFIG_ARCH_MISC_INIT) -int arch_misc_init(void) +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) { config_board_mux(); diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 67994f59c6..427beb0dc5 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y CONFIG_CMD_GPT=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 67e5af2cc8..3418818e99 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y CONFIG_CMD_GPT=y From 0d9d557de58c3e61f01e053d320ff2e8719336dc Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Sat, 11 Jan 2020 01:05:40 +0200 Subject: [PATCH 27/30] arch: armv8: fsl-layerscape: export serdes config to environment Exports the serdes configuration as an environment variable for LS gen 3 SoCs, so it can be used in u-boot command line. It should particularly be useful for applying Linux DT overlays for the given serdes configuration. This code is called from arch_misc_init and not from the existing serdes_init function because it depends on U-Boot environment being set up. Signed-off-by: Alex Marginean Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++ .../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 59 +++++++++++++++++++ .../include/asm/arch-fsl-layerscape/config.h | 2 + 4 files changed, 76 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index ed478ddd48..e2b92f0eab 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -242,6 +242,7 @@ config FSL_LSCH2 select SYS_FSL_SEC_BE config FSL_LSCH3 + select ARCH_MISC_INIT bool config NXP_LSCH3_2 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index dce915a2ea..b443894453 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1632,3 +1632,17 @@ __weak int dram_init(void) return 0; } + +#ifdef CONFIG_ARCH_MISC_INIT +__weak int serdes_misc_init(void) +{ + return 0; +} + +int arch_misc_init(void) +{ + serdes_misc_init(); + + return 0; +} +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index 1a747a9e3d..d143864af1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -600,3 +600,62 @@ void fsl_serdes_init(void) serdes3_prtcl_map); #endif } + +int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + char scfg[16], snum[16]; + int cfgr = 0; + u32 cfg; + + cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask; + cfg >>= sd_prctl_shift; + cfg = serdes_get_number(sd, cfg); + +#if defined(SRDS_BITS_PER_LANE) + /* + * reverse lanes, lane 0 should be printed first so it must be moved to + * high order bits. + * For example bb58 should read 85bb, lane 0 being protocol 8. + * This only applies to SoCs that define SRDS_BITS_PER_LANE and have + * independent per-lane protocol configuration, at this time LS1028A and + * LS1088A. LS2 and LX2 SoCs encode the full protocol mix across all + * lanes as a single value. + */ + for (int i = 0; i < SRDS_MAX_LANES; i++) { + int tmp; + + tmp = cfg >> (i * SRDS_BITS_PER_LANE); + tmp &= GENMASK(SRDS_BITS_PER_LANE - 1, 0); + tmp <<= (SRDS_MAX_LANES - i - 1) * SRDS_BITS_PER_LANE; + cfgr |= tmp; + } +#endif /* SRDS_BITS_PER_LANE */ + + snprintf(snum, 16, "serdes%d", sd); + snprintf(scfg, 16, "%x", cfgr); + env_set(snum, scfg); + + return 0; +} + +int serdes_misc_init(void) +{ +#ifdef CONFIG_SYS_FSL_SRDS_1 + serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR, + FSL_CHASSIS3_SRDS1_PRTCL_MASK, + FSL_CHASSIS3_SRDS1_PRTCL_SHIFT); +#endif +#ifdef CONFIG_SYS_FSL_SRDS_2 + serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR, + FSL_CHASSIS3_SRDS2_PRTCL_MASK, + FSL_CHASSIS3_SRDS2_PRTCL_SHIFT); +#endif +#ifdef CONFIG_SYS_NXP_SRDS_3 + serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR, + FSL_CHASSIS3_SRDS3_PRTCL_MASK, + FSL_CHASSIS3_SRDS3_PRTCL_SHIFT); +#endif + + return 0; +} diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index a83c70ece2..ddd9390df4 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -123,6 +123,7 @@ #define CONFIG_SYS_PAGE_SIZE 0x10000 #define SRDS_MAX_LANES 4 +#define SRDS_BITS_PER_LANE 4 /* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 @@ -252,6 +253,7 @@ #define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820) #define SRDS_MAX_LANES 4 +#define SRDS_BITS_PER_LANE 4 #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ #define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M */ From 71c8fb3e3a3e79c98d305b49ea46ae92332c3f20 Mon Sep 17 00:00:00 2001 From: Pankaj Bansal Date: Wed, 15 Jan 2020 05:57:00 +0000 Subject: [PATCH 28/30] board: fsl: lx2160a: Fix the loop in board_fix_fdt function Fix loop in board_fix_fdt that erroneously increments the counter in all cases whereas the counter should be incremented only if a matching string has been found. Fixes: 5d535aa40b ("board: fsl: lx2160a: implement board_fix_fdt") Signed-off-by: Pankaj Bansal Signed-off-by: Priyanka Jain --- board/freescale/lx2160a/lx2160a.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 0b0d6bf91a..6555b5ad3a 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -132,7 +132,7 @@ int board_fix_fdt(void *fdt) { "ccsr", "dbi" }, { "pf_ctrl", "ctrl" } }; - int off = -1, i; + int off = -1, i = 0; if (IS_SVR_REV(get_svr(), 1, 0)) return 0; @@ -149,7 +149,7 @@ int board_fix_fdt(void *fdt) reg_name = reg_names; remaining_names_len = names_len - (reg_name - reg_names); - for (i = 0; (i < ARRAY_SIZE(reg_names_map)) && names_len; i++) { + while ((i < ARRAY_SIZE(reg_names_map)) && remaining_names_len) { old_name_len = strlen(reg_names_map[i].old_str); new_name_len = strlen(reg_names_map[i].new_str); if (memcmp(reg_name, reg_names_map[i].old_str, @@ -165,6 +165,7 @@ int board_fix_fdt(void *fdt) new_name_len); names_len -= old_name_len; names_len += new_name_len; + i++; } reg_name = memchr(reg_name, '\0', remaining_names_len); From d04bc60327e4cf938202bdd0df28ca1ddf94f720 Mon Sep 17 00:00:00 2001 From: Udit Agarwal Date: Wed, 20 Nov 2019 08:51:27 +0000 Subject: [PATCH 29/30] configs: fsl-layerscape: secure_boot: Enable setexpr command setexpr command is used while running secure boot (chain of trust with confidentiality) feature. Enable CONFIG_CMD_SETEXPR to enable setexpr command. Signed-off-by: Udit Agarwal Signed-off-by: Priyanka Jain --- configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + 13 files changed, 13 insertions(+), 4 deletions(-) diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 79eb801b03..92d85994a3 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -53,4 +53,5 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y +CONFIG_CMD_SETEXPR=y CONFIG_RSA_SOFTWARE_EXP=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 67653d8aa5..f525544ccf 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -30,7 +30,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=1 CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SETEXPR=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_OF_CONTROL=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index ff5c744d4a..fa137834ff 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -27,7 +27,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SETEXPR=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 427beb0dc5..85c4210ca8 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -74,5 +74,6 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_RSA=y +CONFIG_CMD_SETEXPR=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 0cb31328d9..27a9ab131f 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -73,5 +73,6 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_RSA=y +CONFIG_CMD_SETEXPR=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 0ece698350..4ba5a8dd95 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -62,4 +62,5 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_CMD_SETEXPR=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 94ca502f3b..83bfca078b 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -56,3 +56,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_CMD_SETEXPR=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index e173747923..c50e525fd3 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -61,3 +61,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_CMD_SETEXPR=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 1dde0ae73b..43a123625c 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -54,3 +54,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_CMD_SETEXPR=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index b144194e88..3d5d8a2e04 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -27,7 +27,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SETEXPR=y CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 7fb7c42e3b..5ba20e5f64 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_SETEXPR=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 87f193f4fc..698954366e 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -73,3 +73,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_CMD_SETEXPR=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 92020cbf8d..5517a7d8e9 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -68,3 +68,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_CMD_SETEXPR=y From 6666408535523377428846bad5a9362d589e396c Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Mon, 2 Dec 2019 12:58:14 +0200 Subject: [PATCH 30/30] configs: ls1028aqds: enable mdio muxing by default LS1028A QDS boards have a MDIO MUX and they require the driver for it for PHYs to work. Signed-off-by: Alex Marginean Signed-off-by: Priyanka Jain --- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1028aqds_tfa_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 85c4210ca8..019ecfd9b1 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -52,8 +52,10 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_FSL_ENETC=y +CONFIG_MDIO_MUX_I2CREG=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 3418818e99..435f36446b 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -58,8 +58,10 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y CONFIG_FSL_ENETC=y +CONFIG_MDIO_MUX_I2CREG=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y