Merge tag 'u-boot-stm32-20210409' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
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48
include/configs/stm32h750-art-pi.h
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48
include/configs/stm32h750-art-pi.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2021, STMicroelectronics - All Rights Reserved
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* Author(s): Dillon Min <dillon.minfei@gmail.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <config.h>
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#include <linux/sizes.h>
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/* For booting Linux, use the first 16MB of memory */
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#define CONFIG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M)
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#define CONFIG_SYS_FLASH_BASE 0x90000000
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#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
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/*
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* Configuration of the external SDRAM memory
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*/
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#define CONFIG_SYS_LOAD_ADDR 0xC1800000
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#define CONFIG_LOADADDR 0xC1800000
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#define CONFIG_SYS_HZ_CLOCK 1000000
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr_r=0xC0008000\0" \
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"fdtfile=stm32h750i-art-pi.dtb\0" \
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"fdt_addr_r=0xC0408000\0" \
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"scriptaddr=0xC0418000\0" \
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"pxefile_addr_r=0xC0428000\0" \
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"ramdisk_addr_r=0xC0438000\0" \
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BOOTENV
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#endif /* __CONFIG_H */
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@@ -50,13 +50,12 @@
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/* SPL support */
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#ifdef CONFIG_SPL
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/* SPL use DDR */
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#define CONFIG_SPL_BSS_START_ADDR 0xC0200000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x01D00000
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/* limit SYSRAM usage to first 128 KB */
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#define CONFIG_SPL_MAX_SIZE 0x00020000
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/* Restrict SPL to fit within SYSRAM */
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#define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE)
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#define CONFIG_SPL_MAX_FOOTPRINT (STM32_SYSRAM_END - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \
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STM32_SYSRAM_SIZE)
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#endif /* #ifdef CONFIG_SPL */
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@@ -34,8 +34,10 @@
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#define TXSR_1 (1 - 1)
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#define TXSR_6 (6 - 1)
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#define TXSR_7 (7 - 1)
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#define TXSR_8 (8 - 1)
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#define TRAS_1 (1 - 1)
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#define TRAS_4 (4 - 1)
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#define TRAS_6 (6 - 1)
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#define TRC_6 (6 - 1)
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#define TWR_1 (1 - 1)
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#define TWR_2 (2 - 1)
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