Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
This commit is contained in:
Tom Rini
2021-04-09 13:10:59 -04:00
51 changed files with 3085 additions and 513 deletions

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@@ -0,0 +1,48 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2021, STMicroelectronics - All Rights Reserved
* Author(s): Dillon Min <dillon.minfei@gmail.com>
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <config.h>
#include <linux/sizes.h>
/* For booting Linux, use the first 16MB of memory */
#define CONFIG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M)
#define CONFIG_SYS_FLASH_BASE 0x90000000
#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_SYS_LOAD_ADDR 0xC1800000
#define CONFIG_LOADADDR 0xC1800000
#define CONFIG_SYS_HZ_CLOCK 1000000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0xC0008000\0" \
"fdtfile=stm32h750i-art-pi.dtb\0" \
"fdt_addr_r=0xC0408000\0" \
"scriptaddr=0xC0418000\0" \
"pxefile_addr_r=0xC0428000\0" \
"ramdisk_addr_r=0xC0438000\0" \
BOOTENV
#endif /* __CONFIG_H */

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@@ -50,13 +50,12 @@
/* SPL support */
#ifdef CONFIG_SPL
/* SPL use DDR */
#define CONFIG_SPL_BSS_START_ADDR 0xC0200000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x01D00000
/* limit SYSRAM usage to first 128 KB */
#define CONFIG_SPL_MAX_SIZE 0x00020000
/* Restrict SPL to fit within SYSRAM */
#define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE)
#define CONFIG_SPL_MAX_FOOTPRINT (STM32_SYSRAM_END - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \
STM32_SYSRAM_SIZE)
#endif /* #ifdef CONFIG_SPL */

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@@ -34,8 +34,10 @@
#define TXSR_1 (1 - 1)
#define TXSR_6 (6 - 1)
#define TXSR_7 (7 - 1)
#define TXSR_8 (8 - 1)
#define TRAS_1 (1 - 1)
#define TRAS_4 (4 - 1)
#define TRAS_6 (6 - 1)
#define TRC_6 (6 - 1)
#define TWR_1 (1 - 1)
#define TWR_2 (2 - 1)