socfpga: Fix SOCFPGA build error for Altera dev kit

To fix the build error when build for Altera dev kit, not
virtual target. At same time, set the build for Altera dev
kit as default instead virtual target. With that, U-Boot
is booting well and SPL still lack of few drivers.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

arch/arm/cpu/armv7/socfpga/clock_manager.c

@@ -188,7 +188,6 @@ void cm_basic_init(const cm_config_t *cfg)
 	 * Time starts here
 	 * must wait 7 us from BGPWRDN_SET(0) to VCO_ENABLE_SET(1)
 	 */
-	reset_timer();
 	start = get_timer(0);
 	/* timeout in unit of us as CONFIG_SYS_HZ = 1000*1000 */
 	timeout = 7;

arch/arm/cpu/armv7/socfpga/config.mk

@@ -6,3 +6,6 @@
 ifndef CONFIG_SPL_BUILD
 ALL-y	+= u-boot.img
 endif
+
+# Added for handoff support
+PLATFORM_RELFLAGS += -Iboard/$(VENDOR)/$(BOARD)

arch/arm/cpu/armv7/socfpga/spl.c

@@ -14,6 +14,8 @@
 #include <spl.h>
 #include <asm/arch/system_manager.h>
 #include <asm/arch/freeze_controller.h>
+#include <asm/arch/clock_manager.h>
+#include <asm/arch/scan_manager.h>
 
 DECLARE_GLOBAL_DATA_PTR;