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Merge branch 'master' of git://git.denx.de/u-boot-net

Browse Source 
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	drivers/net/zynq_gem.c
This commit is contained in:
Tom Rini
2016-05-24 11:59:02 -04:00
parent ec8fb48ce9 0a71cd7729
commit 2ee490a024
22 changed files with 1341 additions and 631 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
include/configs/ti_omap5_common.h
View File

@@ -153,6 +153,7 @@
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_TIMER
#undef CONFIG_DM_ETH
#endif
#endif /* __CONFIG_TI_OMAP5_COMMON_H */

2
include/cpsw.h
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@@ -21,6 +21,7 @@ struct cpsw_slave_data {
u32 sliver_reg_ofs;
int phy_addr;
int phy_if;
int phy_of_handle;
};
enum {
@@ -51,5 +52,6 @@ struct cpsw_platform_data {
};
int cpsw_register(struct cpsw_platform_data *data);
int ti_cm_get_macid(struct udevice *dev, int slave, u8 *mac_addr);
#endif /* _CPSW_H_ */

23
include/dm/device.h
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@@ -547,6 +547,29 @@ int device_set_name(struct udevice *dev, const char *name);
*/
void device_set_name_alloced(struct udevice *dev);
/**
* of_device_is_compatible() - check if the device is compatible with the compat
*
* This allows to check whether the device is comaptible with the compat.
*
* @dev: udevice pointer for which compatible needs to be verified.
* @compat: Compatible string which needs to verified in the given
* device
* @return true if OK, false if the compatible is not found
*/
bool of_device_is_compatible(struct udevice *dev, const char *compat);
/**
* of_machine_is_compatible() - check if the machine is compatible with
* the compat
*
* This allows to check whether the machine is comaptible with the compat.
*
* @compat: Compatible string which needs to verified
* @return true if OK, false if the compatible is not found
*/
bool of_machine_is_compatible(const char *compat);
/**
* device_is_on_pci_bus - Test if a device is on a PCI bus
*

35
include/dt-bindings/net/ti-dp83867.h Normal file
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@@ -0,0 +1,35 @@
/*
* TI DP83867 PHY drivers
*
* SPDX-License-Identifier: GPL-2.0
*
*/
#ifndef _DT_BINDINGS_TI_DP83867_H
#define _DT_BINDINGS_TI_DP83867_H
/* PHY CTRL bits */
#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB 0x00
#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB 0x01
#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB 0x02
#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB 0x03
/* RGMIIDCTL internal delay for rx and tx */
#define DP83867_RGMIIDCTL_250_PS 0x0
#define DP83867_RGMIIDCTL_500_PS 0x1
#define DP83867_RGMIIDCTL_750_PS 0x2
#define DP83867_RGMIIDCTL_1_NS 0x3
#define DP83867_RGMIIDCTL_1_25_NS 0x4
#define DP83867_RGMIIDCTL_1_50_NS 0x5
#define DP83867_RGMIIDCTL_1_75_NS 0x6
#define DP83867_RGMIIDCTL_2_00_NS 0x7
#define DP83867_RGMIIDCTL_2_25_NS 0x8
#define DP83867_RGMIIDCTL_2_50_NS 0x9
#define DP83867_RGMIIDCTL_2_75_NS 0xa
#define DP83867_RGMIIDCTL_3_00_NS 0xb
#define DP83867_RGMIIDCTL_3_25_NS 0xc
#define DP83867_RGMIIDCTL_3_50_NS 0xd
#define DP83867_RGMIIDCTL_3_75_NS 0xe
#define DP83867_RGMIIDCTL_4_00_NS 0xf
#endif

58
include/netdev.h
View File

@@ -134,64 +134,6 @@ static inline int pci_eth_init(bd_t *bis)
return num;
}
/*
* Boards with mv88e61xx switch can use this by defining
* CONFIG_MV88E61XX_SWITCH in respective board configheader file
* the stuct and enums here are used to specify switch configuration params
*/
#if defined(CONFIG_MV88E61XX_SWITCH)
/* constants for any 88E61xx switch */
#define MV88E61XX_MAX_PORTS_NUM 6
enum mv88e61xx_cfg_mdip {
MV88E61XX_MDIP_NOCHANGE,
MV88E61XX_MDIP_REVERSE
};
enum mv88e61xx_cfg_ledinit {
MV88E61XX_LED_INIT_DIS,
MV88E61XX_LED_INIT_EN
};
enum mv88e61xx_cfg_rgmiid {
MV88E61XX_RGMII_DELAY_DIS,
MV88E61XX_RGMII_DELAY_EN
};
enum mv88e61xx_cfg_prtstt {
MV88E61XX_PORTSTT_DISABLED,
MV88E61XX_PORTSTT_BLOCKING,
MV88E61XX_PORTSTT_LEARNING,
MV88E61XX_PORTSTT_FORWARDING
};
struct mv88e61xx_config {
char *name;
u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
enum mv88e61xx_cfg_rgmiid rgmii_delay;
enum mv88e61xx_cfg_prtstt portstate;
enum mv88e61xx_cfg_ledinit led_init;
enum mv88e61xx_cfg_mdip mdip;
u32 ports_enabled;
u8 cpuport;
};
/*
* Common mappings for Internal VLANs
* These mappings consider that all ports are useable; the driver
* will mask inexistent/unused ports.
*/
/* Switch mode : routes any port to any port */
#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
#endif /* CONFIG_MV88E61XX_SWITCH */
struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
#ifdef CONFIG_PHYLIB
struct phy_device;

23
include/phy.h
View File

@@ -249,6 +249,7 @@ int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);
int phy_mv88e61xx_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);
int phy_broadcom_init(void);
@@ -277,6 +278,28 @@ int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
*/
int phy_get_interface_by_name(const char *str);
/**
* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
* is RGMII (all variants)
* @phydev: the phy_device struct
*/
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
}
/**
* phy_interface_is_sgmii - Convenience function for testing if a PHY interface
* is SGMII (all variants)
* @phydev: the phy_device struct
*/
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
}
/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340 0x13e51002
#define PHY_UID_TN2020 0x00a19410