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arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register

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Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
Use this information instead of manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Pali Rohár
2021-07-31 14:22:53 +02:00
committed by Stefan Roese
parent 29795302b9
commit 2ddf554b86
2 changed files with 3 additions and 1 deletions
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include/configs/db-88f6720.h
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@@ -15,7 +15,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */
#define CONFIG_SYS_I2C_LEGACY