From cf1971c1c0a76c3105a347102db083027a3d7b91 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 25 Oct 2010 18:32:08 +0200 Subject: [PATCH 1/5] ppc4xx: t3corp: Add support for the Xilinx DS617 flash chip The t3corp board has an Xilinx DS617 flash chip connected to the onboard FPGA. This patch adds support for these chips. Board specific flash accessor functions are needed, since the chips can only be read correctly in 16bit mode. Additionally the FPGA chip-selects are configured for device-paced transfers (ready is enabled). Signed-off-by: Stefan Roese --- board/t3corp/t3corp.c | 38 ++++++++++++++++++++++++++++++++++++++ include/configs/t3corp.h | 18 ++++++++++++------ 2 files changed, 50 insertions(+), 6 deletions(-) diff --git a/board/t3corp/t3corp.c b/board/t3corp/t3corp.c index 04d6a2e2af..f2853e42e5 100644 --- a/board/t3corp/t3corp.c +++ b/board/t3corp/t3corp.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -191,3 +192,40 @@ struct sdram_timing *ddr_scan_option(struct sdram_timing *default_val) { return board_scan_options; } + +/* + * Accessor functions replacing the "weak" functions in + * drivers/mtd/cfi_flash.c + * + * The NOR flash devices "behind" the FPGA's (Xilinx DS617) + * can only be read correctly in 16bit mode. We need to emulate + * 8bit and 32bit reads here in the board specific code. + */ +u8 flash_read8(void *addr) +{ + u16 val = __raw_readw((void *)((u32)addr & ~1)); + + if ((u32)addr & 1) + return val; + + return val >> 8; +} + +u32 flash_read32(void *addr) +{ + return (__raw_readw(addr) << 16) | __raw_readw((void *)((u32)addr + 2)); +} + +void flash_cmd_reset(flash_info_t *info) +{ + /* + * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and + * needs the Spansion type reset commands. The other flash chip + * is located behind a FPGA (Xilinx DS617) and needs the Intel type + * reset command. + */ + if (info->start[0] == CONFIG_SYS_FLASH_BASE) + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + else + flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); +} diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h index 6115a5f413..2a731a637b 100644 --- a/include/configs/t3corp.h +++ b/include/configs/t3corp.h @@ -120,11 +120,16 @@ */ #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD reset cmd */ +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* use status poll method */ +#define CONFIG_SYS_FLASH_PROTECTION /* use hardware flash protection */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + (CONFIG_SYS_FPGA1_BASE + 0x01000000) } +#define CONFIG_SYS_CFI_FLASH_CONFIG_REGS { 0xffff, /* don't set */ \ + 0xbddf } /* set async read mode */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of memory banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sectors p. chip*/ #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase/ms*/ @@ -355,6 +360,7 @@ "ramdisk_addr=fc200000\0" \ "pciconfighost=1\0" \ "pcie_mode=RP:RP\0" \ + "unlock=yes\0" \ "" /* @@ -423,7 +429,7 @@ EBC_BXAP_WBN_ENCODE(0) | \ EBC_BXAP_WBF_ENCODE(0) | \ EBC_BXAP_TH_ENCODE(1) | \ - EBC_BXAP_RE_DISABLED | \ + EBC_BXAP_RE_ENABLED | \ EBC_BXAP_SOR_DELAYED | \ EBC_BXAP_BEM_RW | \ EBC_BXAP_PEN_DISABLED) @@ -440,7 +446,7 @@ EBC_BXAP_WBN_ENCODE(0) | \ EBC_BXAP_WBF_ENCODE(0) | \ EBC_BXAP_TH_ENCODE(1) | \ - EBC_BXAP_RE_DISABLED | \ + EBC_BXAP_RE_ENABLED | \ EBC_BXAP_SOR_DELAYED | \ EBC_BXAP_BEM_RW | \ EBC_BXAP_PEN_DISABLED) @@ -457,7 +463,7 @@ EBC_BXAP_WBN_ENCODE(0) | \ EBC_BXAP_WBF_ENCODE(0) | \ EBC_BXAP_TH_ENCODE(1) | \ - EBC_BXAP_RE_DISABLED | \ + EBC_BXAP_RE_ENABLED | \ EBC_BXAP_SOR_DELAYED | \ EBC_BXAP_BEM_RW | \ EBC_BXAP_PEN_DISABLED) From f7b548adb56729f07cd5e96c10edc5260527d447 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 26 Nov 2010 15:43:17 +0100 Subject: [PATCH 2/5] ppc4xx: Clarify comment about boot chip-select in start.S Ths old comment was quite screwed up. Replace it with a new version that should be a bit more descriptive. Signed-off-by: Stefan Roese --- arch/powerpc/cpu/ppc4xx/start.S | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 0e75794d22..99822d750e 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -48,21 +48,23 @@ *------------------------------------------------------------------------------- */ -/* U-Boot - Startup Code for AMCC 4xx PowerPC based Embedded Boards +/* + * Startup code for IBM/AMCC PowerPC 4xx (PPC4xx) based boards * + * The following description only applies to the NOR flash style booting. + * NAND booting is different. For more details about NAND booting on 4xx + * take a look at doc/README.nand-boot-ppc440. * - * The processor starts at 0xfffffffc and the code is executed - * from flash/rom. - * in memory, but as long we don't jump around before relocating. - * board_init lies at a quite high address and when the cpu has - * jumped there, everything is ok. - * This works because the cpu gives the FLASH (CS0) the whole - * address space at startup, and board_init lies as a echo of - * the flash somewhere up there in the memorymap. - * - * board_init will change CS0 to be positioned at the correct - * address and (s)dram will be positioned at address 0 + * The CPU starts at address 0xfffffffc (last word in the address space). + * The U-Boot image therefore has to be located in the "upper" area of the + * flash (e.g. 512MiB - 0xfff80000 ... 0xffffffff). The default value for + * the boot chip-select (CS0) is quite big and covers this area. On the + * 405EX this is for example 0xffe00000 ... 0xffffffff. U-Boot will + * reconfigure this CS0 (and other chip-selects as well when configured + * this way) in the boot process to the "correct" values matching the + * board layout. */ + #include #include #include From a321148b5b38150b011a1df4ad198329a49e98a3 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 26 Nov 2010 15:45:48 +0100 Subject: [PATCH 3/5] ppc4xx: Update lwmon5 board support This patch includes the following changes for the lwmon5 board support: - Enable cache in SDRAM - Use common EHCI driver instead of the PPC4xx specific OHCI driver This can be done since only high-speed devices are connected. - Remove cached TLB entry again after ECC setup - Use correct define for cache enabling (CONFIG_4xx_DCACHE instead of CONFIG_SYS_ENABLE_SDRAM_CACHE) - Enable FIT image support Signed-off-by: Stefan Roese --- board/lwmon5/sdram.c | 22 ++++++++++++++++++---- include/configs/lwmon5.h | 22 ++++++++++++++-------- 2 files changed, 32 insertions(+), 12 deletions(-) diff --git a/board/lwmon5/sdram.c b/board/lwmon5/sdram.c index f90efebb8a..b64b35a94e 100644 --- a/board/lwmon5/sdram.c +++ b/board/lwmon5/sdram.c @@ -45,10 +45,10 @@ * memory. * * If at some time this restriction doesn't apply anymore, just define - * CONFIG_SYS_ENABLE_SDRAM_CACHE in the board config file and this code should setup + * CONFIG_4xx_DCACHE in the board config file and this code should setup * everything correctly. */ -#ifdef CONFIG_SYS_ENABLE_SDRAM_CACHE +#ifdef CONFIG_4xx_DCACHE #define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */ #else #define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */ @@ -220,18 +220,32 @@ phys_size_t initdram (int board_type) program_tlb(0, CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20, MY_TLB_WORD2_I_ENABLE); +#if defined(CONFIG_DDR_ECC) +#if defined(CONFIG_4xx_DCACHE) + /* + * If ECC is enabled, initialize the parity bits. + */ + program_ecc(0, CONFIG_SYS_MBYTES_SDRAM << 20, 0); +#else /* CONFIG_4xx_DCACHE */ /* * Setup 2nd TLB with same physical address but different virtual address * with cache enabled. This is done for fast ECC generation. */ program_tlb(0, CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0); -#ifdef CONFIG_DDR_ECC /* * If ECC is enabled, initialize the parity bits. */ program_ecc(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0); -#endif + + /* + * Now after initialization (auto-calibration and ECC generation) + * remove the TLB entries with caches enabled and program again with + * desired cache functionality + */ + remove_tlb(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20); +#endif /* CONFIG_4xx_DCACHE */ +#endif /* CONFIG_DDR_ECC */ /* * Clear possible errors resulting from data-eye-search. diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 4c9744ca4f..aedf495104 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -43,6 +43,8 @@ #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ +#define CONFIG_4xx_DCACHE /* enable cache in SDRAM */ + #define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */ #define CONFIG_BOARD_POSTCLK_INIT /* Call board_postclk_init */ @@ -321,6 +323,8 @@ /* Update size in "reg" property of NOR FLASH device tree nodes */ #define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE +#define CONFIG_FIT /* enable FIT image support */ + #define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ #define CONFIG_PREBOOT "setenv bootdelay 15" @@ -393,16 +397,18 @@ #define CONFIG_VIDEO_SW_CURSOR #define CONFIG_SPLASH_SCREEN -/* USB */ -#ifdef CONFIG_440EPX -#define CONFIG_USB_OHCI +/* + * USB/EHCI + */ +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_PPC4XX /* on PPC4xx platform */ +#define CONFIG_SYS_PPC4XX_USB_ADDR 0xe0000300 +#define CONFIG_EHCI_DCACHE /* with dcache handling support */ +#define CONFIG_EHCI_MMIO_BIG_ENDIAN +#define CONFIG_EHCI_DESC_BIG_ENDIAN +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ #define CONFIG_USB_STORAGE -/* Comment this out to enable USB 1.1 device */ -#define USB_2_0_DEVICE - -#endif /* CONFIG_440EPX */ - /* Partitions */ #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION From ac69243d83bf8c5762ffad640e2223acddd935b7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 26 Nov 2010 19:17:40 +0100 Subject: [PATCH 4/5] ppc4xx/POST: Change ethernet test loop count to a default of 10 This patch changes the PPC4xx ethernet POST loop test count from currently 192 (256 - 64) to a default of 10. While doing this the max frame size is increased. Each loop run uses a different frame size, starting with a max of 1514 bytes, down to 64. The default loop count of 10 can be overriden using CONFIG_SYS_POST_ETH_LOOPS in the board config header. The TEST_NUM loop has been removed as it was never used. The main reason for this change is to reduce the boot time on boards using this POST test, like the lwmon5 board. This change reduces the boot time by about 600ms on the lwmon5 board. Signed-off-by: Stefan Roese Acked-by: Wolfgang Denk --- post/cpu/ppc4xx/ether.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/post/cpu/ppc4xx/ether.c b/post/cpu/ppc4xx/ether.c index 7f44f38dab..c508670a7c 100644 --- a/post/cpu/ppc4xx/ether.c +++ b/post/cpu/ppc4xx/ether.c @@ -34,7 +34,10 @@ * are transmitted. The configurable test parameters are: * MIN_PACKET_LENGTH - minimum size of packet to transmit * MAX_PACKET_LENGTH - maximum size of packet to transmit - * TEST_NUM - number of tests + * CONFIG_SYS_POST_ETH_LOOPS - Number of test loops. Each loop + * is tested with a different frame length. Starting with + * MAX_PACKET_LENGTH and going down to MIN_PACKET_LENGTH. + * Defaults to 10 and can be overriden in the board config header. */ #include @@ -77,8 +80,12 @@ DECLARE_GLOBAL_DATA_PTR; #endif #define MIN_PACKET_LENGTH 64 -#define MAX_PACKET_LENGTH 256 -#define TEST_NUM 1 +#define MAX_PACKET_LENGTH 1514 +#ifndef CONFIG_SYS_POST_ETH_LOOPS +#define CONFIG_SYS_POST_ETH_LOOPS 10 +#endif +#define PACKET_INCR ((MAX_PACKET_LENGTH - MIN_PACKET_LENGTH) / \ + CONFIG_SYS_POST_ETH_LOOPS) static volatile mal_desc_t tx __cacheline_aligned; static volatile mal_desc_t rx __cacheline_aligned; @@ -361,29 +368,27 @@ static int packet_check (char *packet, int length) return 0; } + char packet_send[MAX_PACKET_LENGTH]; + char packet_recv[MAX_PACKET_LENGTH]; static int test_ctlr (int devnum, int hw_addr) { int res = -1; - char packet_send[MAX_PACKET_LENGTH]; - char packet_recv[MAX_PACKET_LENGTH]; int length; - int i; int l; ether_post_init (devnum, hw_addr); - for (i = 0; i < TEST_NUM; i++) { - for (l = MIN_PACKET_LENGTH; l <= MAX_PACKET_LENGTH; l++) { - packet_fill (packet_send, l); + for (l = MAX_PACKET_LENGTH; l >= MIN_PACKET_LENGTH; + l -= PACKET_INCR) { + packet_fill (packet_send, l); - ether_post_send (devnum, hw_addr, packet_send, l); + ether_post_send (devnum, hw_addr, packet_send, l); - length = ether_post_recv (devnum, hw_addr, packet_recv, - sizeof (packet_recv)); + length = ether_post_recv (devnum, hw_addr, packet_recv, + sizeof (packet_recv)); - if (length != l || packet_check (packet_recv, length) < 0) { - goto Done; - } + if (length != l || packet_check (packet_recv, length) < 0) { + goto Done; } } From d20b9991154241466802ceb17169dc8b5f7e58df Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Tue, 7 Dec 2010 14:27:56 +0100 Subject: [PATCH 5/5] xilinx-ppc4xx-generic: Use common u-boot.lds Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards. Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese --- arch/powerpc/cpu/ppc4xx/start.S | 2 +- arch/powerpc/cpu/ppc4xx/u-boot.lds | 8 ++ board/xilinx/ppc405-generic/Makefile | 4 +- board/xilinx/ppc405-generic/u-boot-ram.lds | 131 ------------------- board/xilinx/ppc405-generic/u-boot-rom.lds | 141 -------------------- board/xilinx/ppc440-generic/Makefile | 4 +- board/xilinx/ppc440-generic/u-boot-ram.lds | 132 ------------------- board/xilinx/ppc440-generic/u-boot-rom.lds | 142 --------------------- boards.cfg | 20 +-- include/configs/xilinx-ppc.h | 1 + 10 files changed, 26 insertions(+), 559 deletions(-) delete mode 100644 board/xilinx/ppc405-generic/u-boot-ram.lds delete mode 100644 board/xilinx/ppc405-generic/u-boot-rom.lds delete mode 100644 board/xilinx/ppc440-generic/u-boot-ram.lds delete mode 100644 board/xilinx/ppc440-generic/u-boot-rom.lds diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 99822d750e..2218508388 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -267,7 +267,7 @@ /* NOTREACHED - board_init_f() does not return */ #endif -#if defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_BOOT_FROM_XMD) /* * 4xx RAM-booting U-Boot image is started from offset 0 */ diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds index dac0e5b61c..842ff5f5ce 100644 --- a/arch/powerpc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -23,8 +23,12 @@ #include "config.h" /* CONFIG_BOARDDIR */ #ifndef RESET_VECTOR_ADDRESS +#ifdef CONFIG_RESET_VECTOR_ADDRESS +#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS +#else #define RESET_VECTOR_ADDRESS 0xfffffffc #endif +#endif OUTPUT_ARCH(powerpc) @@ -100,7 +104,11 @@ SECTIONS * start.o, since the first shadow TLB only covers 4k * of address space. */ +#ifdef CONFIG_INIT_TLB + CONFIG_INIT_TLB (.bootpg) +#else CONFIG_BOARDDIR/init.o (.bootpg) +#endif } :text = 0xffff #endif diff --git a/board/xilinx/ppc405-generic/Makefile b/board/xilinx/ppc405-generic/Makefile index 4b8e4f422f..717ffc9c9f 100644 --- a/board/xilinx/ppc405-generic/Makefile +++ b/board/xilinx/ppc405-generic/Makefile @@ -41,7 +41,9 @@ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) +all: $(LIB) $(SOBJS) + +$(LIB): $(OBJS) $(call cmd_link_o_target, $^) clean: diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds deleted file mode 100644 index a7539fde41..0000000000 --- a/board/xilinx/ppc405-generic/u-boot-ram.lds +++ /dev/null @@ -1,131 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -ENTRY(_start) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.eh_frame) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); - - _end = . ; - PROVIDE (end = .); -} diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds deleted file mode 100644 index 074f3c24ab..0000000000 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ /dev/null @@ -1,141 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -ENTRY(_start) - -SECTIONS -{ - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - arch/powerpc/cpu/ppc4xx/start.o (.bootpg) - } = 0xffff - - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.eh_frame) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); - - _end = . ; - PROVIDE (end = .); -} diff --git a/board/xilinx/ppc440-generic/Makefile b/board/xilinx/ppc440-generic/Makefile index d84cf69ab9..1760e4e3be 100644 --- a/board/xilinx/ppc440-generic/Makefile +++ b/board/xilinx/ppc440-generic/Makefile @@ -43,7 +43,9 @@ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) +all: $(LIB) $(SOBJS) + +$(LIB): $(OBJS) $(call cmd_link_o_target, $^) clean: diff --git a/board/xilinx/ppc440-generic/u-boot-ram.lds b/board/xilinx/ppc440-generic/u-boot-ram.lds deleted file mode 100644 index 203f0623bb..0000000000 --- a/board/xilinx/ppc440-generic/u-boot-ram.lds +++ /dev/null @@ -1,132 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -ENTRY(_start_440) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.eh_frame) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - . = ALIGN(4); - } - - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); - - _end = . ; - PROVIDE (end = .); -} diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds deleted file mode 100644 index b67617dcad..0000000000 --- a/board/xilinx/ppc440-generic/u-boot-rom.lds +++ /dev/null @@ -1,142 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -ENTRY(_start_440) - -SECTIONS -{ - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - arch/powerpc/cpu/ppc4xx/start.o (.bootpg) - } = 0xffff - - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.eh_frame) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - . = ALIGN(4); - } - - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); - - _end = . ; - PROVIDE (end = .); -} diff --git a/boards.cfg b/boards.cfg index 6cebc27aab..94b8745a97 100644 --- a/boards.cfg +++ b/boards.cfg @@ -675,10 +675,10 @@ yellowstone powerpc ppc4xx yosemite amcc yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE yucca powerpc ppc4xx - amcc AP1000 powerpc ppc4xx ap1000 amirix -fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds -fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xFFCB0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds -v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds -v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xFF1C0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds +fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o +fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o +v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o +v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o CRAYL1 powerpc ppc4xx L1 cray CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1 CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 @@ -736,12 +736,12 @@ p3p440 powerpc ppc4xx - prodriv KAREF powerpc ppc4xx karef sandburst METROBOX powerpc ppc4xx metrobox sandburst xpedite1000 powerpc ppc4xx - xes -ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds -ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds -xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds -xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds -xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds -xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds +ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o +ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o +xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC +xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC +xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1 +xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC rsk7203 sh sh2 rsk7203 renesas - mpr2 sh sh3 mpr2 - - ms7720se sh sh3 ms7720se - - diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index 2422c0b0c3..bd7bac0976 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -50,6 +50,7 @@ #undef CONFIG_CMD_DHCP #undef CONFIG_CMD_EEPROM #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_NFS /*Misc*/ #define CONFIG_BOOTDELAY 5/* autoboot after 5 seconds */