FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: Jon Loeliger <jdl@freescale.com>
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committed by
Andrew Fleming-AFLEMING
parent
a5af4b358a
commit
25eedb2c19
@@ -49,6 +49,9 @@
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#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
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#define CONFIG_FSL_VIA
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#define CONFIG_FSL_CDS_EEPROM
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/*
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* When initializing flash, if we cannot find the manufacturer ID,
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* assume this is the AMD flash associated with the CDS board.
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@@ -274,6 +277,8 @@ extern unsigned long get_clock_freq(void);
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* 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
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*/
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#define CONFIG_FSL_CADMUS
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#define CADMUS_BASE_ADDR 0xf8000000
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#define CFG_BR3_PRELIM 0xf8000801
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#define CFG_OR3_PRELIM 0xfff00ff7
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@@ -57,6 +57,9 @@
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#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
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#define CONFIG_FSL_VIA
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#define CONFIG_FSL_CDS_EEPROM
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/*
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* When initializing flash, if we cannot find the manufacturer ID,
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* assume this is the AMD flash associated with the CDS board.
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@@ -297,6 +300,8 @@ extern unsigned long get_clock_freq(void);
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* 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
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*/
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#define CONFIG_FSL_CADMUS
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#define CADMUS_BASE_ADDR 0xf8000000
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#define CFG_BR3_PRELIM 0xf8000801
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#define CFG_OR3_PRELIM 0xfff00ff7
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@@ -49,6 +49,9 @@
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#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
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#define CONFIG_FSL_VIA
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#define CONFIG_FSL_CDS_EEPROM
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/*
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* When initializing flash, if we cannot find the manufacturer ID,
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* assume this is the AMD flash associated with the CDS board.
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@@ -274,6 +277,8 @@ extern unsigned long get_clock_freq(void);
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* 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
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*/
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#define CONFIG_FSL_CADMUS
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#define CADMUS_BASE_ADDR 0xf8000000
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#define CFG_BR3_PRELIM 0xf8000801
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#define CFG_OR3_PRELIM 0xfff00ff7
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