arm: samsung: Migrate a number of symbols to Kconfig

- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than
  CONFIG_EXYNOS[45]
- In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX
- Migrate specific SoC CONFIG values to Kconfig
- Use CONFIG_TARGET_x rather than CONFIG_x
- Migrate other CONFIG_EXYNOS_x symbols to Kconfig
- Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE
- Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest
  of U-Boot usage.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-06-10 22:59:33 -04:00
parent 1e03e03d03
commit 24ec3dea4b
36 changed files with 74 additions and 99 deletions

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@@ -14,13 +14,9 @@
#include "exynos5250-common.h"
#include <configs/exynos5-common.h>
/* MMC SPL */
#define CONFIG_EXYNOS_SPL
/* Miscellaneous configurable options */
#define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM
#define CONFIG_SMP_PEN_ADDR 0x02020000
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000

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@@ -10,8 +10,6 @@
#include <configs/exynos7420-common.h>
#define CONFIG_ESPRESSO7420
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* DRAM Memory Banks */

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@@ -8,10 +8,6 @@
#ifndef __EXYNOS_COMMON_H
#define __EXYNOS_COMMON_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>
#include <linux/stringify.h>

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@@ -8,8 +8,6 @@
#ifndef __CONFIG_EXYNOS4_COMMON_H
#define __CONFIG_EXYNOS4_COMMON_H
#define CONFIG_EXYNOS4 /* Exynos4 Family */
#include "exynos-common.h"
/* SD/MMC configuration */

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@@ -8,15 +8,8 @@
#ifndef __CONFIG_EXYNOS5_COMMON_H
#define __CONFIG_EXYNOS5_COMMON_H
#define CONFIG_EXYNOS5 /* Exynos5 Family */
#include "exynos-common.h"
#define CONFIG_EXYNOS_SPL
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
@@ -31,9 +24,6 @@
/* select serial console configuration */
#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
/* Thermal Management Unit */
#define CONFIG_EXYNOS_TMU
/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR 0x02020030

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@@ -15,8 +15,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define CONFIG_EXYNOS5_DT
#define CONFIG_SYS_SPI_BASE 0x12D30000
#define FLASH_SIZE (4 << 20)
#define CONFIG_SPI_BOOTING

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@@ -9,8 +9,6 @@
#ifndef __CONFIG_5250_H
#define __CONFIG_5250_H
#define CONFIG_EXYNOS5250
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* USB */

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@@ -8,19 +8,12 @@
#ifndef __CONFIG_EXYNOS5420_H
#define __CONFIG_EXYNOS5420_H
#define CONFIG_EXYNOS5420
#define CONFIG_EXYNOS5_DT
#define CONFIG_VAR_SIZE_SPL
#define CONFIG_IRAM_TOP 0x02074000
#define CONFIG_PHY_IRAM_BASE 0x02020000
/* Address for relocating helper code (Last 4 KB of IRAM) */
#define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000)
/*
* Low Power settings
*/

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@@ -8,10 +8,6 @@
#ifndef __CONFIG_EXYNOS7420_COMMON_H
#define __CONFIG_EXYNOS7420_COMMON_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>

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@@ -11,10 +11,6 @@
#ifndef __CONFIG_EXYNOS78x0_COMMON_H
#define __CONFIG_EXYNOS78x0_COMMON_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>

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@@ -146,9 +146,6 @@
/* GPT */
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA
/* USB */
#define CONFIG_USB_EHCI_EXYNOS

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@@ -31,9 +31,6 @@
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
/* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */
#undef CONFIG_EXYNOS_TMU
#define CONFIG_DFU_ALT_SYSTEM \
"uImage fat 0 1;" \
"zImage fat 0 1;" \

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@@ -10,10 +10,6 @@
#include <configs/exynos4-common.h>
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
/* ORIGEN has 4 bank of DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE

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@@ -10,11 +10,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* which is in a S5P Family */
#define CONFIG_S5PC110 1 /* which is in a S5PC110 */
#include <linux/sizes.h>
#include <asm/arch/cpu.h> /* get chip and board defs */

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@@ -11,14 +11,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* which is in a S5P Family */
#define CONFIG_S5PC100 1 /* which is in a S5PC100 */
#include <asm/arch/cpu.h> /* get chip and board defs */
/* input clock of PLL: SMDKC100 has 12MHz input clock */

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@@ -13,8 +13,6 @@
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* Handling Sleep Mode*/

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@@ -11,8 +11,6 @@
#include <configs/exynos4-common.h>
#define CONFIG_TRATS
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE 0x10502000
@@ -128,9 +126,6 @@
/* GPT */
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON

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@@ -116,9 +116,6 @@
/* GPT */
/* Security subsystem - enable hw_rand() */
#define CONFIG_EXYNOS_ACE_SHA
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON

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@@ -7,7 +7,7 @@
#ifndef __FG_BATTERY_CELL_PARAMS_H_
#define __FG_BATTERY_CELL_PARAMS_H_
#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS)
#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TARGET_TRATS)
/* Cell characteristics - Exynos4 TRATS development board */
/* Shall be written to addr 0x80h */