Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master
This commit is contained in:
@@ -1552,6 +1552,13 @@ typedef struct par_io {
|
||||
*/
|
||||
typedef struct ccsr_gur {
|
||||
uint porpllsr; /* 0xe0000 - POR PLL ratio status register */
|
||||
#ifdef CONFIG_MPC8536
|
||||
#define MPC85xx_PORPLLSR_DDR_RATIO 0x3e000000
|
||||
#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 25
|
||||
#else
|
||||
#define MPC85xx_PORPLLSR_DDR_RATIO 0x00003e00
|
||||
#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 9
|
||||
#endif
|
||||
uint porbmsr; /* 0xe0004 - POR boot mode status register */
|
||||
#define MPC85xx_PORBMSR_HA 0x00070000
|
||||
uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
|
||||
|
||||
@@ -174,6 +174,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
|
||||
#define CFG_FLASH_SIZE 8 /* flash size in MB */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
#define CFG_FLASH_EMPTY_INFO /* display empty sectors */
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */
|
||||
|
||||
@@ -596,7 +597,7 @@
|
||||
#define CONFIG_FDTFILE mpc8313erdb.dtb
|
||||
|
||||
#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
|
||||
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
|
||||
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
#define XMK_STR(x) #x
|
||||
|
||||
@@ -193,6 +193,7 @@
|
||||
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 8 /* FLASH size is 8M */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
|
||||
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
|
||||
#define CFG_LBLAWAR0_PRELIM 0x80000016 /* 8MB window size */
|
||||
|
||||
@@ -181,6 +181,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 16 /* FLASH size is 16M */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
|
||||
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
|
||||
#define CFG_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */
|
||||
@@ -570,7 +571,7 @@
|
||||
#define CONFIG_FDTFILE mpc832x_rdb.dtb
|
||||
|
||||
#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
|
||||
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
|
||||
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
#define XMK_STR(x) #x
|
||||
|
||||
@@ -169,6 +169,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 16 /* FLASH size is 16M */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
|
||||
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
|
||||
#define CFG_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */
|
||||
|
||||
@@ -156,6 +156,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
|
||||
#define CFG_FLASH_SIZE 32 /* max flash size in MB */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
/* #define CFG_FLASH_USE_BUFFER_WRITE */
|
||||
|
||||
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \
|
||||
|
||||
@@ -190,6 +190,7 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE + 0x800000}
|
||||
#define CFG_FLASH_SIZE 16 /* FLASH size in MB */
|
||||
#define CFG_FLASH_SIZE_SHIFT 4 /* log2 of the above value */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
|
||||
/* Vitesse 7385 */
|
||||
|
||||
|
||||
@@ -194,6 +194,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 32 /* max FLASH size is 32M */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
|
||||
|
||||
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
|
||||
|
||||
@@ -229,6 +229,7 @@
|
||||
#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 32 /* max FLASH size is 32M */
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
|
||||
#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
|
||||
#define CFG_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */
|
||||
|
||||
@@ -253,6 +253,7 @@
|
||||
#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
|
||||
#define CFG_FLASH_SIZE 8 /* max FLASH size is 32M */
|
||||
|
||||
#define CFG_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
|
||||
#define CFG_FLASH_EMPTY_INFO /* display empty sectors */
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */
|
||||
|
||||
@@ -632,7 +633,7 @@
|
||||
#define CONFIG_FDTFILE mpc8379_rdb.dtb
|
||||
|
||||
#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
|
||||
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
|
||||
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
#define XMK_STR(x) #x
|
||||
|
||||
@@ -59,7 +59,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
||||
extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||
#endif
|
||||
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */
|
||||
/* #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /\* ddrclk for MPC85xx *\/ FIXME-8536*/
|
||||
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0)
|
||||
#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */
|
||||
#define CONFIG_GET_CLK_FROM_ICS307 /* decode sysclk and ddrclk freq
|
||||
from ICS307 instead of switches */
|
||||
@@ -303,7 +303,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||
*/
|
||||
#define CONFIG_ID_EEPROM
|
||||
#ifdef CONFIG_ID_EEPROM
|
||||
#define CONFIG_ID_EEPROM
|
||||
#define CFG_I2C_EEPROM_NXID
|
||||
#endif
|
||||
#define CFG_I2C_EEPROM_ADDR 0x57
|
||||
|
||||
@@ -108,6 +108,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
|
||||
|
||||
/* I2C addresses of SPD EEPROMs */
|
||||
#define CFG_SPD_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */
|
||||
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */
|
||||
#define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */
|
||||
|
||||
@@ -293,11 +294,25 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_EEPROM_ADDR 0x57
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3100
|
||||
#define CFG_I2C_NOPROBES {{0,0x29}}/* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
#define CFG_I2C2_OFFSET 0x3100
|
||||
|
||||
/*
|
||||
* I2C2 EEPROM
|
||||
*/
|
||||
#define CONFIG_ID_EEPROM
|
||||
#ifdef CONFIG_ID_EEPROM
|
||||
#define CFG_I2C_EEPROM_NXID
|
||||
#endif
|
||||
#define CFG_I2C_EEPROM_ADDR 0x57
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_BUS_NUM 1
|
||||
|
||||
/*
|
||||
* General PCI
|
||||
|
||||
@@ -122,7 +122,7 @@
|
||||
/* Low-level functions (you probably don't need these) */
|
||||
/**********************************************************************/
|
||||
|
||||
const void *fdt_offset_ptr(const void *fdt, int offset, int checklen);
|
||||
const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
|
||||
static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
|
||||
{
|
||||
return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
|
||||
@@ -458,6 +458,32 @@ static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
|
||||
*/
|
||||
uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
|
||||
|
||||
/**
|
||||
* fdt_get_alias_namelen - get alias based on substring
|
||||
* @fdt: pointer to the device tree blob
|
||||
* @name: name of the alias th look up
|
||||
* @namelen: number of characters of name to consider
|
||||
*
|
||||
* Identical to fdt_get_alias(), but only examine the first namelen
|
||||
* characters of name for matching the alias name.
|
||||
*/
|
||||
const char *fdt_get_alias_namelen(const void *fdt,
|
||||
const char *name, int namelen);
|
||||
|
||||
/**
|
||||
* fdt_get_alias - retreive the path referenced by a given alias
|
||||
* @fdt: pointer to the device tree blob
|
||||
* @name: name of the alias th look up
|
||||
*
|
||||
* fdt_get_alias() retrieves the value of a given alias. That is, the
|
||||
* value of the property named 'name' in the node /aliases.
|
||||
*
|
||||
* returns:
|
||||
* a pointer to the expansion of the alias named 'name', of it exists
|
||||
* NULL, if the given alias or the /aliases node does not exist
|
||||
*/
|
||||
const char *fdt_get_alias(const void *fdt, const char *name);
|
||||
|
||||
/**
|
||||
* fdt_get_path - determine the full path of a node
|
||||
* @fdt: pointer to the device tree blob
|
||||
|
||||
@@ -528,7 +528,7 @@
|
||||
#if defined(CONFIG_MPC834X)
|
||||
#define HRCWH_ROM_LOC_PCI2 0x00200000
|
||||
#endif
|
||||
#if defined(CONIFG_MPC837X)
|
||||
#if defined(CONFIG_MPC837X)
|
||||
#define HRCWH_ROM_LOC_ON_CHIP_ROM 0x00300000
|
||||
#endif
|
||||
#define HRCWH_ROM_LOC_LOCAL_8BIT 0x00500000
|
||||
|
||||
Reference in New Issue
Block a user