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Merge git://git.denx.de/u-boot-spi

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This commit is contained in:
Tom Rini
2018-01-26 07:46:34 -05:00
parent a3f77c810b 58c125b9e2
commit 1d12a7c8cd
79 changed files with 1616 additions and 519 deletions
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24
drivers/usb/host/dwc2.c
View File

@@ -108,8 +108,8 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
writel(DWC2_GRSTCTL_TXFFLSH | (num << DWC2_GRSTCTL_TXFNUM_OFFSET),
&regs->grstctl);
ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
false, 1000, false);
ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_TXFFLSH,
false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -127,8 +127,8 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
int ret;
writel(DWC2_GRSTCTL_RXFFLSH, &regs->grstctl);
ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
false, 1000, false);
ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_RXFFLSH,
false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -145,15 +145,15 @@ static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
int ret;
/* Wait for AHB master IDLE state. */
ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
true, 1000, false);
ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_AHBIDLE,
true, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
/* Core Soft Reset */
writel(DWC2_GRSTCTL_CSFTRST, &regs->grstctl);
ret = wait_for_bit(__func__, &regs->grstctl, DWC2_GRSTCTL_CSFTRST,
false, 1000, false);
ret = wait_for_bit_le32(&regs->grstctl, DWC2_GRSTCTL_CSFTRST,
false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
@@ -267,8 +267,8 @@ static void dwc_otg_core_host_init(struct udevice *dev,
clrsetbits_le32(&regs->hc_regs[i].hcchar,
DWC2_HCCHAR_EPDIR,
DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS);
ret = wait_for_bit(__func__, &regs->hc_regs[i].hcchar,
DWC2_HCCHAR_CHEN, false, 1000, false);
ret = wait_for_bit_le32(&regs->hc_regs[i].hcchar,
DWC2_HCCHAR_CHEN, false, 1000, false);
if (ret)
printf("%s: Timeout!\n", __func__);
}
@@ -783,8 +783,8 @@ int wait_for_chhltd(struct dwc2_hc_regs *hc_regs, uint32_t *sub, u8 *toggle)
int ret;
uint32_t hcint, hctsiz;
ret = wait_for_bit(__func__, &hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
1000, false);
ret = wait_for_bit_le32(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true,
1000, false);
if (ret)
return ret;

3
drivers/usb/host/ehci-msm.c
View File

@@ -133,8 +133,7 @@ static int ehci_usb_remove(struct udevice *dev)
setbits_le32(&ehci->usbcmd, CMD_RESET);
/* Wait for reset */
if (wait_for_bit(__func__, &ehci->usbcmd, CMD_RESET, false, 30,
false)) {
if (wait_for_bit_le32(&ehci->usbcmd, CMD_RESET, false, 30, false)) {
printf("Stuck on USB reset.\n");
return -ETIMEDOUT;
}

5
drivers/usb/host/ehci-mx6.c
View File

@@ -142,13 +142,12 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
/* Stop then Reset */
clrbits_le32(usb_cmd, UCMD_RUN_STOP);
ret = wait_for_bit(__func__, usb_cmd, UCMD_RUN_STOP, false, 10000,
false);
ret = wait_for_bit_le32(usb_cmd, UCMD_RUN_STOP, false, 10000, false);
if (ret)
return ret;
setbits_le32(usb_cmd, UCMD_RESET);
ret = wait_for_bit(__func__, usb_cmd, UCMD_RESET, false, 10000, false);
ret = wait_for_bit_le32(usb_cmd, UCMD_RESET, false, 10000, false);
if (ret)
return ret;

12
drivers/usb/host/ohci-lpc32xx.c
View File

@@ -143,8 +143,8 @@ static int usbpll_setup(void)
setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_POSTDIV_2POW(0x01));
setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_PWRUP);
ret = wait_for_bit(__func__, &clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
true, CONFIG_SYS_HZ, false);
ret = wait_for_bit_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_PLL_STS,
true, CONFIG_SYS_HZ, false);
if (ret)
return ret;
@@ -178,8 +178,8 @@ int usb_cpu_init(void)
/* enable I2C clock */
writel(OTG_CLK_I2C_EN, &otg->otg_clk_ctrl);
ret = wait_for_bit(__func__, &otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
CONFIG_SYS_HZ, false);
ret = wait_for_bit_le32(&otg->otg_clk_sts, OTG_CLK_I2C_EN, true,
CONFIG_SYS_HZ, false);
if (ret)
return ret;
@@ -199,8 +199,8 @@ int usb_cpu_init(void)
OTG_CLK_I2C_EN | OTG_CLK_HOST_EN;
writel(mask, &otg->otg_clk_ctrl);
ret = wait_for_bit(__func__, &otg->otg_clk_sts, mask, true,
CONFIG_SYS_HZ, false);
ret = wait_for_bit_le32(&otg->otg_clk_sts, mask, true,
CONFIG_SYS_HZ, false);
if (ret)
return ret;

12
drivers/usb/host/xhci-rcar.c
View File

@@ -55,18 +55,18 @@ static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
setbits_le32(regs + RCAR_USB3_DL_CTRL,
RCAR_USB3_DL_CTRL_FW_SET_DATA0);
ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL,
RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
10, false);
ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
10, false);
if (ret)
break;
}
clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL,
RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
10, false);
ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
10, false);
return ret;
}