arm: socfpga: Add the terasic de10-standard board
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: Humberto Naves <hsnaves@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
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Marek Vasut
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include/configs/socfpga_de10_standard.h
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include/configs/socfpga_de10_standard.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2022, Humberto Naves <hsnaves@gmail.com>
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*
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* Adapted from socfpga_de0_nano_soc.h
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*/
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#ifndef __CONFIG_TERASIC_DE10_STANDARD_H__
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#define __CONFIG_TERASIC_DE10_STANDARD_H__
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#include <asm/arch/base_addr_ac5.h>
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#endif /* __CONFIG_TERASIC_DE10_STANDARD_H__ */
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