configs: Finish migration of PHY_GIGE

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-07 22:00:34 -04:00
parent 6e7adf7037
commit 1989374b21
427 changed files with 350 additions and 98 deletions
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -30,7 +30,6 @@
 * NET options
 */
 #define CONFIG_SYS_RX_ETH_BUFFER	0
-#define CONFIG_PHY_GIGE
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #define CONFIG_PHY_MARVELL

--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -33,7 +33,6 @@
 * NET options
 */
 #define CONFIG_SYS_RX_ETH_BUFFER	0
-#define CONFIG_PHY_GIGE
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #define CONFIG_PHY_MARVELL

--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -679,7 +679,6 @@ unsigned long get_board_ddr_clk(void);

 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 #define CONFIG_SYS_FSL_B4860QDS_XFI_ERR
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -258,8 +258,6 @@ extern unsigned long get_sdram_size(void);

 #define CONFIG_ETHPRIME		"eTSEC1"

-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
-
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -457,8 +457,6 @@ combinations. this should be removed later

 #define CONFIG_ETHPRIME		"eTSEC1"

-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
-
 /* TBI PHY configuration for SGMII mode */
 #define CONFIG_TSEC_TBICR_SETTINGS ( \
 		TBICR_PHY_RESET \
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -394,8 +394,6 @@
 #define TSEC2_FLAGS		(TSEC_GIGABIT | TSEC_REDUCED)

 #define CONFIG_ETHPRIME		"eTSEC1"
-
-#define CONFIG_PHY_GIGE
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -419,7 +419,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 #ifdef CONFIG_TSEC_ENET

 #define CONFIG_MII
-#define CONFIG_PHY_GIGE		/* In case CONFIG_CMD_MII is specified */

 #define CONFIG_TSEC1

--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -546,8 +546,6 @@

 #define CONFIG_ETHPRIME		"eTSEC1"

-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
-
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -318,8 +318,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define TSEC3_PHYIDX		0

 #define CONFIG_ETHPRIME		"eTSEC1"
-
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -432,7 +432,6 @@ extern unsigned long get_clock_freq(void);

 /* Options are: eTSEC[0-3] */
 #define CONFIG_ETHPRIME		"eTSEC0"
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -519,8 +519,6 @@
 #define TSEC4_PHYIDX		0

 #define CONFIG_ETHPRIME		"eTSEC1"
-
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -629,8 +629,6 @@ extern unsigned long get_sdram_size(void);

 #define CONFIG_ETHPRIME		"eTSEC1"

-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
-
 /* TBI PHY configuration for SGMII mode */
 #define CONFIG_TSEC_TBICR_SETTINGS ( \
 		TBICR_PHY_RESET \
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -524,8 +524,6 @@
 #define TSEC2_PHYIDX		0

 #define CONFIG_ETHPRIME		"eTSEC1"
-
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -317,7 +317,6 @@ extern unsigned long get_clock_freq(void);

 /* For FM */
 #define CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */

 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -558,7 +558,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -743,7 +743,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC4"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -755,7 +755,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC4"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -617,7 +617,6 @@ unsigned long get_board_ddr_clk(void);

 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /* Enable VSC9953 L2 Switch driver */
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -753,7 +753,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg

 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC4"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -672,7 +672,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC3"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -622,7 +622,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC3"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -485,7 +485,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -259,7 +259,6 @@
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
@@ -667,7 +666,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -504,8 +504,6 @@
 #define TSEC2_PHYIDX	0
 #define TSEC3_PHYIDX	0

-#define CONFIG_PHY_GIGE	1	/* Include GbE speed/duplex detection */
-
 #endif

 #define CONFIG_HOSTNAME		UCP1020
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -357,7 +357,6 @@
 #define CONFIG_SF_DEFAULT_SPEED		24000000

 /* Network. */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC
 /* Enable Atheros phy driver */
 #define CONFIG_PHY_ATHEROS
--- a/include/configs/am335x_shc.h
+++ b/include/configs/am335x_shc.h
@@ -275,7 +275,6 @@
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT         10
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC

--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -100,7 +100,6 @@
 #endif

 /* Network. */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #endif	/* ! __CONFIG_AM335X_SL50_H */
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -242,7 +242,6 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT		10
-#define CONFIG_PHY_GIGE
 #endif

 #define CONFIG_DRIVER_TI_CPSW
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -84,7 +84,6 @@
 #define CONFIG_NET_RETRY_COUNT		10
 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
 #define CONFIG_MII			/* Required in net/eth.c */
-#define CONFIG_PHY_GIGE			/* per-board part of CPSW */
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs longer aneg time at 1G */

 #define CONFIG_SUPPORT_EMMC_BOOT
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@@ -55,7 +55,6 @@
 * Ethernet PHY configuration
 */
 #define CONFIG_MII
-#define CONFIG_PHY_GIGE

 /*
 * USB 1.1 configuration
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -302,7 +302,6 @@
 #endif

 /* Network. */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 #define CONFIG_MII
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -521,7 +521,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #define CONFIG_SF_DEFAULT_SPEED		24000000

 /* Network. */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 /*
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -100,7 +100,6 @@
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_GATEWAY
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS
 #define CONFIG_SYS_RX_ETH_BUFFER	64
 #define PHY_ANEG_TIMEOUT		8000
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -102,7 +102,6 @@
 #define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"

 /* Network. */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS

 /* NAND support */
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -53,7 +53,6 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS
 #define CONFIG_SYS_RX_ETH_BUFFER	64

--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -282,8 +282,6 @@

 #define CONFIG_ETHPRIME		"eTSEC1"

-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
-
 /*
 * USB
 */
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -571,7 +571,6 @@
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -395,7 +395,6 @@
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC4"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -112,7 +112,6 @@
 #define CONFIG_NET_RETRY_COUNT		10
 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
 #define CONFIG_MII			/* Required in net/eth.c */
-#define CONFIG_PHY_GIGE			/* per-board part of CPSW */
 #define CONFIG_PHY_TI

 /* SPI */
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -40,7 +40,6 @@
 #define EEPROM_ADDR_CHIP 0x120

 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #define CONFIG_FACTORYSET
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -98,7 +98,6 @@
 #define EEPROM_ADDR_CHIP 0x120

 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #define CONFIG_FACTORYSET
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -347,7 +347,6 @@ int get_scl(void);
 #define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR	0x11
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_ETHPRIME		"FM1@DTSEC5"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */

 /*
 * Environment
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -199,7 +199,6 @@

 #define CONFIG_ETHPRIME			"eTSEC2"

-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS

 #define CONFIG_HAS_ETH0
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -456,7 +456,6 @@ unsigned long get_board_ddr_clk(void);

 #define CONFIG_ETHPRIME			"eTSEC1"

-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_REALTEK

 #define CONFIG_HAS_ETH0
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -335,7 +335,6 @@

 #define CONFIG_ETHPRIME			"eTSEC1"

-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ATHEROS

 #define CONFIG_HAS_ETH0
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -249,7 +249,6 @@
 #define AQR105_IRQ_MASK			0x40000000

 #ifdef CONFIG_NET
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_REALTEK
 #endif
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -180,7 +180,6 @@
 #ifndef SPL_NO_FMAN

 #ifdef CONFIG_NET
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #define CONFIG_PHY_REALTEK
 #endif

--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -434,7 +434,6 @@ unsigned long get_board_ddr_clk(void);

 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */

 #endif

--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -488,7 +488,6 @@ unsigned long get_board_sys_clk(void);

 #define CONFIG_MII
 #define CONFIG_ETHPRIME		"DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_AQUANTIA
 #endif

--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -238,7 +238,6 @@

 #if defined(CONFIG_XILINX_AXIEMAC)
 # define CONFIG_MII		1
-# define CONFIG_PHY_GIGE	1
 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	1
 # define CONFIG_PHY_ATHEROS	1
 # define CONFIG_PHY_BROADCOM	1
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -88,7 +88,6 @@
 */
 #define CONFIG_MVNETA		/* Enable Marvell Gbe Controller Driver */
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE		/* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50
 #define CONFIG_PHY_MARVELL
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -93,7 +93,6 @@
 * Ethernet Driver configuration
 */
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE		/* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50

--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -70,7 +70,6 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
 #define CONFIG_PHY_BASE_ADR	1
-#define CONFIG_PHY_GIGE
 #define CONFIG_RESET_PHY_R
 #endif /* CONFIG_CMD_NET */

--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -714,8 +714,6 @@

 #define CONFIG_ETHPRIME	"eTSEC1"

-#define CONFIG_PHY_GIGE	1	/* Include GbE speed/duplex detection */
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #define CONFIG_HAS_ETH2
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -295,8 +295,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);

 #define CONFIG_ETHPRIME	"eTSEC1"

-#define CONFIG_PHY_GIGE	1	/* Include GbE speed/duplex detection */
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #undef CONFIG_HAS_ETH2
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -140,7 +140,6 @@
 #define CONFIG_USB_ETH_RNDIS
 #endif /* CONFIG_USB_MUSB_GADGET */

-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #endif	/* ! __CONFIG_PCM051_H */
--- a/include/configs/pepper.h
+++ b/include/configs/pepper.h
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_NS16550_COM1		0x44e09000

 /* Ethernet support */
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_RESET_DELAY 1000

--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -44,7 +44,6 @@
 #define EEPROM_ADDR_CHIP 0x120

 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #define CONFIG_FACTORYSET
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -479,7 +479,6 @@

 /* Options are: eTSEC[0-3] */
 #define CONFIG_ETHPRIME		"eTSEC0"
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #endif	/* CONFIG_TSEC_ENET */

 /*
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -222,7 +222,6 @@

 #define CONFIG_DRIVER_TI_CPSW
 #define CONFIG_MII
-#define CONFIG_PHY_GIGE
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -97,7 +97,6 @@
 #define CONFIG_DW_ALTDESCRIPTOR
 #define CONFIG_MII
 #define CONFIG_AUTONEG_TIMEOUT		(15 * CONFIG_SYS_HZ)
-#define CONFIG_PHY_GIGE
 #endif

 /*
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -247,7 +247,6 @@

 /* Options are: TSEC[0,1] */
 #define CONFIG_ETHPRIME		"TSEC0"
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */

 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -17,7 +17,6 @@
 /* Ethernet driver configuration */
 #define CONFIG_MII
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
-#define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */

 /* USBD driver configuration */
 #if defined(CONFIG_SPEAR_USBTTY)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -299,7 +299,6 @@ extern int soft_i2c_gpio_scl;
 #endif

 #ifdef CONFIG_SUNXI_GMAC
-#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
 #define CONFIG_PHY_ADDR		1
 #define CONFIG_MII			/* MII PHY management		*/
 #define CONFIG_PHY_REALTEK
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -228,7 +228,6 @@
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1@DTSEC1"
-#define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif

 /*
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -31,11 +31,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_CLK		166666666

-/*
- * Ethernet PHY configuration
- */
-#define CONFIG_PHY_GIGE
-
 /*
 * Even though the board houses Realtek RTL8211E PHY
 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -37,7 +37,6 @@
 #define EEPROM_ADDR_CHIP 0x120

 #undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
 #define CONFIG_PHY_SMSC

 #define CONFIG_FACTORYSET
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -178,7 +178,6 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ET1011C
 #define CONFIG_PHY_ET1011C_TX_CLK_FIX

--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -65,6 +65,5 @@
 #define CONFIG_CMD_MEMTEST

 #define CONFIG_CMD_MII
-#define CONFIG_PHY_GIGE

 #endif  /* __CONFIG_H */
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -74,7 +74,6 @@
 #define CONFIG_MII
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
 #define CONFIG_PHY_ADDR		0	/* PHY address */
-#define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */

 #define CONFIG_SPEAR_GPIO

--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -151,7 +151,6 @@
 # define CONFIG_PHY_MARVELL
 # define CONFIG_PHY_NATSEMI
 # define CONFIG_PHY_TI
-# define CONFIG_PHY_GIGE
 # define CONFIG_PHY_VITESSE
 # define CONFIG_PHY_REALTEK
 # define PHY_ANEG_TIMEOUT       20000
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -304,7 +304,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 * Networking options
 */
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_MII		1	/* MII PHY management */
 #define CONFIG_ETHPRIME		"eTSEC1"

--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -245,7 +245,6 @@
 * Networking options
 */
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_MII		1	/* MII PHY management */
 #define CONFIG_ETHPRIME		"eTSEC1"

--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -304,7 +304,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 * Networking options
 */
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_TSEC_TBI
 #define CONFIG_MII		1	/* MII PHY management */
 #define CONFIG_MII_DEFAULT_TSEC	1	/* Allow unregistered phys */
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -290,7 +290,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 * Networking options
 */
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
-#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_TSEC_TBI
 #define CONFIG_MII		1	/* MII PHY management */
 #define CONFIG_MII_DEFAULT_TSEC	1	/* Allow unregistered phys */