Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.09-rc2

xilinx:
- Add support for zybo z7 and ultra96
- Tune zynq and zynqmp mini configurations
- Move SYS_MALLOC_LEN to Kconfig

fdt
 - make static funcs

gpio:
- Fix soft gpio driver
- Fix Zynq gpio driver by using platdata

microblaze:
- Fix Kconfig entry

spi
- Move ISSI to Kconfig
This commit is contained in:
Tom Rini
2018-08-07 11:32:50 -04:00
40 changed files with 703 additions and 408 deletions

View File

@@ -67,7 +67,6 @@
#define CONFIG_SF_DEFAULT_SPEED 50000000
#define CONFIG_SERIAL_FLASH
#define CONFIG_HARD_SPI
#define CONFIG_SPI_FLASH_ISSI
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 1

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@@ -53,7 +53,6 @@
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#undef CONFIG_SPI_FLASH_WINBOND
#undef CONFIG_SPI_FLASH_ISSI
/* Setup proper boot sequences for Miami boards */

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@@ -31,5 +31,6 @@
#undef CONFIG_BOOTP_MAY_FAIL
#undef CONFIG_NR_DRAM_BANKS
#define CONFIG_NR_DRAM_BANKS 1
#endif /* __CONFIG_ZYNQMP_MINI_H */

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@@ -13,7 +13,6 @@
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN 0x800000

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@@ -13,7 +13,6 @@
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_SIZE 0x1000000
#define CONFIG_SYS_SDRAM_BASE 0x0
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000)

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@@ -13,7 +13,6 @@
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
#define CONFIG_SYS_MALLOC_LEN 0x2000

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@@ -43,7 +43,6 @@
/* QSPI */
#ifdef CONFIG_ZYNQ_QSPI
# define CONFIG_SF_DEFAULT_SPEED 30000000
# define CONFIG_SPI_FLASH_ISSI
#endif
/* NOR */
@@ -235,8 +234,6 @@
#define CONFIG_SYS_MEMTEST_START 0
#define CONFIG_SYS_MEMTEST_END 0x1000
#define CONFIG_SYS_MALLOC_LEN 0x1400000
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \

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@@ -36,7 +36,4 @@
#define CONFIG_SPL_BSS_START_ADDR 0x20000
#define CONFIG_SPL_BSS_MAX_SIZE 0x8000
#undef CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_MALLOC_LEN 0x1000
#endif /* __CONFIG_ZYNQ_CSE_H */