omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config instead of having it completely separated as suggested by Wolfgang Denk on http://lists.denx.de/pipermail/u-boot/2009-May/052247.html Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
This commit is contained in:
committed by
Wolfgang Denk
parent
cb32ed1fc2
commit
187af954cf
@@ -81,30 +81,38 @@ typedef struct ctrl_id {
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#define HS_DEVICE 0x2
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#define GP_DEVICE 0x3
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/* GPMC CS3/cs4/cs6 not avaliable */
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#define GPMC_BASE (OMAP34XX_GPMC_BASE)
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#define GPMC_CONFIG_CS0 0x60
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#define GPMC_CONFIG_CS5 0x150
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#define GPMC_CONFIG_CS0_BASE (GPMC_BASE + GPMC_CONFIG_CS0)
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#define GPMC_CONFIG_CS5_BASE (GPMC_BASE + GPMC_CONFIG_CS5)
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#define GPMC_CONFIG_WP 0x10
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#define GPMC_CONFIG_WIDTH 0x30
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#ifndef __ASSEMBLY__
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struct gpmc_cs {
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unsigned int config1; /* 0x00 */
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unsigned int config2; /* 0x04 */
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unsigned int config3; /* 0x08 */
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unsigned int config4; /* 0x0C */
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unsigned int config5; /* 0x10 */
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unsigned int config6; /* 0x14 */
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unsigned int config7; /* 0x18 */
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unsigned int nand_cmd; /* 0x1C */
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unsigned int nand_adr; /* 0x20 */
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unsigned int nand_dat; /* 0x24 */
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unsigned char res[8]; /* blow up to 0x30 byte */
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};
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typedef struct gpmc {
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unsigned char res1[0x10];
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unsigned int sysconfig; /* 0x10 */
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unsigned char res2[0x4];
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unsigned int irqstatus; /* 0x18 */
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unsigned int irqenable; /* 0x1C */
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unsigned int irqenable; /* 0x1C */
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unsigned char res3[0x20];
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unsigned int timeout_control; /* 0x40 */
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unsigned char res4[0xC];
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unsigned int config; /* 0x50 */
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unsigned int status; /* 0x54 */
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unsigned char res5[0x19C];
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unsigned char res5[0x8];
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struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */
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unsigned char res6[0x18];
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unsigned int ecc_config; /* 0x1F4 */
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unsigned int ecc_control; /* 0x1F8 */
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unsigned int ecc_size_config; /* 0x1FC */
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@@ -118,19 +126,6 @@ typedef struct gpmc {
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unsigned int ecc8_result; /* 0x21C */
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unsigned int ecc9_result; /* 0x220 */
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} gpmc_t;
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typedef struct gpmc_csx {
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unsigned int config1; /* 0x00 */
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unsigned int config2; /* 0x04 */
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unsigned int config3; /* 0x08 */
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unsigned int config4; /* 0x0C */
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unsigned int config5; /* 0x10 */
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unsigned int config6; /* 0x14 */
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unsigned int config7; /* 0x18 */
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unsigned int nand_cmd; /* 0x1C */
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unsigned int nand_adr; /* 0x20 */
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unsigned int nand_dat; /* 0x24 */
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} gpmc_csx_t;
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#else /* __ASSEMBLY__ */
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#define GPMC_CONFIG1 0x00
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#define GPMC_CONFIG2 0x04
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@@ -300,7 +300,6 @@
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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@@ -292,7 +292,6 @@
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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@@ -285,7 +285,6 @@
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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@@ -289,7 +289,6 @@
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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@@ -297,7 +297,6 @@
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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@@ -252,7 +252,6 @@
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#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
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#ifndef __ASSEMBLY__
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extern gpmc_csx_t *nand_cs_base;
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extern gpmc_t *gpmc_cfg_base;
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extern unsigned int boot_flash_base;
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extern volatile unsigned int boot_flash_env_addr;
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