Merge branch 'master' of git://git.denx.de/u-boot into master
Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
@@ -91,8 +91,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
#endif /* __MIGO_R_H */
|
||||
|
||||
@@ -37,9 +37,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -23,8 +23,8 @@
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
|
||||
|
||||
#include <configs/ti_omap3_common.h>
|
||||
#undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */
|
||||
|
||||
#undef CONFIG_DM_I2C_COMPAT
|
||||
#define CONFIG_REVISION_TAG
|
||||
|
||||
/* Hardware drivers */
|
||||
|
||||
@@ -112,8 +112,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
#endif /* __AP325RXA_H */
|
||||
|
||||
@@ -100,8 +100,6 @@
|
||||
#else
|
||||
#define CONFIG_SYS_CLK_FREQ 44444444
|
||||
#endif
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __AP_SH4A_4A_H */
|
||||
|
||||
@@ -18,6 +18,9 @@
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
#define CONFIG_TMU_TIMER
|
||||
#define CONFIG_SYS_TIMER_COUNTS_DOWN
|
||||
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
|
||||
#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
|
||||
/* STACK */
|
||||
@@ -91,8 +94,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 50000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __ARMADILLO_800EVA_H */
|
||||
|
||||
@@ -52,8 +52,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
/* ENV setting */
|
||||
#if !defined(CONFIG_MTD_NOR_FLASH)
|
||||
|
||||
@@ -36,6 +36,7 @@
|
||||
#define CONFIG_SYS_OSCIN_FREQ 24000000
|
||||
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
|
||||
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
|
||||
#ifdef CONFIG_DIRECT_NOR_BOOT
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
@@ -145,8 +146,11 @@
|
||||
* Flash & Environment
|
||||
*/
|
||||
#ifdef CONFIG_NAND
|
||||
#ifdef CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
|
||||
#define CONFIG_ENV_SIZE (128 << 10)
|
||||
#define CONFIG_ENV_SECT_SIZE (128 << 10)
|
||||
#endif
|
||||
#define CONFIG_SYS_NAND_USE_FLASH_BBT
|
||||
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
|
||||
#define CONFIG_SYS_NAND_PAGE_2K
|
||||
@@ -160,8 +164,7 @@
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x28000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
|
||||
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
|
||||
@@ -210,9 +213,11 @@
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USE_SPIFLASH
|
||||
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_SIZE (64 << 10)
|
||||
#define CONFIG_ENV_OFFSET (512 << 10)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 << 10)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 << 10)
|
||||
#endif
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#undef CONFIG_SPI_FLASH_MTD
|
||||
#endif
|
||||
|
||||
@@ -131,8 +131,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 41666666
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __ECOVEC_H */
|
||||
|
||||
@@ -69,9 +69,7 @@
|
||||
|
||||
/* Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 66666666
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
/* Ether */
|
||||
#define CONFIG_SH_ETHER_USE_PORT (1)
|
||||
|
||||
@@ -33,9 +33,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -33,9 +33,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -34,9 +34,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -49,9 +49,7 @@
|
||||
|
||||
/* Clocks */
|
||||
#define CONFIG_SYS_CLK_FREQ 24000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
/* UART */
|
||||
#define CONFIG_CONS_SCIF0 1
|
||||
|
||||
@@ -60,9 +60,7 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
/* PCMCIA */
|
||||
#define CONFIG_IDE_PCMCIA 1
|
||||
|
||||
@@ -82,8 +82,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
#endif /* __MS7722SE_H */
|
||||
|
||||
@@ -62,8 +62,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __MS7750SE_H */
|
||||
|
||||
@@ -38,9 +38,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -98,8 +98,6 @@
|
||||
#else
|
||||
#define CONFIG_SYS_CLK_FREQ 44444444
|
||||
#endif
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __R0P7734_H */
|
||||
|
||||
@@ -46,9 +46,7 @@
|
||||
* SuperH Clock setting
|
||||
*/
|
||||
#define CONFIG_SYS_CLK_FREQ 60000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
|
||||
|
||||
/*
|
||||
|
||||
@@ -71,9 +71,7 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
/* PCI Controller */
|
||||
#if defined(CONFIG_CMD_PCI)
|
||||
|
||||
@@ -22,7 +22,6 @@
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
|
||||
#define CONFIG_TMU_TIMER
|
||||
#ifndef CONFIG_PINCTRL_PFC
|
||||
#define CONFIG_SH_GPIO_PFC
|
||||
#endif
|
||||
@@ -57,4 +56,10 @@
|
||||
#undef CONFIG_SPI_FLASH_MTD
|
||||
#endif
|
||||
|
||||
/* Timer */
|
||||
#define CONFIG_TMU_TIMER
|
||||
#define CONFIG_SYS_TIMER_COUNTS_DOWN
|
||||
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
|
||||
#define CONFIG_SYS_TIMER_RATE (32500000 / 4) /* CP/4 */
|
||||
|
||||
#endif /* __RCAR_GEN2_COMMON_H */
|
||||
|
||||
@@ -58,7 +58,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
|
||||
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
|
||||
|
||||
@@ -47,7 +47,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 36000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
|
||||
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
|
||||
|
||||
@@ -46,7 +46,6 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 66125000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
|
||||
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
|
||||
|
||||
@@ -75,7 +75,5 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 48000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
#endif /* __SH7752EVB_H */
|
||||
|
||||
@@ -75,7 +75,5 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 48000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
#endif /* __SH7753EVB_H */
|
||||
|
||||
@@ -87,7 +87,5 @@
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 48000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
#endif /* __SH7757LCR_H */
|
||||
|
||||
@@ -69,9 +69,7 @@
|
||||
|
||||
/* Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 66666666
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
|
||||
|
||||
/* Ether */
|
||||
#define CONFIG_SH_ETHER_USE_PORT (1)
|
||||
|
||||
@@ -126,8 +126,6 @@
|
||||
/* Board Clock */
|
||||
/* The SCIF used external clock. system clock only used timer. */
|
||||
#define CONFIG_SYS_CLK_FREQ 50000000
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#endif /* __SH7785LCR_H */
|
||||
|
||||
@@ -78,9 +78,7 @@
|
||||
#else
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#endif /* CONFIG_T_SH7706LSR */
|
||||
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
/* Network device */
|
||||
#define CONFIG_DRIVER_NE2000
|
||||
|
||||
@@ -38,9 +38,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -202,6 +202,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
|
||||
* 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
|
||||
*
|
||||
*/
|
||||
#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex"
|
||||
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
|
||||
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
|
||||
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
|
||||
@@ -215,6 +216,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
|
||||
|
||||
/* SPL SDMMC boot support */
|
||||
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
|
||||
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
|
||||
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -42,9 +42,6 @@
|
||||
/* Board Clock */
|
||||
#define RMOBILE_XTAL_CLK 20000000u
|
||||
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
|
||||
#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
|
||||
|
||||
#define CONFIG_SYS_TMU_CLK_DIV 4
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
|
||||
@@ -27,12 +27,10 @@
|
||||
/* NS16550 Configuration */
|
||||
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
|
||||
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#if !defined(CONFIG_DM_SERIAL)
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
||||
#endif /* !CONFIG_DM_SERIAL */
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
|
||||
115200}
|
||||
|
||||
|
||||
@@ -47,8 +47,6 @@
|
||||
/*-----------------------------------------------------------------------
|
||||
* Serial Configuration
|
||||
*/
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
|
||||
9600, 19200, 38400, 115200}
|
||||
#define CONFIG_SYS_NS16550_PORT_MAPPED
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
||||
@@ -1,75 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Renesas Solutions Corp.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __SH_TMU_H
|
||||
#define __SH_TMU_H
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
#if defined(CONFIG_CPU_SH3)
|
||||
struct tmu_regs {
|
||||
u8 tocr;
|
||||
u8 reserved0;
|
||||
u8 tstr;
|
||||
u8 reserved1;
|
||||
u32 tcor0;
|
||||
u32 tcnt0;
|
||||
u16 tcr0;
|
||||
u16 reserved2;
|
||||
u32 tcor1;
|
||||
u32 tcnt1;
|
||||
u16 tcr1;
|
||||
u16 reserved3;
|
||||
u32 tcor2;
|
||||
u32 tcnt2;
|
||||
u16 tcr2;
|
||||
u16 reserved4;
|
||||
u32 tcpr2;
|
||||
};
|
||||
#endif /* CONFIG_CPU_SH3 */
|
||||
|
||||
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
|
||||
struct tmu_regs {
|
||||
u32 reserved;
|
||||
u8 tstr;
|
||||
u8 reserved2[3];
|
||||
u32 tcor0;
|
||||
u32 tcnt0;
|
||||
u16 tcr0;
|
||||
u16 reserved3;
|
||||
u32 tcor1;
|
||||
u32 tcnt1;
|
||||
u16 tcr1;
|
||||
u16 reserved4;
|
||||
u32 tcor2;
|
||||
u32 tcnt2;
|
||||
u16 tcr2;
|
||||
u16 reserved5;
|
||||
};
|
||||
#endif /* CONFIG_CPU_SH4 */
|
||||
|
||||
static inline unsigned long get_tmu0_clk_rate(void)
|
||||
{
|
||||
return CONFIG_SH_TMU_CLK_FREQ;
|
||||
}
|
||||
|
||||
#endif /* __SH_TMU_H */
|
||||
Reference in New Issue
Block a user