From f4ef476d2061853ca9a348ec15ce04d2558c755b Mon Sep 17 00:00:00 2001 From: Jagdish Gediya Date: Tue, 5 Jun 2018 09:04:05 +0530 Subject: [PATCH 01/19] armv8: ls1088a: change dpl load command from apply to lazyapply use "fsl_mc lazyapply dpl addr" instead of "fsl_mc apply dpl addr" change dpl load addr to 0x80001000 from 0x80200000 because dpl gets corrupted at 0x80200000 during bootm command excecution. Signed-off-by: Jagdish Gediya Reviewed-by: York Sun --- include/configs/ls1088a_common.h | 10 +++++----- include/configs/ls1088ardb.h | 12 ++++++------ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 137a181217..df81be1971 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -195,17 +195,17 @@ unsigned long long get_qixis_addr(void); #if defined(CONFIG_QSPI_BOOT) #define CONFIG_BOOTCOMMAND "sf probe 0:0;" \ - "sf read 0x80200000 0xd00000 0x100000;"\ - " fsl_mc apply dpl 0x80200000 &&" \ + "sf read 0x80001000 0xd00000 0x100000;"\ + " fsl_mc lazyapply dpl 0x80001000 &&" \ " sf read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\ - " fsl_mc apply dpl 0x80200000 &&" \ +#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\ + " fsl_mc lazyapply dpl 0x80001000 &&" \ " mmc read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #else /* NOR BOOT*/ -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 4459994eb4..d0ab2fa39e 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -381,8 +381,8 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "env exists mcinitcmd && run mcinitcmd && " \ - "mmc read 0x80200000 0x6800 0x800;" \ - "fsl_mc apply dpl 0x80200000;" \ + "mmc read 0x80001000 0x6800 0x800;" \ + "fsl_mc lazyapply dpl 0x80001000;" \ "bootm $load_addr#ls1088ardb\0" \ "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ @@ -402,11 +402,11 @@ #if defined(CONFIG_QSPI_BOOT) /* Try to boot an on-QSPI kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND \ - "sf read 0x80200000 0xd00000 0x100000;" \ + "sf read 0x80001000 0xd00000 0x100000;" \ "env exists mcinitcmd && env exists secureboot " \ " && sf read 0x80780000 0x780000 0x100000 " \ "&& esbc_validate 0x80780000;env exists mcinitcmd " \ - "&& fsl_mc apply dpl 0x80200000;" \ + "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run qspi_bootcmd;" \ "env exists secureboot && esbc_halt;" @@ -414,11 +414,11 @@ #elif defined(CONFIG_SD_BOOT) #define CONFIG_BOOTCOMMAND \ "env exists mcinitcmd && mmcinfo; " \ - "mmc read 0x80200000 0x6800 0x800; " \ + "mmc read 0x80001000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ " && mmc read 0x80780000 0x3800 0x10 " \ "&& esbc_validate 0x80780000;env exists mcinitcmd " \ - "&& fsl_mc apply dpl 0x80200000;" \ + "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run sd_bootcmd;" \ "env exists secureboot && esbc_halt;" #endif From d264fadac5ada4e587692c8968ae41f315e875f5 Mon Sep 17 00:00:00 2001 From: Vinitha V Pillai Date: Thu, 7 Jun 2018 10:05:14 +0530 Subject: [PATCH 02/19] LS1043ARBD: Fix SD Boot issue with PPA CONFIG_SPL_FSL_LS_PPA is needed only in case of falcon boot Support for this is not present in PPA currently, so removing the default option from defconfig Signed-off-by: Vinitha V Pillai Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- configs/ls1043ardb_sdcard_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 64b5bb69aa..09ff4c32f7 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y -CONFIG_SPL_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y From a7943fd4c81936eb1f39456d306ceaf2ccb7e646 Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Mon, 18 Jun 2018 20:25:05 +0800 Subject: [PATCH 03/19] armv8: ls2080ardb: update copyright claim This patch updates the copyright claim for the issues reported by legal review. Signed-off-by: Alison Wang Reviewed-by: York Sun --- board/freescale/ls2080ardb/ls2080ardb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 683fe44588..46b18cf00b 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 NXP Semiconductors * Copyright 2015 Freescale Semiconductor + * Copyright 2017 NXP */ #include #include From fe6636f14ca1089ae888855da6c22d0759e9ee8a Mon Sep 17 00:00:00 2001 From: Vinitha V Pillai Date: Wed, 20 Jun 2018 18:59:12 +0530 Subject: [PATCH 04/19] LS1088ARDB: Secure Boot:Change load address of dpl header in SD Change address of DPL header in SD. Signed-off-by: Vinitha V Pillai Reviewed-by: York Sun --- include/configs/ls1088ardb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index d0ab2fa39e..36243f92c1 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -416,7 +416,7 @@ "env exists mcinitcmd && mmcinfo; " \ "mmc read 0x80001000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x80780000 0x3800 0x10 " \ + " && mmc read 0x80780000 0x3C00 0x10 " \ "&& esbc_validate 0x80780000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80001000;" \ "run distro_bootcmd;run sd_bootcmd;" \ From e90cc47510ef5e08ecd60ba36fd4276fb4fe0e82 Mon Sep 17 00:00:00 2001 From: Ashish Kumar Date: Tue, 26 Jun 2018 14:48:30 +0530 Subject: [PATCH 05/19] configs: Disable 4k erase sector size for spansion "s25fs512s" flash 4K erase size is used only in case of hydrid mode which is not supported on any NXP platform with flash "s25fs512s". Supported mode is uniform sector, with erase size 256kiB. Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088aqds_qspi_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_qspi_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + 16 files changed, 16 insertions(+) diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 37b63ffb4c..ecd99351e0 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -34,6 +34,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 2bc13beb2f..b5f5d010ad 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -31,6 +31,7 @@ CONFIG_DM=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y CONFIG_E1000=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 1f9b76ad34..69d31b5971 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -39,6 +39,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y CONFIG_E1000=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 7dcfaaed4a..ef803bcbc4 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -36,6 +36,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 6a8485c1cd..3db6591f65 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -35,6 +35,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y CONFIG_E1000=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index f89c5546d5..b2c18854f0 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -30,6 +30,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index e3b2fccc55..6ebb7a60f1 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 7405c87437..139e1abfbe 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index feab749ab2..45bef3dc65 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 6c2ed9af3d..c7611025e1 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index f066412393..a7bed8ce06 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index e4724c7a0d..f724bd3ad6 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -42,6 +42,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 3212704651..d0334a239f 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index cb8a1075e3..d806966540 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 62db1c1e0d..59356095cd 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 8ae3faee95..bf1c0a2d7b 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -42,6 +42,7 @@ CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y From 32dab9100ef27a85e6b4630faa998247a5d03167 Mon Sep 17 00:00:00 2001 From: Ashish Kumar Date: Tue, 26 Jun 2018 16:50:57 +0530 Subject: [PATCH 06/19] armv8: ls2088ardb: Move CONFIG_SPI_FLASH, CONFIG_SPI_FLASH_SPANSION to defconfig Move CONFIG_SPI_FLASH_SPANSION, CONFIG_SPI_FLASH, to defconfig. Also disable disable 4K erase size option. Signed-off-by: Ashish Kumar Reviewed-by: York Sun --- configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 3 +++ configs/ls2088ardb_qspi_defconfig | 3 +++ include/configs/ls2080ardb.h | 4 ---- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 24bcd573dc..9a9c33a173 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -27,6 +27,9 @@ CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 18a9634342..1384768ddf 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -31,6 +31,9 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 73a405f8d9..84c6b7b2ab 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -281,13 +281,9 @@ unsigned long get_board_sys_clk(void); /* SPI */ #if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI) -#define CONFIG_SPI_FLASH #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH_STMICRO #endif -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION -#endif #define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */ #define FSL_QSPI_FLASH_NUM 2 #endif From 02d8dc96784d996dae599010749eb04ca2a6e896 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 09:41:24 -0700 Subject: [PATCH 07/19] armv8: ls1046ardb: ls1046aqds: Move SPL macros to defconfig Instead of defining Kconfig macros in header file, move them to defconfig files. Signed-off-by: York Sun --- configs/ls1046aqds_sdcard_ifc_defconfig | 8 ++++++++ configs/ls1046aqds_sdcard_qspi_defconfig | 8 ++++++++ configs/ls1046ardb_emmc_defconfig | 8 ++++++++ configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 8 ++++++++ configs/ls1046ardb_sdcard_defconfig | 8 ++++++++ include/configs/ls1046a_common.h | 9 --------- 6 files changed, 40 insertions(+), 9 deletions(-) diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 2cee1338b8..b0538c131c 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -1,8 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y @@ -17,6 +21,10 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 6ebb7a60f1..d067ba9a54 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -1,8 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y @@ -17,6 +21,10 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 3dfc1647f6..9e4f2751e7 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -1,8 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -17,6 +21,10 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 67467df3ba..5c1ab6eeb1 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -1,9 +1,13 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -16,6 +20,10 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y CONFIG_CMD_GPT=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index e8a0155fd2..e82d389309 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -1,8 +1,12 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -16,6 +20,10 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 65ce098f76..9d4422ad79 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -59,15 +59,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_ENV_SUPPORT -#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT -#define CONFIG_SPL_WATCHDOG_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_DRIVERS_MISC_SUPPORT - -#define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */ #define CONFIG_SPL_STACK 0x10020000 From 61ab8aac608a35d814b1b4e17712475ebeb20ccb Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:26:02 -0700 Subject: [PATCH 08/19] armv8: layerscape: Enabled I-cache for SPL boot Enable I-cache for SPL boot to boost performance. Earlier MMU was enabled only for LS2080A and has since been dropped by commit f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build"). Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index dba4b40607..f1d6fd63b9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -52,6 +52,7 @@ void spl_board_init(void) void board_init_f(ulong dummy) { + icache_enable(); /* Clear global data */ memset((void *)gd, 0, sizeof(gd_t)); board_early_init_f(); From ed167eb1c75817345184ea85d08cc75d27604145 Mon Sep 17 00:00:00 2001 From: Yuantian Tang Date: Fri, 13 Jul 2018 17:25:28 +0800 Subject: [PATCH 09/19] armv8: fsl: remove sata support Remove the old implementation in order to enable DM for sata. Signed-off-by: Tang Yuantian Reviewed-by: Simon Glass Reviewed-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 54 ------------------- .../arm/include/asm/arch-fsl-layerscape/soc.h | 32 ----------- 2 files changed, 86 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index bfd663942a..8028d5228f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -6,8 +6,6 @@ #include #include #include -#include -#include #include #include #include @@ -330,36 +328,6 @@ void fsl_lsch3_early_init_f(void) #endif } -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci; - -#ifdef CONFIG_SYS_SATA2 - ccsr_ahci = (void *)CONFIG_SYS_SATA2; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); -#endif - -#ifdef CONFIG_SYS_SATA1 - ccsr_ahci = (void *)CONFIG_SYS_SATA1; - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA1); - scsi_scan(false); -#endif - - return 0; -} -#endif - /* Get VDD in the unit mV from voltage ID */ int get_core_volt_from_fuse(void) { @@ -400,25 +368,6 @@ int get_core_volt_from_fuse(void) } #elif defined(CONFIG_FSL_LSCH2) -#ifdef CONFIG_SCSI_AHCI_PLAT -int sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA; - - /* Disable SATA ECC */ - out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000); - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); - - ahci_init((void __iomem *)CONFIG_SYS_SATA); - scsi_scan(false); - - return 0; -} -#endif static void erratum_a009929(void) { @@ -719,9 +668,6 @@ int qspi_ahb_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - sata_init(); -#endif #ifdef CONFIG_CHAIN_OF_TRUST fsl_setenv_chain_of_trust(); #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 9a219a6a1d..6e3a420f48 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -85,39 +85,7 @@ struct cpu_type { #define SVR_DEV(svr) ((svr) >> 8) #define IS_SVR_DEV(svr, dev) (((svr) >> 16) == (dev)) -/* ahci port register default value */ -#define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY2_CFG 0x28184d1f -#define AHCI_PORT_PHY3_CFG 0x0e081509 -#define AHCI_PORT_TRANS_CFG 0x08000029 -#define AHCI_PORT_AXICC_CFG 0x3fffffff - #ifndef __ASSEMBLY__ -/* AHCI (sata) register map */ -struct ccsr_ahci { - u32 res1[0xa4/4]; /* 0x0 - 0xa4 */ - u32 pcfg; /* port config */ - u32 ppcfg; /* port phy1 config */ - u32 pp2c; /* port phy2 config */ - u32 pp3c; /* port phy3 config */ - u32 pp4c; /* port phy4 config */ - u32 pp5c; /* port phy5 config */ - u32 axicc; /* AXI cache control */ - u32 paxic; /* port AXI config */ - u32 axipc; /* AXI PROT control */ - u32 ptc; /* port Trans Config */ - u32 pts; /* port Trans Status */ - u32 plc; /* port link config */ - u32 plc1; /* port link config1 */ - u32 plc2; /* port link config2 */ - u32 pls; /* port link status */ - u32 pls1; /* port link status1 */ - u32 pcmdc; /* port CMD config */ - u32 ppcs; /* port phy control status */ - u32 pberr; /* port 0/1 BIST error */ - u32 cmds; /* port 0/1 CMD status error */ -}; - #ifdef CONFIG_FSL_LSCH3 void fsl_lsch3_early_init_f(void); int get_core_volt_from_fuse(void); From 86bff2bb095bbf1308670274ce0a13c6311aa02b Mon Sep 17 00:00:00 2001 From: Yuantian Tang Date: Fri, 13 Jul 2018 17:25:29 +0800 Subject: [PATCH 10/19] armv8: dts: fsl-ls1012a: add sata node support One ls1012a, there is one SATA 3.0 advanced host controller interface which is a high-performance SATA solution that delivers comprehensive and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in accordance with the serial ATA revision 3.0 of Serial ATA International Organization. Add sata node to support this feature. Signed-off-by: Tang Yuantian Reviewed-by: Simon Glass Reviewed-by: York Sun --- arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 4 ++++ arch/arm/dts/fsl-ls1012a-qds.dtsi | 4 ++++ arch/arm/dts/fsl-ls1012a-rdb.dtsi | 4 ++++ arch/arm/dts/fsl-ls1012a.dtsi | 8 ++++++++ 4 files changed, 20 insertions(+) diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts index db23cf87ed..cdd4ce45aa 100644 --- a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -40,3 +40,7 @@ &duart0 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a-qds.dtsi b/arch/arm/dts/fsl-ls1012a-qds.dtsi index d069b603ab..661af0e49e 100644 --- a/arch/arm/dts/fsl-ls1012a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1012a-qds.dtsi @@ -125,3 +125,7 @@ status = "okay"; phy_type = "ulpi"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a-rdb.dtsi b/arch/arm/dts/fsl-ls1012a-rdb.dtsi index 201e5faead..757e2eb351 100644 --- a/arch/arm/dts/fsl-ls1012a-rdb.dtsi +++ b/arch/arm/dts/fsl-ls1012a-rdb.dtsi @@ -34,3 +34,7 @@ &duart0 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index be99076550..f22cbf4b2a 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -134,6 +134,14 @@ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; + sata: sata@3200000 { + compatible = "fsl,ls1012a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>; + interrupts = <0 69 4>; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + usb0: usb2@8600000 { compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; reg = <0x0 0x8600000 0x0 0x1000>; From 79ed61e9f076f3382fa67a7f2418dd94e290cbff Mon Sep 17 00:00:00 2001 From: Yuantian Tang Date: Fri, 13 Jul 2018 17:25:30 +0800 Subject: [PATCH 11/19] scsi: ceva: add ls1012a soc support Make the code structure more general so that more socs can be added easily and also remove speed limitation restriction. Add the ls1012a sata support as well. Signed-off-by: Tang Yuantian Reviewed-by: Michal Simek Tested-by: Michal Simek (with and without CONFIG_OF_LIVE on zynqmp zcu102) Reviewed-by: York Sun --- drivers/ata/sata_ceva.c | 87 ++++++++++++++++++++++++----------------- 1 file changed, 52 insertions(+), 35 deletions(-) diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index a7d45e81cf..047cff7f83 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -7,8 +7,6 @@ #include #include #include -#include - #include /* Vendor Specific Register Offsets */ @@ -18,6 +16,7 @@ #define AHCI_VEND_PP3C 0xB0 #define AHCI_VEND_PP4C 0xB4 #define AHCI_VEND_PP5C 0xB8 +#define AHCI_VEND_AXICC 0xBc #define AHCI_VEND_PAXIC 0xC0 #define AHCI_VEND_PTC 0xC8 @@ -72,45 +71,57 @@ #define DRV_NAME "ahci-ceva" #define CEVA_FLAG_BROKEN_GEN2 1 -struct ceva_sata_priv { - ulong base; +/* flag bit definition */ +#define FLAG_COHERENT 1 + +/* register config value */ +#define CEVA_PHY1_CFG 0xa003fffe +#define CEVA_PHY2_CFG 0x28184d1f +#define CEVA_PHY3_CFG 0x0e081509 +#define CEVA_TRANS_CFG 0x08000029 +#define CEVA_AXICC_CFG 0x3fffffff + +/* ecc addr-val pair */ +#define ECC_DIS_ADDR_CH2 0x80000000 +#define ECC_DIS_VAL_CH2 0x20140520 + +enum ceva_soc { + CEVA_1V84, + CEVA_LS1012A, }; -static int ceva_init_sata(ulong mmio) +struct ceva_sata_priv { + ulong base; + enum ceva_soc soc; + ulong flag; +}; + +static int ceva_init_sata(struct ceva_sata_priv *priv) { + ulong base = priv->base; ulong tmp; - int i; - /* - * AXI Data bus width to 64 - * Set Mem Addr Read, Write ID for data transfers - * Transfer limit to 72 DWord - */ - tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; - writel(tmp, mmio + AHCI_VEND_PAXIC); - - /* Set AHCI Enable */ - tmp = readl(mmio + HOST_CTL); - tmp |= HOST_AHCI_EN; - writel(tmp, mmio + HOST_CTL); - - for (i = 0; i < NR_PORTS; i++) { - /* TPSS TPRS scalars, CISE and Port Addr */ - tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i); - writel(tmp, mmio + AHCI_VEND_PCFG); - - /* Port Phy Cfg register enables */ + switch (priv->soc) { + case CEVA_1V84: + tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; + writel(tmp, base + AHCI_VEND_PAXIC); + tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | PCFG_PAD_VAL; + writel(tmp, base + AHCI_VEND_PCFG); tmp = PPCFG_TTA | PPCFG_PSS_EN | PPCFG_ESDF_EN; - writel(tmp, mmio + AHCI_VEND_PPCFG); - - /* Rx Watermark setting */ + writel(tmp, base + AHCI_VEND_PPCFG); tmp = PTC_RX_WM_VAL | PTC_RSVD; - writel(tmp, mmio + AHCI_VEND_PTC); + writel(tmp, base + AHCI_VEND_PTC); + break; - /* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */ - tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM; - writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); + case CEVA_LS1012A: + writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2); + writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); + writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); + if (priv->flag & FLAG_COHERENT) + writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC); + break; } + return 0; } @@ -125,13 +136,14 @@ static int sata_ceva_probe(struct udevice *dev) { struct ceva_sata_priv *priv = dev_get_priv(dev); - ceva_init_sata(priv->base); + ceva_init_sata(priv); return ahci_probe_scsi(dev, priv->base); } static const struct udevice_id sata_ceva_ids[] = { - { .compatible = "ceva,ahci-1v84" }, + { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 }, + { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A }, { } }; @@ -139,10 +151,15 @@ static int sata_ceva_ofdata_to_platdata(struct udevice *dev) { struct ceva_sata_priv *priv = dev_get_priv(dev); - priv->base = devfdt_get_addr(dev); + if (dev_read_bool(dev, "dma-coherent")) + priv->flag |= FLAG_COHERENT; + + priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; + priv->soc = dev_get_driver_data(dev); + return 0; } From 1dc4dea75d3f53fb346f639ce2f2cf300a3ac3b5 Mon Sep 17 00:00:00 2001 From: Yuantian Tang Date: Fri, 13 Jul 2018 17:25:31 +0800 Subject: [PATCH 12/19] arm64: ls1012a: enable DM support for sata Enable related configs to support sata DM feature. Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- configs/ls1012a2g5rdb_qspi_defconfig | 6 +++++- configs/ls1012aqds_qspi_defconfig | 7 ++++++- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 7 ++++++- configs/ls1012ardb_qspi_defconfig | 7 ++++++- 4 files changed, 23 insertions(+), 4 deletions(-) diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index ecd99351e0..3b0b42f37e 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -29,7 +29,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_BLK=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -45,3 +45,7 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI=y +CONFIG_AHCI=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 69d31b5971..09c301b201 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -34,7 +34,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y -# CONFIG_BLK is not set +CONFIG_BLK=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -57,3 +57,8 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index ef803bcbc4..c444127f17 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_BLK=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -54,3 +54,8 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 3db6591f65..ee9f606ed9 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -30,7 +30,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -# CONFIG_BLK is not set +CONFIG_BLK=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y @@ -52,3 +52,8 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y From 80bec96ecf3b99fa96c7e658af208eeaf3fe593f Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 8 Jun 2018 16:37:27 -0700 Subject: [PATCH 13/19] armv8: ls1046ardb: Enable IFC for SPL build Commit a52ff334c5b1 ("armv8: ls1046ardb: SPL size reduction") reduced image size for SPL. IFC was disabled. If PPA is loaded in SPL, MMU is enabled as a result. Removing IFC skips IFC region in the MMU table, causing later failure in RAM version U-boot when accessing CPLD through IFC. Only disable IFC if PPA is not enabled for SPL. Signed-off-by: York Sun --- include/configs/ls1046a_common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 9d4422ad79..3abcd7bcf4 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -19,7 +19,9 @@ #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) #define SPL_NO_MMC #endif -#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#if defined(CONFIG_SPL_BUILD) && \ + defined(CONFIG_SD_BOOT) && \ + !defined(CONFIG_SPL_FSL_LS_PPA) #define SPL_NO_IFC #endif From 18b6dd6cb05646782ffc6c31594fe7c3881bda2d Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 14 Jun 2018 14:25:51 -0700 Subject: [PATCH 14/19] armv8: layerscape: Drop u-boot-with-spl.bin for selected boards For SPL boot with PBL, u-boot-with-spl-pbl.bin is the final image. Drop unused u-boot-with-spl.bin. Signed-off-by: York Sun CC: Mingkai Hu CC: Ruchika Gupta CC: Prabhakar Kushwaha CC: Udit Agarwal CC: Sumit Garg CC: Priyanka Jain --- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - 4 files changed, 6 deletions(-) diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 73f23a63dd..656d10dffb 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -60,7 +60,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x17000 @@ -90,7 +89,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 3abcd7bcf4..fda3f3b206 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -60,7 +60,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */ #define CONFIG_SPL_STACK 0x10020000 @@ -88,7 +87,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index df81be1971..031c311a3c 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -224,7 +224,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x1800a000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index cc101fd01b..5024f97326 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -206,7 +206,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x1800a000 #ifdef CONFIG_NAND_BOOT From 67b4f5302a40bd9a963e48d964a5895d60f75e8f Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 14 Jun 2018 14:25:52 -0700 Subject: [PATCH 15/19] powerpc: mpc85xx: Drop u-boot-with-spl.bin on selected boards For SoCs with PBL, u-boot-with-spl-pbl.bin is the final image for SPL boot. Drop unused u-boot-with-spl.bin. Signed-off-by: York Sun CC: Ashish Kumar CC: Ruchika Gupta CC: Priyanka Jain CC: Shengzhou Liu --- include/configs/B4860QDS.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240QDS.h | 1 - include/configs/T4240RDB.h | 1 - 8 files changed, 8 deletions(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 723d18ee23..9dd560edcb 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -17,7 +17,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index b65477e396..d88c9678dd 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -29,7 +29,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b04a72662c..27948ba3b6 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -32,7 +32,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index c8bec69542..4d097747a3 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -21,7 +21,6 @@ #endif #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index cf63e7117f..68ce7aa7ad 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ba3aafe1e2..90043eed5a 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 9714e44699..804d41bea9 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -21,7 +21,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 5bc63d207b..4abe554080 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -21,7 +21,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 From 7550dbe38b3ffb49f1ea290beeaf633606c6c869 Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 14 Jun 2018 14:38:48 -0700 Subject: [PATCH 16/19] spl: Add option SPL_PAYLOAD Some legacy boards use RAW image for SPL boot. Add Kconfig option SPL_PAYLOAD to set alternative image. Signed-off-by: York Sun Reviewed-by: Tom Rini --- Makefile | 4 ++-- common/spl/Kconfig | 10 ++++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 79cbad22db..36c145b71b 100644 --- a/Makefile +++ b/Makefile @@ -1111,8 +1111,8 @@ u-boot.sha1: u-boot.bin u-boot.dis: u-boot $(OBJDUMP) -d $< > $@ -ifdef CONFIG_TPL -SPL_PAYLOAD := tpl/u-boot-with-tpl.bin +ifneq ($(CONFIG_SPL_PAYLOAD),) +SPL_PAYLOAD := $(CONFIG_SPL_PAYLOAD:"%"=%) else SPL_PAYLOAD := u-boot.bin endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 99c9053ab8..2af26a881a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -553,6 +553,16 @@ config SYS_OS_BASE endif # SPL_OS_BOOT +config SPL_PAYLOAD + string "SPL payload" + default "tpl/u-boot-with-tpl.bin" if TPL + default "u-boot.bin" + help + Payload for SPL boot. For backward compability, default to + u-boot.bin, i.e. RAW image without any header. In case of + TPL, tpl/u-boot-with-tpl.bin. For new boards, suggest to + use u-boot.img. + config SPL_PCI_SUPPORT bool "Support PCI drivers" help From 996060927540904b956513d087192f67b6419133 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:48:28 -0700 Subject: [PATCH 17/19] armv8: layerscape: spl: Initialize QSPI AHB for QSPI boot To get full access of QSPI space, initialize AHB interface. Signed-off-by: York Sun --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 4 ++++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index f1d6fd63b9..3bb6e5b3db 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -11,6 +11,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -102,6 +103,9 @@ void board_init_f(ulong dummy) gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); gd->arch.tlb_allocated = gd->arch.tlb_addr; #endif /* CONFIG_SPL_FSL_LS_PPA */ +#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT) + qspi_ahb_init(); +#endif } #ifdef CONFIG_SPL_OS_BOOT diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 6e3a420f48..61b6e4bf07 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -98,6 +98,9 @@ int board_setup_core_volt(u32 vdd); void init_pfe_scfg_dcfg_regs(void); #endif #endif +#ifdef CONFIG_QSPI_AHB_INIT +int qspi_ahb_init(void); +#endif void cpu_name(char *name); #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 From 038b965c2b403c8087ca0515f907b730be57d739 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 26 Jun 2018 14:48:29 -0700 Subject: [PATCH 18/19] armv8: ls1046ardb: Add falcon mode for for QSPI boot A new defconfig is introduced to support SPL boot from QSPI NOR flash. This is to support falcon mode for faster booting into Linux. Signed-off-by: York Sun --- .../armv8/fsl-layerscape/doc/README.falcon | 10 +++ arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 + .../ls1046ardb/ls1046ardb_qspi_pbi.cfg | 26 ++++++++ .../ls1046ardb/ls1046ardb_rcw_qspi.cfg | 7 ++ configs/ls1046ardb_qspi_spl_defconfig | 65 +++++++++++++++++++ include/configs/ls1046a_common.h | 19 +++++- include/configs/ls1046ardb.h | 12 ++-- 7 files changed, 136 insertions(+), 6 deletions(-) create mode 100644 board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg create mode 100644 board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg create mode 100644 configs/ls1046ardb_qspi_spl_defconfig diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon index a00b5bc9c3..7dae9f03c3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -129,6 +129,16 @@ Example: The "loadables" is not optional. It tells SPL which images to load into memory. +Falcon mode with QSPI boot +-------------------------- +To use falcon mode with QSPI boot, SPL needs to be enabled. Similar to SD or +NAND boot, a RAM version full feature U-Boot is needed. Unlike SD or NAND boot, +SPL with QSPI doesn't need to combine SPL image with RAM version image. Two +separated images are used, u-boot-spl.pbl and u-boot.img. The former is SPL +image with RCW and PBI commands to load the SPL payload into On-Chip RAM. The +latter is RAM version U-Boot in FIT format (or legacy format if FIT is not +used). + Other things to consider ----------------------- Falcon boot skips a lot of initialization in U-Boot. If Linux expects the diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 3bb6e5b3db..3e53084b21 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -22,6 +22,9 @@ u32 spl_boot_device(void) #endif #ifdef CONFIG_SPL_NAND_SUPPORT return BOOT_DEVICE_NAND; +#endif +#ifdef CONFIG_QSPI_BOOT + return BOOT_DEVICE_NOR; #endif return 0; } diff --git a/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg new file mode 100644 index 0000000000..735d46c9f9 --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg @@ -0,0 +1,26 @@ +#QSPI clk +0957015c 40100000 +#Configure Scratch register +09570600 00000000 +09570604 10000000 +#Disable CCI barrier tranaction +09570178 0000e010 +09180000 00000008 +#USB PHY frequency sel +09570418 0000009e +0957041c 0000009e +09570420 0000009e +#Serdes SATA +09eb1300 80104e20 +09eb08dc 00502880 +#PEX gen3 link +09570158 00000300 +89400890 01048000 +89500890 01048000 +89600890 01048000 +#Alt base register +09570158 00001000 +#flush PBI data +096100c0 000fffff +#Change endianness +09550000 000f400c diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg new file mode 100644 index 0000000000..7b9be0ad3f --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 +# RCW +0c150010 0e000000 00000000 00000000 +11335559 40005012 40025000 c1000000 +00000000 00000000 00000000 00238800 +20124000 00003101 00000096 00000001 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig new file mode 100644 index 0000000000..5a5ae3ae51 --- /dev/null +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -0,0 +1,65 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046ARDB=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_OS_BASE=0x40980000 +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_SPL=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPL_ENV_IS_NOWHERE=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_FSL_ESDHC=y +CONFIG_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_SPL_GZIP=y diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index fda3f3b206..cdb73f644a 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -16,11 +16,11 @@ #define SPL_NO_USB #define SPL_NO_SATA #endif -#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#if defined(CONFIG_SPL_BUILD) && \ + (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) #define SPL_NO_MMC #endif #if defined(CONFIG_SPL_BUILD) && \ - defined(CONFIG_SD_BOOT) && \ !defined(CONFIG_SPL_FSL_LS_PPA) #define SPL_NO_IFC #endif @@ -84,6 +84,21 @@ #endif /* ifdef CONFIG_SECURE_BOOT */ #endif +#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) +#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" +#define CONFIG_SPL_TEXT_BASE 0x10000000 +#define CONFIG_SPL_MAX_SIZE 0x1f000 +#define CONFIG_SPL_STACK 0x10020000 +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif + /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 2d45bbcd4d..87d8cf5374 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -31,17 +31,21 @@ #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #endif -#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg -#endif - #ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg #ifdef CONFIG_EMMC_BOOT #define CONFIG_SYS_FSL_PBL_RCW \ board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg #else #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg #endif +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg +#define CONFIG_SYS_FSL_PBL_PBI \ + board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg +#define CONFIG_SYS_UBOOT_BASE 0x40100000 +#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #endif #ifndef SPL_NO_IFC From 86b840b78d0eba652f65841a870d232ab743612e Mon Sep 17 00:00:00 2001 From: Jeremy Gebben Date: Fri, 20 Jul 2018 16:00:36 -0600 Subject: [PATCH 19/19] drivers/ddr/fsl: fix '__hwconfig without a buffer' messages Pass an empty buffer instead of NULL if the hwconfig environment variable isn't set. Signed-off-by: Jeremy Gebben Cc: Stefano Babic Cc: York Sun Reviewed-by: York Sun --- drivers/ddr/fsl/options.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 5f2acb1c9d..7639a8b3dd 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -742,8 +742,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, unsigned int ctrl_num) { unsigned int i; - char buffer[HWCONFIG_BUFFER_SIZE]; - char *buf = NULL; + char buf[HWCONFIG_BUFFER_SIZE]; #if defined(CONFIG_SYS_FSL_DDR3) || \ defined(CONFIG_SYS_FSL_DDR2) || \ defined(CONFIG_SYS_FSL_DDR4) @@ -757,8 +756,8 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, * Extract hwconfig from environment since we have not properly setup * the environment but need it for ddr config params */ - if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0) - buf = buffer; + if (env_get_f("hwconfig", buf, sizeof(buf)) < 0) + buf[0] = '\0'; #if defined(CONFIG_SYS_FSL_DDR3) || \ defined(CONFIG_SYS_FSL_DDR2) || \ @@ -1398,15 +1397,14 @@ int fsl_use_spd(void) int use_spd = 0; #ifdef CONFIG_DDR_SPD - char buffer[HWCONFIG_BUFFER_SIZE]; - char *buf = NULL; + char buf[HWCONFIG_BUFFER_SIZE]; /* * Extract hwconfig from environment since we have not properly setup * the environment but need it for ddr config params */ - if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0) - buf = buffer; + if (env_get_f("hwconfig", buf, sizeof(buf)) < 0) + buf[0] = '\0'; /* if hwconfig is not enabled, or "sdram" is not defined, use spd */ if (hwconfig_sub_f("fsl_ddr", "sdram", buf)) {