arm: Remove nhk8815 boards and nomadik arch
These boards have not been converted to generic board by the deadline. Remove them. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
@@ -197,10 +197,6 @@ config TARGET_SC_SPS_1
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select CPU_ARM926EJS
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select SUPPORT_SPL
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config ARCH_NOMADIK
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bool "ST-Ericsson Nomadik"
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select CPU_ARM926EJS
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config ORION5X
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bool "Marvell Orion"
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select CPU_ARM926EJS
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@@ -725,8 +721,6 @@ source "arch/arm/cpu/armv7/mx6/Kconfig"
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source "arch/arm/cpu/armv7/mx5/Kconfig"
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source "arch/arm/mach-nomadik/Kconfig"
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source "arch/arm/cpu/armv7/omap3/Kconfig"
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source "arch/arm/cpu/armv7/omap4/Kconfig"
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@@ -1,17 +0,0 @@
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if ARCH_NOMADIK
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choice
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prompt "Nomadik board select"
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optional
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config NOMADIK_NHK8815
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bool "ST 8815 Nomadik Hardware Kit"
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endchoice
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config SYS_SOC
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default "nomadik"
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source "board/st/nhk8815/Kconfig"
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endif
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@@ -1,9 +0,0 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y = timer.o gpio.o
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obj-y += reset.o
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@@ -1,83 +0,0 @@
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/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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static unsigned long gpio_base[4] = {
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NOMADIK_GPIO0_BASE,
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NOMADIK_GPIO1_BASE,
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NOMADIK_GPIO2_BASE,
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NOMADIK_GPIO3_BASE
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};
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enum gpio_registers {
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GPIO_DAT = 0x00, /* data register */
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GPIO_DATS = 0x04, /* data set */
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GPIO_DATC = 0x08, /* data clear */
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GPIO_PDIS = 0x0c, /* pull disable */
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GPIO_DIR = 0x10, /* direction */
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GPIO_DIRS = 0x14, /* direction set */
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GPIO_DIRC = 0x18, /* direction clear */
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GPIO_AFSLA = 0x20, /* alternate function select A */
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GPIO_AFSLB = 0x24, /* alternate function select B */
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};
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static inline unsigned long gpio_to_base(int gpio)
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{
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return gpio_base[gpio / 32];
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}
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static inline u32 gpio_to_bit(int gpio)
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{
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return 1 << (gpio & 0x1f);
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}
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void nmk_gpio_af(int gpio, int alternate_function)
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{
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unsigned long base = gpio_to_base(gpio);
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u32 bit = gpio_to_bit(gpio);
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u32 afunc, bfunc;
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/* alternate function is 0..3, with one bit per register */
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afunc = readl(base + GPIO_AFSLA) & ~bit;
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bfunc = readl(base + GPIO_AFSLB) & ~bit;
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if (alternate_function & 1) afunc |= bit;
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if (alternate_function & 2) bfunc |= bit;
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writel(afunc, base + GPIO_AFSLA);
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writel(bfunc, base + GPIO_AFSLB);
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}
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void nmk_gpio_dir(int gpio, int dir)
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{
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unsigned long base = gpio_to_base(gpio);
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u32 bit = gpio_to_bit(gpio);
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if (dir)
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writel(bit, base + GPIO_DIRS);
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else
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writel(bit, base + GPIO_DIRC);
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}
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void nmk_gpio_set(int gpio, int val)
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{
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unsigned long base = gpio_to_base(gpio);
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u32 bit = gpio_to_bit(gpio);
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if (val)
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writel(bit, base + GPIO_DATS);
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else
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writel(bit, base + GPIO_DATC);
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}
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int nmk_gpio_get(int gpio)
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{
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unsigned long base = gpio_to_base(gpio);
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u32 bit = gpio_to_bit(gpio);
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return readl(base + GPIO_DAT) & bit;
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}
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@@ -1,26 +0,0 @@
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/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __NMK_GPIO_H__
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#define __NMK_GPIO_H__
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/*
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* These functions are called from the soft-i2c driver, but
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* are also used by board files to set output bits.
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*/
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enum nmk_af { /* alternate function settings */
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GPIO_GPIO = 0,
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GPIO_ALT_A,
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GPIO_ALT_B,
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GPIO_ALT_C
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};
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extern void nmk_gpio_af(int gpio, int alternate_function);
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extern void nmk_gpio_dir(int gpio, int dir);
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extern void nmk_gpio_set(int gpio, int val);
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extern int nmk_gpio_get(int gpio);
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#endif /* __NMK_GPIO_H__ */
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@@ -1,50 +0,0 @@
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/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_MTU_H
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#define __ASM_ARCH_MTU_H
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/*
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* The MTU device hosts four different counters, with 4 set of
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* registers. These are register names.
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*/
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#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
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#define MTU_RIS 0x04 /* Raw interrupt status */
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#define MTU_MIS 0x08 /* Masked interrupt status */
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#define MTU_ICR 0x0C /* Interrupt clear register */
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/* per-timer registers take 0..3 as argument */
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#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
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#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
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#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
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#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
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/* bits for the control register */
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#define MTU_CRn_ENA 0x80
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#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
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#define MTU_CRn_PRESCALE_MASK 0x0c
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#define MTU_CRn_PRESCALE_1 0x00
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#define MTU_CRn_PRESCALE_16 0x04
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#define MTU_CRn_PRESCALE_256 0x08
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#define MTU_CRn_32BITS 0x02
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#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
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/* Other registers are usual amba/primecell registers, currently not used */
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#define MTU_ITCR 0xff0
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#define MTU_ITOP 0xff4
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#define MTU_PERIPH_ID0 0xfe0
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#define MTU_PERIPH_ID1 0xfe4
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#define MTU_PERIPH_ID2 0xfe8
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#define MTU_PERIPH_ID3 0xfeC
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#define MTU_PCELL0 0xff0
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#define MTU_PCELL1 0xff4
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#define MTU_PCELL2 0xff8
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#define MTU_PCELL3 0xffC
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#endif /* __ASM_ARCH_MTU_H */
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@@ -1,14 +0,0 @@
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#include <config.h>
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/*
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* Processor reset for Nomadik
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*/
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.align 5
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.globl reset_cpu
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reset_cpu:
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ldr r0, =NOMADIK_SRC_BASE /* System and Reset Controller */
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ldr r1, =0x1
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str r1, [r0, #0x18]
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_loop_forever:
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b _loop_forever
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@@ -1,71 +0,0 @@
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/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/mtu.h>
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/*
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* The timer is a decrementer, we'll left it free running at 2.4MHz.
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* We have 2.4 ticks per microsecond and an overflow in almost 30min
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*/
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#define TIMER_CLOCK (24 * 100 * 1000)
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#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */
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#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */
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#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
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#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
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/* macro to read the decrementing 32 bit timer as an increasing count */
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#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
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/* Configure a free-running, auto-wrap counter with no prescaler */
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int timer_init(void)
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{
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ulong val;
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writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
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CONFIG_SYS_TIMERBASE + MTU_CR(0));
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/* Reset the timer */
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writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
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/*
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* The load-register isn't really immediate: it changes on clock
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* edges, so we must wait for our newly-written value to appear.
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* Since we might miss reading 0, wait for any change in value.
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*/
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val = READ_TIMER();
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while (READ_TIMER() == val)
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;
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return 0;
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}
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/* Return how many HZ passed since "base" */
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ulong get_timer(ulong base)
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{
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return TICKS_TO_HZ(READ_TIMER()) - base;
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}
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/* Delay x useconds */
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void __udelay(unsigned long usec)
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{
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ulong ini, end;
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ini = READ_TIMER();
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end = ini + USEC_TO_COUNT(usec);
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while ((signed)(end - READ_TIMER()) > 0)
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;
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}
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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