Merge branch 'master' of git://git.denx.de/u-boot-net
This commit is contained in:
Tom Rini
@@ -43,6 +43,25 @@ extern struct p_current *current;
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#define dev_warn(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_emerg(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_alert(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_crit(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_err(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_warn(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_notice(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_info(dev, fmt, args...) \
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printf(fmt, ##args)
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#define netdev_dbg(dev, fmt, args...) \
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debug(fmt, ##args)
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#define netdev_vdbg(dev, fmt, args...) \
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debug(fmt, ##args)
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#define GFP_ATOMIC ((gfp_t) 0)
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#define GFP_KERNEL ((gfp_t) 0)
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#define GFP_NOFS ((gfp_t) 0)
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178
include/linux/if_ether.h
Normal file
178
include/linux/if_ether.h
Normal file
@@ -0,0 +1,178 @@
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/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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/*
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* INET An implementation of the TCP/IP protocol suite for the LINUX
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* operating system. INET is implemented using the BSD Socket
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* interface as the means of communication with the user level.
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*
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* Global definitions for the Ethernet IEEE 802.3 interface.
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*
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* Version: @(#)if_ether.h 1.0.1a 02/08/94
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*
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* Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
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* Donald Becker, <becker@super.org>
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* Alan Cox, <alan@lxorguk.ukuu.org.uk>
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* Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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||||
* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _UAPI_LINUX_IF_ETHER_H
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#define _UAPI_LINUX_IF_ETHER_H
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#include <linux/types.h>
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/*
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* IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
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* and FCS/CRC (frame check sequence).
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*/
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#define ETH_ALEN 6 /* Octets in one ethernet addr */
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#define ETH_TLEN 2 /* Octets in ethernet type field */
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#define ETH_HLEN 14 /* Total octets in header. */
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#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
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#define ETH_DATA_LEN 1500 /* Max. octets in payload */
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#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
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#define ETH_FCS_LEN 4 /* Octets in the FCS */
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#define ETH_MIN_MTU 68 /* Min IPv4 MTU per RFC791 */
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#define ETH_MAX_MTU 0xFFFFU /* 65535, same as IP_MAX_MTU */
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/*
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* These are the defined Ethernet Protocol ID's.
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*/
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#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */
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#define ETH_P_PUP 0x0200 /* Xerox PUP packet */
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#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */
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#define ETH_P_TSN 0x22F0 /* TSN (IEEE 1722) packet */
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#define ETH_P_ERSPAN2 0x22EB /* ERSPAN version 2 (type III) */
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#define ETH_P_IP 0x0800 /* Internet Protocol packet */
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#define ETH_P_X25 0x0805 /* CCITT X.25 */
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#define ETH_P_ARP 0x0806 /* Address Resolution packet */
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#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */
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#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */
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#define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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#define ETH_P_DEC 0x6000 /* DEC Assigned proto */
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#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */
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#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */
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#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */
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#define ETH_P_LAT 0x6004 /* DEC LAT */
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#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */
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#define ETH_P_CUST 0x6006 /* DEC Customer use */
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#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */
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#define ETH_P_TEB 0x6558 /* Trans Ether Bridging */
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#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */
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#define ETH_P_ATALK 0x809B /* Appletalk DDP */
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#define ETH_P_AARP 0x80F3 /* Appletalk AARP */
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#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
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#define ETH_P_ERSPAN 0x88BE /* ERSPAN type II */
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#define ETH_P_IPX 0x8137 /* IPX over DIX */
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#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */
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#define ETH_P_PAUSE 0x8808 /* IEEE Pause frames. See 802.3 31B */
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#define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */
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#define ETH_P_WCCP 0x883E /* Web-cache coordination */
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/* protocol defined in */
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/* draft-wilson-wrec-wccp-v2-00.txt */
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#define ETH_P_MPLS_UC 0x8847 /* MPLS Unicast traffic */
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#define ETH_P_MPLS_MC 0x8848 /* MPLS Multicast traffic */
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#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */
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#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */
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#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */
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#define ETH_P_LINK_CTL 0x886c /* HPNA, wlan link local tunnel */
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#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport over Ethernet */
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#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
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#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */
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#define ETH_P_8021AD 0x88A8 /* 802.1ad Service VLAN */
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#define ETH_P_802_EX1 0x88B5 /* 802.1 Local Experimental 1. */
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#define ETH_P_PREAUTH 0x88C7 /* 802.11 Preauthentication */
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#define ETH_P_TIPC 0x88CA /* TIPC */
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#define ETH_P_MACSEC 0x88E5 /* 802.1ae MACsec */
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#define ETH_P_8021AH 0x88E7 /* 802.1ah Backbone Service Tag */
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#define ETH_P_MVRP 0x88F5 /* 802.1Q MVRP */
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#define ETH_P_1588 0x88F7 /* IEEE 1588 Timesync */
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#define ETH_P_NCSI 0x88F8 /* NCSI protocol */
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#define ETH_P_PRP 0x88FB /* IEC 62439-3 PRP/HSRv0 */
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#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */
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#define ETH_P_IBOE 0x8915 /* Infiniband over Ethernet */
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#define ETH_P_TDLS 0x890D /* TDLS */
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#define ETH_P_FIP 0x8914 /* FCoE Initialization Protocol */
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#define ETH_P_80221 0x8917 /* IEEE 802.21 Media Independent */
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/* Handover Protocol */
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||||
#define ETH_P_HSR 0x892F /* IEC 62439-3 HSRv1 */
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#define ETH_P_NSH 0x894F /* Network Service Header */
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#define ETH_P_LOOPBACK 0x9000 /* Ethernet loopback packet, per IEEE 802.3 */
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#define ETH_P_QINQ1 0x9100 /* deprecated QinQ VLAN */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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||||
#define ETH_P_QINQ2 0x9200 /* deprecated QinQ VLAN */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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||||
#define ETH_P_QINQ3 0x9300 /* deprecated QinQ VLAN] */
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||||
/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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||||
#define ETH_P_EDSA 0xDADA /* Ethertype DSA */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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#define ETH_P_IFE 0xED3E /* ForCES inter-FE LFB type */
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#define ETH_P_AF_IUCV 0xFBFB /* IBM af_iucv */
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/* [ NOT AN OFFICIALLY REGISTERED ID ] */
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||||
#define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is less */
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/* than this value then the frame is Ethernet */
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/* II. Else it is 802.3 */
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/*
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* Non DIX types. Won't clash for 1500 types.
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*/
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#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */
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#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */
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#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */
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#define ETH_P_802_2 0x0004 /* 802.2 frames */
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#define ETH_P_SNAP 0x0005 /* Internal only */
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#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */
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#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/
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#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */
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#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
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#define ETH_P_CAN 0x000C /* CAN: Controller Area Network */
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#define ETH_P_CANFD 0x000D /* CANFD: CAN flexible data rate*/
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#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/
|
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#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */
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#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */
|
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#define ETH_P_CONTROL 0x0016 /* Card specific control frames */
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#define ETH_P_IRDA 0x0017 /* Linux-IrDA */
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#define ETH_P_ECONET 0x0018 /* Acorn Econet */
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#define ETH_P_HDLC 0x0019 /* HDLC frames */
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||||
#define ETH_P_ARCNET 0x001A /* 1A for ArcNet :-) */
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#define ETH_P_DSA 0x001B /* Distributed Switch Arch */
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#define ETH_P_TRAILER 0x001C /* Trailer switch tagging */
|
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#define ETH_P_PHONET 0x00F5 /* Nokia Phonet frames */
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#define ETH_P_IEEE802154 0x00F6 /* IEEE802.15.4 frame */
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#define ETH_P_CAIF 0x00F7 /* ST-Ericsson CAIF protocol */
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#define ETH_P_XDSA 0x00F8 /* Multiplexed DSA protocol */
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#define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and */
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/* aggregation protocol */
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/* The following macros come from Linux kernel include/linux/if_vlan.h */
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#define VLAN_HLEN 4 /* The additional bytes required by VLAN */
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/* (in addition to the Ethernet header) */
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#define VLAN_ETH_HLEN 18 /* Total octets in header. */
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#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */
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/*
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* According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan
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*/
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#define VLAN_ETH_DATA_LEN 1500 /* Max. octets in payload */
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#define VLAN_ETH_FRAME_LEN 1518 /* Max. octets in frame sans FCS */
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#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */
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#define VLAN_PRIO_SHIFT 13
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#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator */
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#define VLAN_TAG_PRESENT VLAN_CFI_MASK
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#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */
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#define VLAN_N_VID 4096
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#endif /* _UAPI_LINUX_IF_ETHER_H */
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@@ -1,3 +1,4 @@
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* linux/mdio.h: definitions for MDIO (clause 45) transceivers
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* Copyright 2006-2009 Solarflare Communications Inc.
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@@ -42,7 +43,11 @@
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#define MDIO_PKGID2 15
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#define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
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#define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
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#define MDIO_PCS_EEE_ABLE 20 /* EEE Capability register */
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#define MDIO_PCS_EEE_WK_ERR 22 /* EEE wake error counter */
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#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */
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#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */
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#define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */
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/* Media-dependent registers. */
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#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
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@@ -55,7 +60,6 @@
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#define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */
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#define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */
|
||||
#define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */
|
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#define MDIO_AN_EEE_ADV 60 /* EEE advertisement */
|
||||
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||||
/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
|
||||
#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */
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@@ -81,6 +85,7 @@
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#define MDIO_AN_CTRL1_RESTART BMCR_ANRESTART
|
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#define MDIO_AN_CTRL1_ENABLE BMCR_ANENABLE
|
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#define MDIO_AN_CTRL1_XNP 0x2000 /* Enable extended next page */
|
||||
#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400 /* Stop the clock during LPI */
|
||||
|
||||
/* 10 Gb/s */
|
||||
#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00)
|
||||
@@ -245,9 +250,25 @@
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||||
#define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */
|
||||
#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */
|
||||
|
||||
/* AN EEE Advertisement register. */
|
||||
#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */
|
||||
#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */
|
||||
/* EEE Supported/Advertisement/LP Advertisement registers.
|
||||
*
|
||||
* EEE capability Register (3.20), Advertisement (7.60) and
|
||||
* Link partner ability (7.61) registers have and can use the same identical
|
||||
* bit masks.
|
||||
*/
|
||||
#define MDIO_AN_EEE_ADV_100TX 0x0002 /* Advertise 100TX EEE cap */
|
||||
#define MDIO_AN_EEE_ADV_1000T 0x0004 /* Advertise 1000T EEE cap */
|
||||
/* Note: the two defines above can be potentially used by the user-land
|
||||
* and cannot remove them now.
|
||||
* So, we define the new generic MDIO_EEE_100TX and MDIO_EEE_1000T macros
|
||||
* using the previous ones (that can be considered obsolete).
|
||||
*/
|
||||
#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */
|
||||
#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */
|
||||
#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */
|
||||
#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */
|
||||
#define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */
|
||||
#define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */
|
||||
|
||||
/* LASI RX_ALARM control/status registers. */
|
||||
#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001 /* PHY XS RX local fault */
|
||||
@@ -281,4 +302,9 @@
|
||||
#define MDIO_DEVAD_NONE (-1)
|
||||
#define MDIO_EMULATE_C22 4
|
||||
|
||||
static inline __u16 mdio_phy_id_c45(int prtad, int devad)
|
||||
{
|
||||
return MDIO_PHY_ID_C45 | (prtad << 5) | devad;
|
||||
}
|
||||
|
||||
#endif /* __LINUX_MDIO_H__ */
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
||||
/*
|
||||
* linux/mii.h: definitions for MII-compatible transceivers
|
||||
* Originally drivers/net/sunhme.h.
|
||||
@@ -9,53 +10,55 @@
|
||||
#define __LINUX_MII_H__
|
||||
|
||||
/* Generic MII registers. */
|
||||
|
||||
#define MII_BMCR 0x00 /* Basic mode control register */
|
||||
#define MII_BMSR 0x01 /* Basic mode status register */
|
||||
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
|
||||
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
|
||||
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
|
||||
#define MII_LPA 0x05 /* Link partner ability reg */
|
||||
#define MII_EXPANSION 0x06 /* Expansion register */
|
||||
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
||||
#define MII_STAT1000 0x0a /* 1000BASE-T status */
|
||||
#define MII_ESTATUS 0x0f /* Extended Status */
|
||||
#define MII_DCOUNTER 0x12 /* Disconnect counter */
|
||||
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
|
||||
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
|
||||
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
|
||||
#define MII_SREVISION 0x16 /* Silicon revision */
|
||||
#define MII_RESV1 0x17 /* Reserved... */
|
||||
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
|
||||
#define MII_PHYADDR 0x19 /* PHY address */
|
||||
#define MII_RESV2 0x1a /* Reserved... */
|
||||
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
|
||||
#define MII_NCONFIG 0x1c /* Network interface config */
|
||||
#define MII_BMCR 0x00 /* Basic mode control register */
|
||||
#define MII_BMSR 0x01 /* Basic mode status register */
|
||||
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
|
||||
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
|
||||
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
|
||||
#define MII_LPA 0x05 /* Link partner ability reg */
|
||||
#define MII_EXPANSION 0x06 /* Expansion register */
|
||||
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
||||
#define MII_STAT1000 0x0a /* 1000BASE-T status */
|
||||
#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
|
||||
#define MII_MMD_DATA 0x0e /* MMD Access Data Register */
|
||||
#define MII_ESTATUS 0x0f /* Extended Status */
|
||||
#define MII_DCOUNTER 0x12 /* Disconnect counter */
|
||||
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
|
||||
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
|
||||
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
|
||||
#define MII_SREVISION 0x16 /* Silicon revision */
|
||||
#define MII_RESV1 0x17 /* Reserved... */
|
||||
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
|
||||
#define MII_PHYADDR 0x19 /* PHY address */
|
||||
#define MII_RESV2 0x1a /* Reserved... */
|
||||
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
|
||||
#define MII_NCONFIG 0x1c /* Network interface config */
|
||||
|
||||
/* Basic mode control register. */
|
||||
#define BMCR_RESV 0x003f /* Unused... */
|
||||
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
|
||||
#define BMCR_CTST 0x0080 /* Collision test */
|
||||
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
|
||||
#define BMCR_RESV 0x003f /* Unused... */
|
||||
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
|
||||
#define BMCR_CTST 0x0080 /* Collision test */
|
||||
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
|
||||
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
|
||||
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
|
||||
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
|
||||
#define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */
|
||||
#define BMCR_PDOWN 0x0800 /* Enable low power state */
|
||||
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
|
||||
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
|
||||
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
|
||||
#define BMCR_RESET 0x8000 /* Reset the DP83840 */
|
||||
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
|
||||
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
|
||||
#define BMCR_RESET 0x8000 /* Reset to default state */
|
||||
#define BMCR_SPEED10 0x0000 /* Select 10Mbps */
|
||||
|
||||
/* Basic mode status register. */
|
||||
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
|
||||
#define BMSR_JCD 0x0002 /* Jabber detected */
|
||||
#define BMSR_LSTATUS 0x0004 /* Link status */
|
||||
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
|
||||
#define BMSR_JCD 0x0002 /* Jabber detected */
|
||||
#define BMSR_LSTATUS 0x0004 /* Link status */
|
||||
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
|
||||
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
|
||||
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
|
||||
#define BMSR_RESV 0x00c0 /* Unused... */
|
||||
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
|
||||
#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
|
||||
#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
|
||||
#define BMSR_RESV 0x00c0 /* Unused... */
|
||||
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
|
||||
#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
|
||||
#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
|
||||
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
|
||||
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
|
||||
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
|
||||
@@ -63,7 +66,7 @@
|
||||
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
|
||||
|
||||
/* Advertisement control register. */
|
||||
#define ADVERTISE_SLCT 0x001f /* Selector bits */
|
||||
#define ADVERTISE_SLCT 0x001f /* Selector bits */
|
||||
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
|
||||
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
|
||||
#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
|
||||
@@ -72,19 +75,19 @@
|
||||
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
|
||||
#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
|
||||
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
|
||||
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
|
||||
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
|
||||
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
|
||||
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
|
||||
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
|
||||
#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
|
||||
#define ADVERTISE_RESV 0x1000 /* Unused... */
|
||||
#define ADVERTISE_RESV 0x1000 /* Unused... */
|
||||
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
|
||||
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
|
||||
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
|
||||
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
|
||||
|
||||
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
|
||||
ADVERTISE_CSMA)
|
||||
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
|
||||
ADVERTISE_100HALF | ADVERTISE_100FULL)
|
||||
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
|
||||
ADVERTISE_CSMA)
|
||||
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
|
||||
ADVERTISE_100HALF | ADVERTISE_100FULL)
|
||||
|
||||
/* Link partner ability register. */
|
||||
#define LPA_SLCT 0x001f /* Same as advertise selector */
|
||||
@@ -97,12 +100,12 @@
|
||||
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
|
||||
#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
|
||||
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
|
||||
#define LPA_PAUSE_CAP 0x0400 /* Can pause */
|
||||
#define LPA_PAUSE_CAP 0x0400 /* Can pause */
|
||||
#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
|
||||
#define LPA_RESV 0x1000 /* Unused... */
|
||||
#define LPA_RESV 0x1000 /* Unused... */
|
||||
#define LPA_RFAULT 0x2000 /* Link partner faulted */
|
||||
#define LPA_LPACK 0x4000 /* Link partner acked us */
|
||||
#define LPA_NPAGE 0x8000 /* Next page bit */
|
||||
#define LPA_NPAGE 0x8000 /* Next page bit */
|
||||
|
||||
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
|
||||
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
|
||||
@@ -113,21 +116,23 @@
|
||||
#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
|
||||
#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
|
||||
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
|
||||
#define EXPANSION_RESV 0xffe0 /* Unused... */
|
||||
#define EXPANSION_RESV 0xffe0 /* Unused... */
|
||||
|
||||
#define ESTATUS_1000_XFULL 0x8000 /* Can do 1000BX Full */
|
||||
#define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BX Half */
|
||||
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
|
||||
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
|
||||
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
|
||||
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
|
||||
|
||||
/* N-way test register. */
|
||||
#define NWAYTEST_RESV1 0x00ff /* Unused... */
|
||||
#define NWAYTEST_RESV1 0x00ff /* Unused... */
|
||||
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
|
||||
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
|
||||
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
|
||||
|
||||
/* 1000BASE-T Control register */
|
||||
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
|
||||
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
|
||||
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
|
||||
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
|
||||
#define CTL1000_AS_MASTER 0x0800
|
||||
#define CTL1000_ENABLE_MASTER 0x1000
|
||||
|
||||
/* 1000BASE-T Status register */
|
||||
#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
|
||||
@@ -139,6 +144,13 @@
|
||||
#define FLOW_CTRL_TX 0x01
|
||||
#define FLOW_CTRL_RX 0x02
|
||||
|
||||
/* MMD Access Control register fields */
|
||||
#define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/
|
||||
#define MII_MMD_CTRL_ADDR 0x0000 /* Address */
|
||||
#define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */
|
||||
#define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */
|
||||
#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */
|
||||
|
||||
/**
|
||||
* mii_nway_result
|
||||
* @negotiated: value of MII ANAR and'd with ANLPAR
|
||||
|
||||
Reference in New Issue
Block a user