302 lines
8.9 KiB
C
Executable File
Vendored
302 lines
8.9 KiB
C
Executable File
Vendored
/*
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* mdrv_system_st.h- Sigmastar
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*
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* Copyright (c) [2019~2020] SigmaStar Technology.
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*
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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*/
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#ifndef __DRV_SYSTEM_ST_H__
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#define __DRV_SYSTEM_ST_H__
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#ifdef CONFIG_COMPAT
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#include <asm/compat.h>
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#endif
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//------------------------------------------------------------------------------
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// Data structure
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//------------------------------------------------------------------------------
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typedef struct IO_SYS_PANEL_INFO_s
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{
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U32* pPanelInfo;
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U16 u16Len;
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} IO_SYS_PANEL_INFO_t, *PIO_SYS_PANEL_INFO_t;
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typedef struct IO_SYS_PANEL_Res_s
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{
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U16 u16Width;
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U16 u16Height;
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} IO_SYS_PANEL_GET_RES_t, *PIO_SYS_PANEL_GET_RES_t;
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typedef struct IO_SYS_BOARD_INFO_s
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{
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U32* pu32BoardInfo;
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U16 u16Len;
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} IO_SYS_BOARD_INFO_t, *PIO_SYS_BOARD_INFO_t;
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typedef struct IO_SYS_GENERAL_REG_s
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{
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U16 u16Reg;
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U8 u8Value;
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} IO_SYS_GENERAL_REG_t;
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typedef struct IO_SYS_AEONBIN_INFO_s
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{
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U8* pu8AeonStart;
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U32 u32Len;
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BOOL bRet;
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} IO_SYS_AEONBIN_INFO_t;
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/* PCMCIA_MAP_IOC_INFO */
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typedef struct
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{
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U16 u16Addr;
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U8 u8Value;
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U8 u8Type; // 1: AttribMem, 2: IOMem
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U16 u16DataLen;
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U8 * u8pReadBuffer;
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U8 * u8pWriteBuffer;
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} PCMCIA_Map_Info_t;
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#ifdef CONFIG_COMPAT
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typedef struct
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{
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U16 u16Addr;
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U8 u8Value;
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U8 u8Type; // 1: AttribMem, 2: IOMem
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U16 u16DataLen;
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compat_uptr_t u8pReadBuffer;
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compat_uptr_t u8pWriteBuffer;
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} COMPAT_PCMCIA_Map_Info_t;
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#endif
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typedef enum
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{
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RELOAD_AEON_STOP,
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RELOAD_AEON_RESTART
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} AEON_CONTROL ;
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typedef enum
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{
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// Analog port
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INPUT_SRC_VGA,
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INPUT_SRC_YPBPR_1,
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INPUT_SRC_YPBPR_2,
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// Digital port
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INPUT_SRC_ATV,
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INPUT_SRC_CVBS_1,
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INPUT_SRC_CVBS_2,
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INPUT_SRC_CVBS_3,
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INPUT_SRC_SVIDEO_1,
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INPUT_SRC_SVIDEO_2,
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INPUT_SRC_SCART_1,
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INPUT_SRC_SCART_2,
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// HDMI port
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INPUT_SRC_HDMI_A,
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#if 1
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INPUT_SRC_HDMI_B,
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#else
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INPUT_SRC_HDMI_B1,
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INPUT_SRC_HDMI_B2,
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INPUT_SRC_HDMI_B3,
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#endif
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INPUT_SRC_HDMI_C,
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// MVD port
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INPUT_SRC_DTV,
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INPUT_SRC_DTV_MLINK,
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INPUT_SRC_STORAGE, ///< input source is Storage
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INPUT_SRC_NUM,
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INPUT_SRC_NONE = INPUT_SRC_NUM
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} SYS_INPUT_SOURCE_e;
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typedef struct IO_SYS_SPI_s
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{
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U32 u32Start;
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U32 u32Len;
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U8 *u8data;
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} IO_SYS_SPI_t;
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typedef struct IO_SYS_SPI_ERASE_s
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{
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U32 u32StartAddr;
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U32 u32Size;
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BOOL bWait;
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} IO_SYS_SPI_ERASE_t;
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typedef struct IO_SYS_SPI_ERASE_SECTOR_s
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{
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U32 u32StartAddr;
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U32 u32EndAddr;
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} IO_SYS_SPI_ERASE_SECTOR_t;
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#if defined(CONFIG_ARM) || defined(CONFIG_MIPS)
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#ifdef CONFIG_MP_NEW_UTOPIA_32BIT
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typedef struct
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{
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u64 LX_MEM_ADDR;
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u64 LX_MEM_LENGTH;
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u64 LX_MEM2_ADDR;
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u64 LX_MEM2_LENGTH;
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u64 EMAC_ADDR;
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u64 EMAC_LENGTH;
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u64 DRAM_ADDR;
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u64 DRAM_LENGTH;
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u64 BB_ADDR;
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u64 BB_LENGTH;
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u64 MPOOL_MEM_ADDR;
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u64 MPOOL_MEM_LENGTH;
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u64 G3D_MEM0_ADDR;
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u64 G3D_MEM0_LENGTH;
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u64 G3D_MEM1_ADDR;
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u64 G3D_MEM1_LENGTH;
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u64 G3D_CMDQ_ADDR;
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u64 G3D_CMDQ_LENGTH;
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} IO_Sys_Info_t;
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typedef struct
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{
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u64 LX_MEM_ADDR;
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u64 LX_MEM_LENGTH;
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u64 LX_MEM2_ADDR;
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u64 LX_MEM2_LENGTH;
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u64 LX_MEM3_ADDR;
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u64 LX_MEM3_LENGTH;
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u64 LX_MEM4_ADDR;
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u64 LX_MEM4_LENGTH;
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u64 LX_MEM5_ADDR;
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u64 LX_MEM5_LENGTH;
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u64 EMAC_ADDR;
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u64 EMAC_LENGTH;
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u64 DRAM_ADDR;
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u64 DRAM_LENGTH;
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u64 BB_ADDR;
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u64 BB_LENGTH;
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u64 MPOOL_MEM_ADDR;
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u64 MPOOL_MEM_LENGTH;
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u64 G3D_MEM0_ADDR;
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u64 G3D_MEM0_LENGTH;
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u64 G3D_MEM1_ADDR;
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u64 G3D_MEM1_LENGTH;
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u64 G3D_CMDQ_ADDR;
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u64 G3D_CMDQ_LENGTH;
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}IO_Sys_Info_t_EX;
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#else
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typedef struct
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{
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unsigned int LX_MEM_ADDR;
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unsigned int LX_MEM_LENGTH;
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unsigned int LX_MEM2_ADDR;
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unsigned int LX_MEM2_LENGTH;
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unsigned int EMAC_ADDR;
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unsigned int EMAC_LENGTH;
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unsigned int DRAM_ADDR;
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unsigned int DRAM_LENGTH;
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unsigned int BB_ADDR;
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unsigned int BB_LENGTH;
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unsigned int MPOOL_MEM_ADDR;
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unsigned int MPOOL_MEM_LENGTH;
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unsigned int G3D_MEM0_ADDR;
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unsigned int G3D_MEM0_LENGTH;
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unsigned int G3D_MEM1_ADDR;
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unsigned int G3D_MEM1_LENGTH;
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unsigned int G3D_CMDQ_ADDR;
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unsigned int G3D_CMDQ_LENGTH;
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} IO_Sys_Info_t;
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typedef struct
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{
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unsigned int LX_MEM_ADDR;
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unsigned int LX_MEM_LENGTH;
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unsigned int LX_MEM2_ADDR;
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unsigned int LX_MEM2_LENGTH;
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unsigned int LX_MEM3_ADDR;
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unsigned int LX_MEM3_LENGTH;
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unsigned int LX_MEM4_ADDR;
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unsigned int LX_MEM4_LENGTH;
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unsigned int LX_MEM5_ADDR;
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unsigned int LX_MEM5_LENGTH;
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unsigned int EMAC_ADDR;
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unsigned int EMAC_LENGTH;
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unsigned int DRAM_ADDR;
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unsigned int DRAM_LENGTH;
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unsigned int BB_ADDR;
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unsigned int BB_LENGTH;
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unsigned int MPOOL_MEM_ADDR;
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unsigned int MPOOL_MEM_LENGTH;
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unsigned int G3D_MEM0_ADDR;
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unsigned int G3D_MEM0_LENGTH;
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unsigned int G3D_MEM1_ADDR;
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unsigned int G3D_MEM1_LENGTH;
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unsigned int G3D_CMDQ_ADDR;
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unsigned int G3D_CMDQ_LENGTH;
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}IO_Sys_Info_t_EX;
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#endif //CONFIG_MP_NEW_UTOPIA_32BIT
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#elif defined(CONFIG_ARM64)
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typedef struct
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{
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u64 LX_MEM_ADDR;
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u64 LX_MEM_LENGTH;
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u64 LX_MEM2_ADDR;
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u64 LX_MEM2_LENGTH;
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u64 EMAC_ADDR;
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u64 EMAC_LENGTH;
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u64 DRAM_ADDR;
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u64 DRAM_LENGTH;
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u64 BB_ADDR;
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u64 BB_LENGTH;
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u64 MPOOL_MEM_ADDR;
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u64 MPOOL_MEM_LENGTH;
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u64 G3D_MEM0_ADDR;
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u64 G3D_MEM0_LENGTH;
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u64 G3D_MEM1_ADDR;
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u64 G3D_MEM1_LENGTH;
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u64 G3D_CMDQ_ADDR;
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u64 G3D_CMDQ_LENGTH;
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} IO_Sys_Info_t;
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typedef struct
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{
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u64 LX_MEM_ADDR;
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u64 LX_MEM_LENGTH;
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u64 LX_MEM2_ADDR;
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u64 LX_MEM2_LENGTH;
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u64 LX_MEM3_ADDR;
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u64 LX_MEM3_LENGTH;
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u64 LX_MEM4_ADDR;
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u64 LX_MEM4_LENGTH;
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u64 LX_MEM5_ADDR;
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u64 LX_MEM5_LENGTH;
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u64 EMAC_ADDR;
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u64 EMAC_LENGTH;
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u64 DRAM_ADDR;
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u64 DRAM_LENGTH;
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u64 BB_ADDR;
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u64 BB_LENGTH;
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u64 MPOOL_MEM_ADDR;
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u64 MPOOL_MEM_LENGTH;
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u64 G3D_MEM0_ADDR;
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u64 G3D_MEM0_LENGTH;
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u64 G3D_MEM1_ADDR;
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u64 G3D_MEM1_LENGTH;
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u64 G3D_CMDQ_ADDR;
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u64 G3D_CMDQ_LENGTH;
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}IO_Sys_Info_t_EX;
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#endif
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#endif // __DRV_SYSTEM_ST_H__
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