386 lines
10 KiB
C
Executable File
386 lines
10 KiB
C
Executable File
/*
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* infinity2m.c- Sigmastar
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*
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* Copyright (C) 2018 Sigmastar Technology Corp.
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*
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* Author: joe.su <joe.su@sigmastar.com.tw>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include "environment.h"
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#include "asm/arch/mach/ms_types.h"
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#include "asm/arch/mach/platform.h"
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#include "asm/arch/mach/io.h"
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#include "ms_version.h"
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#define STORAGE_SPI_NAND_SKIP_SD BIT4
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#define STORAGE_SPI_NAND (BIT4|BIT0)
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#define STORAGE_SPI_NOR (BIT4|BIT3)
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#define STORAGE_SPI_NOR_SKIP_SD (BIT4|BIT3|BIT0)
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#define STORAGE_BOOT_TYPES (BIT4|BIT3|BIT0)
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#define STORAGE_SD_CARD (STORAGE_SPI_NAND|STORAGE_SPI_NAND)
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typedef struct
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{
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unsigned char tagPrefix[3];
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unsigned char headerVersion[1];
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unsigned char libType[2];
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unsigned char chip[4];
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unsigned char changelist[8];
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unsigned char component[10];
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unsigned char reserved[1];
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unsigned char tagSuffix[3];
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} MS_VERSION;
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MS_VERSION UBT_VERSION =
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{
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{'M','V','X'},
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MVXV_HEAD_VER,
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MVXV_LIB_TYPE, //R = general release version
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MVXV_CHIP_ID,
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MVXV_CHANGELIST,
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MVXV_COMP_ID,
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{'#'},
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{'X','V','M'},
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};
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DECLARE_GLOBAL_DATA_PTR;
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//#define DEV_BUF_ADDR (PHYS_SDRAM_1+0x3F800)
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int arch_cpu_init(void)
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{
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gd->xtal_clk=CONFIG_PIUTIMER_CLOCK;
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/* following code is not worked since bd has not allocated yet!!*/
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//
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// gd->bd->bi_arch_number = MACH_TYPE_COLUMBUS2;
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//
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// /* adress of boot parameters */
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// gd->bd->bi_boot_params = BOOT_PARAMS;
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return 0;
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}
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// we borrow the DRAN init to do the devinfo setting...
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int dram_init(void)
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{
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gd->ram_size=CONFIG_UBOOT_RAM_SIZE;
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return 0;
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}
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DEVINFO_CHIP_TYPE ms_check_chip(void)
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{
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/*
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U16 chipType;
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chipType = INREG16(GET_REG_ADDR(REG_ADDR_BASE_MIU, 0x69)) & 0xF000;
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if (chipType == 0x6000)
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return DEVINFO_313E;
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else if (chipType == 0x8000)
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return DEVINFO_318;
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else if (chipType == 0x9000)
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return DEVINFO_318;
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else
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return DEVINFO_NON;
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*/
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return DEVINFO_NON;
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}
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int checkboard(void)
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{
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/*
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DEVINFO_st* devinfo;
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int i;
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devinfo = (DEVINFO_st*)(DEV_BUF_ADDR); // start address: 30K, size: 2K
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// for(i=0;i<sizeof(version.bn);i++)
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// {
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// putc(version.bn[i]);
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// }
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// for(i=0;i<sizeof(version.lib_type);i++)
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// {
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// putc(version.lib_type[i]);
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// }
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//
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// putc('@');
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for(i=0;i<sizeof(version.changelist);i++)
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{
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putc(version.changelist[i]);
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}
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putc('\n');
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if (devinfo->header[0]!='D' || devinfo->header[1]!='E' || devinfo->header[2]!='V' || devinfo->header[3]!='I' ||
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devinfo->header[4]!='N' || devinfo->header[5]!='F' || devinfo->header[6]!='O' || devinfo->header[7]!='.')
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{
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printf("***********************************************************\r\n");
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printf("* DEVINFO. header check failed !!! *\r\n");
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printf("* Please program DEVINFO section. *\r\n");
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printf("***********************************************************\r\n");
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while(1);
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}
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*/
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int i=0;
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printf("Version: ");
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for(i=0;i<2;i++)
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{
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printf("%c",UBT_VERSION.chip[i]);
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}
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for(i=0;i<8;i++)
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{
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printf("%c",UBT_VERSION.changelist[i]);
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}
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printf("\n");
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/*
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switch (ms_check_chip())
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{
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case DEVINFO_313E:
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printf("DEVINFO: 313E\n");
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break;
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case DEVINFO_318:
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printf("DEVINFO: 318\n");
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break;
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case DEVINFO_NON:
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printf("DEVINFO: NON\n");
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break;
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default:
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printf("DEVINFO:ERROR\n");
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}
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*/
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#ifdef CONFIG_CMD_BDI
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printf("***********************************************************\r\n");
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printf("* MEMORY LAYOUT \r\n");
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printf("* PHYS_SDRAM_1: 0X%08x \r\n",PHYS_SDRAM_1);
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printf("* PHYS_SDRAM_1_SIZE: 0X%08x \r\n",PHYS_SDRAM_1_SIZE);
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printf("* CONFIG_SYS_TEXT_BASE: 0X%08x \r\n",CONFIG_SYS_TEXT_BASE);
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printf("* CONFIG_SYS_SDRAM_BASE: 0X%08x \r\n",CONFIG_SYS_SDRAM_BASE);
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printf("* CONFIG_SYS_INIT_SP_ADDR:0X%08x (gd_t *)pointer \r\n",CONFIG_SYS_INIT_SP_ADDR);
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printf("* SCFG_MEMP_START: 0X%08x \r\n",SCFG_MEMP_START);
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printf("* SCFG_PNLP_START: 0X%08x \r\n",SCFG_PNLP_START);
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printf("* BOOT_PARAMS: 0X%08x \r\n",BOOT_PARAMS);
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printf("* CONFIG_SYS_LOAD_ADDR: 0X%08x \r\n",CONFIG_SYS_LOAD_ADDR);
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//printf("* KERNEL_RAM_BASE:0X%08x \r\n",KERNEL_RAM_BASE);
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printf("* CONFIG_UNLZO_DST_ADDR: 0X%08x \r\n",CONFIG_UNLZO_DST_ADDR);
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printf("\r\n");
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printf("* CONFIG_ENV_SIZE: 0X%08x \r\n",CONFIG_ENV_SIZE);
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printf("* CONFIG_SYS_MALLOC_LEN: 0X%08x \r\n",CONFIG_SYS_MALLOC_LEN);
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printf("* CONFIG_STACKSIZE: 0X%08x \r\n",CONFIG_STACKSIZE);
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printf("* KERNEL_IMAGE_SIZE: 0X%08x \r\n",KERNEL_IMAGE_SIZE);
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printf("***********************************************************\r\n");
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#endif
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return 0;
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}
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DEVINFO_BOOT_TYPE ms_devinfo_boot_type(void)
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{
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U16 u16Storage;
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u16Storage = (INREG16( GET_REG_ADDR(REG_ADDR_BASE_PM_SLEEP, 0x1F) ) >> 10) & STORAGE_BOOT_TYPES;
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if(u16Storage == STORAGE_SPI_NOR || u16Storage == STORAGE_SPI_NOR_SKIP_SD)
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{
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return DEVINFO_BOOT_TYPE_SPI;
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}
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else if(u16Storage == STORAGE_SPI_NAND || u16Storage == STORAGE_SPI_NAND_SKIP_SD)
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{
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return DEVINFO_BOOT_TYPE_SPINAND_INT_ECC;
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}
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return DEVINFO_BOOT_TYPE_NONE;
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}
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/*
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DEVINFO_BOARD_TYPE ms_devinfo_board_type(void)
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{
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return (DEVINFO_BOARD_TYPE)gd->board_type;
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}
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DEVINFO_BOARD_TYPE ms_devinfo_panel_type(void)
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{
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return (DEVINFO_PANEL_TYPE)gd->panel_type;
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}
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DEVINFO_RTK_FLAG ms_devinfo_rtk_flag(void)
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{
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return (DEVINFO_RTK_FLAG)gd->rtk_flag;
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}
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U16 OALReadBootSource(void)
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{
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return ((INREG16(0x1F003C00+0x0065*4)&BIT2) == BIT2);
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}
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*/
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#ifdef CONFIG_BOARD_LATE_INIT
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extern void *malloc(unsigned int);
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#define BUF_SIZE 256
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int board_late_init(void)
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{
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/*
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U16 u16Status;
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char *chainmode="CBC";
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char *keytype="EFUSE";
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char *buffer;
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printf("*******************************************\nboard_late_init for upgrade image\n");
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buffer =(char *)malloc(BUF_SIZE);
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if((buffer==NULL))
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{
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printf("no memory for command string!!\n");
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return -1;
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}
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u16Status=INREG16(REG_ADDR_STATUS);
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if(u16Status)
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{
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printf("Status register=0x%08X\n", u16Status);
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if(u16Status & KEY_CUST_BIT)
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{
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memset(buffer, 0 , BUF_SIZE);
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sprintf(buffer, "aes enc %x %s %s KEY_CUST", KEY_CUST_LOAD_ADDRESS, chainmode, keytype);
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printf("%s\n", buffer);
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run_command(buffer, 0);
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}
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if(u16Status & ZBOOT_BIT)
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{
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memset(buffer, 0 , BUF_SIZE);
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sprintf(buffer, "aes enc %x %s %s ZBOOT", ZBOOT_LOAD_ADDRESS, chainmode, keytype);
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printf("%s\n", buffer);
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run_command(buffer, 0);
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}
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if(u16Status & UBOOT_BIT)
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{
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memset(buffer, 0 , BUF_SIZE);
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sprintf(buffer, "aes enc %x %s %s UBOOT", UBOOT_LOAD_ADDRESS, chainmode, keytype);
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printf("%s\n", buffer);
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run_command(buffer, 0);
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}
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if(u16Status & KERNEL_BIT)
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{
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memset(buffer, 0 , BUF_SIZE);
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sprintf(buffer, "aes enc %x %s %s KERNEL", KERNEL_LOAD_ADDRESS, chainmode, keytype);
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printf("%s\n", buffer);
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run_command(buffer, 0);
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}
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// *(volatile U16*)0x1F001CB8 = 0xFF;
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// *(volatile U16*)0x1F001CB8 = 0x79;
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//run_command("reset", 0);
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reset_cpu(0);
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}
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printf("*******************************************\n");
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*/
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return 0;
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}
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#endif
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#ifndef CONFIG_MS_SAVE_ENV_IN_ISP_FLASH
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#if (defined(CONFIG_MS_NAND) && defined(CONFIG_MS_EMMC))
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extern void mmc_env_relocate_spec(void);
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extern void nand_env_relocate_spec(void);
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extern int mmc_env_init(void);
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extern int nand_env_init(void);
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extern int mmc_saveenv(void);
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extern int nand_saveenv(void);
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env_t *env_ptr;
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void env_relocate_spec(void)
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{
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if(DEVINFO_BOOT_TYPE_EMMC==ms_devinfo_boot_type())
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{
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return mmc_env_relocate_spec();
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}
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else if(DEVINFO_BOOT_TYPE_NAND==ms_devinfo_boot_type())
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{
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return nand_env_relocate_spec();
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}
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}
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int env_init(void)
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{
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if(DEVINFO_BOOT_TYPE_EMMC==ms_devinfo_boot_type())
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{
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return mmc_env_init();
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}
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else if(DEVINFO_BOOT_TYPE_NAND==ms_devinfo_boot_type())
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{
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return nand_env_init();
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}
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}
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int saveenv(void)
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{
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if(DEVINFO_BOOT_TYPE_EMMC==ms_devinfo_boot_type())
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{
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return mmc_saveenv();
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}
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else if(DEVINFO_BOOT_TYPE_NAND==ms_devinfo_boot_type())
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{
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return nand_saveenv();
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}
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}
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#endif
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#endif
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#define reg_flush_op_on_fire (0x1F000000 + 0x102200*2 + 0x05*4)
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#define reg_Flush_miu_pipe_done_flag (0x1F000000 + 0x102200*2 + 0x10*4)
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inline void _chip_flush_miu_pipe(void)
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{
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unsigned short dwReadData = 0;
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//toggle the flush miu pipe fire bit
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*(volatile unsigned short *)(reg_flush_op_on_fire) = 0x10;
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*(volatile unsigned short *)(reg_flush_op_on_fire) = 0x11;
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do
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{
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dwReadData = *(volatile unsigned short *)(reg_Flush_miu_pipe_done_flag);
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dwReadData &= (1<<12); //Check Status of Flush Pipe Finish
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} while(dwReadData == 0);
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}
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extern void Chip_Flush_Memory(void);
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extern void Chip_Read_Memory(void);
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inline void Chip_Flush_Memory(void)
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{
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_chip_flush_miu_pipe();
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}
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inline void Chip_Read_Memory(void)
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{
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_chip_flush_miu_pipe();
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}
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