570 lines
19 KiB
Plaintext
570 lines
19 KiB
Plaintext
*.i
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*.s
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*.ii
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*.tmp
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*.bak
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*.hex
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*.save
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*.d
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*.swn
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*.swm
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*.orig
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.metadata
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.dm
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.gradle
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/Releases
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/.nb-gradle/
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*.bin
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*.dmp
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*.elf
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*.lss
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*.map
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*.rpt
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*.srec
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*.swp
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*.zpu
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*.log
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*.done
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*.smsg
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*.summary
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*.jdi
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*.pin
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*.out.sdc
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*.sof
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*.sld
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*.rbf
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*.qws
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*.sav
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*.pof
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*.qdf
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*.srf
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*.swo
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c5_pin_model_dump.txt
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build/db/
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build/incremental_db/
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build/output_files/
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build/simulation/
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software/apps/*/*_obj/
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software/zputa/zpu_obj/
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software/iocp/iocp_obj/
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software/build/
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old/
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*/old/
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*/*/old/
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*/*/*/old/
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nohup.out
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cpu/sav
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build/.qsys_edit/
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build/A-Hdrive
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build/ADV7123.vhd
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build/ADV7123_TEST.qpf
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build/ADV7123_TEST.qsf
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build/Clock_50to100.BAK.vhd
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build/KEY_TEST.qpf
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build/KEY_TEST.qsf
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build/KEY_TEST.v
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build/Makefile.1306
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build/audio_shifter.v
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build/audio_top.v
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build/constraints.sdc
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*.o
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Manuals/
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schematics/previous
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software/asm/CPM22-BIOS.asm
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software/asm/MZ80AFI.asm.bak
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software/asm/cpm22.mzf
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software/asm/dz80.ini
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software/asm/old/
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software/howto
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software/roms/MZ80AFI.BIN
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software/roms/MZ80AFI.rom
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software/roms/bios.rom
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software/roms/cpm22.rom
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software/tmp/
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software/src/FatFS
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software/src/sav
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software/asm/cbios.asm.bak
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software/asm/sav/
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software/rfs_bank2.asm.1703.2200
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software/roms/cbios_bank5.rom
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software/roms/cbios_bank6.rom
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software/roms/cbios_bank7.rom
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software/roms/cbios_bank8.rom
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software/src/sdtest.c
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software/CPM/tools/
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software/asm/rfs_bank2.prewriteread
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software/roms/SHARP_MZ80A_RFS_CPM_IMAGE_1.img
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software/roms/SHARP_MZ80A_RFS_IMAGE_1.img
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software/roms/cmp
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build/ddr2_sodimm.qpf
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build/ddr2_sodimm.qpf.v1
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build/ddr2_sodimm.qsf
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build/ddr2_sodimm.qsf.v1
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build/ledwater.qpf
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build/ledwater.qsf
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build/ledwater.v
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build/mypll.cmp
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build/mypll.qip
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build/mypll.vhd
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build/serial.qpf
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build/serial.qsf
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build/serial.v
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build/serv_req_info.txt
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build/template.qsf
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build/unsaved.qsys
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build/unsaved.sopcinfo
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build/unsaved/
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devices/sysbus/TCPU/
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tools/Master0.z80
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tools/Master1.z80
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tools/assemble_rfs.sh
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software/src/tools/.flashmmcfg.c.swo
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software/src/tools/x
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software/CPM/1M44/DSK/CPM_1M44_RFS_1.DSK
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software/CPM/1M44/DSK/CPM_1M44_RFS_2.DSK
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software/CPM/1M44/RAW/CPM_1M44_RFS_1.RAW
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software/CPM/1M44/RAW/CPM_1M44_RFS_2.RAW
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software/CPM/SDC16M/
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software/CPM/cpm3/on2
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CPLD/build/db/
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CPLD/build/incremental_db/
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CPLD/build/output_files/
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CPLD/build/simulation/
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CPLD/mz80b/
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CPLD/tranZPUterSW.sav2
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schematics/tranZPUter-SW/
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schematics/tranZPUter/
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software/asm/.cbiosII.asm.swo
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software/roms/SA1510.orig
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CPLD/build/tranZPUterSW_constraints.sdc.clk
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CPLD/tranZPUterSW.vhd.clk
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CPLD/tranZPUterSW.vhd.presweep
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software/asm/include/Definitions.asm.swo
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CPLD/SW/build/db/
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CPLD/SW/build/incremental_db/
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CPLD/SW/build/output_files/
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CPLD/SW/build/simulation/
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CPLD/SW/build/tranZPUterSW_constraints.sdc.clk
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CPLD/SW/tranZPUterSW.sav2
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CPLD/SW/tranZPUterSW.vhd.clk
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CPLD/SW/tranZPUterSW.vhd.presweep
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CPLD/SW/tranZPUterSW.vhd.sav3
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CPLD/SW700/v1.2/build/db/
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CPLD/SW700/v1.2/build/incremental_db/
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CPLD/SW700/v1.2/build/output_files/
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CPLD/SW700/v1.2/build/simulation/
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CPLD/SW700/v1.2/build/tranZPUterSW_constraints.sdc.clk
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CPLD/SW700/v1.2/tranZPUterSW.sav2
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CPLD/SW700/v1.2/tranZPUterSW.vhd.clk
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CPLD/SW700/v1.2/tranZPUterSW.vhd.presweep
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FPGA/SW700/v1.2/VideoController.vhd.inpro
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FPGA/SW700/v1.2/VideoController.vhd.orig
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FPGA/SW700/v1.2/VideoController_Toplevel.vhd.orig
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FPGA/SW700/v1.2/VideoController_pkg.vhd.orig
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FPGA/SW700/v1.2/build/.qsys_edit/
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FPGA/SW700/v1.2/build/PLLJ_PLLSPE_INFO.txt
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FPGA/SW700/v1.2/build/VideoController.qsf.orig
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FPGA/SW700/v1.2/build/VideoController_constraints.sdc.orig
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FPGA/SW700/v1.2/build/abc.qip
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FPGA/SW700/v1.2/build/core
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FPGA/SW700/v1.2/build/db/
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FPGA/SW700/v1.2/build/greybox_tmp/
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FPGA/SW700/v1.2/build/incremental_db/
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FPGA/SW700/v1.2/build/output_files/VideoController700.2
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FPGA/SW700/v1.2/build/output_files/VideoController700.cdf
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FPGA/SW700/v1.2/build/simulation/
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FPGA/SW700/v1.2/devices/
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FPGA/SW700/v1.2/functions.vhd
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FPGA/SW700/v1.2/vidsav
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CPLD/SW700/v1.3/build/db/
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CPLD/SW700/v1.3/build/incremental_db/
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CPLD/SW700/v1.3/build/output_files/
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CPLD/SW700/v1.3/build/simulation/
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CPLD/SW700/v1.3/build/tranZPUterSW_constraints.sdc.clk
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CPLD/SW700/v1.3/tranZPUterSW.sav2
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CPLD/SW700/v1.3/tranZPUterSW.vhd.clk
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CPLD/SW700/v1.3/tranZPUterSW.vhd.presweep
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FPGA/SW700/v1.3/VideoController.vhd.inpro
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FPGA/SW700/v1.3/VideoController.vhd.orig
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FPGA/SW700/v1.3/VideoController_Toplevel.vhd.orig
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FPGA/SW700/v1.3/VideoController_pkg.vhd.orig
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FPGA/SW700/v1.3/build/.qsys_edit/
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FPGA/SW700/v1.3/build/PLLJ_PLLSPE_INFO.txt
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FPGA/SW700/v1.3/build/VideoController.qsf.orig
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FPGA/SW700/v1.3/build/VideoController_constraints.sdc.orig
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FPGA/SW700/v1.3/build/abc.qip
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FPGA/SW700/v1.3/build/core
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FPGA/SW700/v1.3/build/db/
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FPGA/SW700/v1.3/build/greybox_tmp/
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FPGA/SW700/v1.3/build/incremental_db/
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FPGA/SW700/v1.3/build/output_files/VideoController700.2
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FPGA/SW700/v1.3/build/output_files/VideoController700.cdf
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FPGA/SW700/v1.3/build/simulation/
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FPGA/SW700/v1.3/devices/
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FPGA/SW700/v1.3/functions.vhd
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FPGA/SW700/v1.3/vidsav
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tools/Mars4_5.jar
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docker/QuartusPrime/Dockerfile.13.0.1.old
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docker/QuartusPrime/Quartus-web-13.0.1.232-linux.tar
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docker/QuartusPrime/files/13.0/
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docker/QuartusPrime/files/13.1/
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docker/QuartusPrime/files/17.1/
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docker/QuartusPrime/local/
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docker/QuartusPrime/quartus_docker.sh
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FPGA/SW700/v1.2/build/VideoController700.pti_db_list.ddb
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FPGA/SW700/v1.2/build/VideoController700.tis_db_list.ddb
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FPGA/SW700/v1.2/build/output_files/greybox_tmp/
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FPGA/SW700/v1.2/build/x
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FPGA/SW700/v1.3/build/VideoController700.pti_db_list.ddb
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FPGA/SW700/v1.3/build/VideoController700.tis_db_list.ddb
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FPGA/SW700/v1.3/build/coreMZ.qsf.bak
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FPGA/SW700/v1.3/build/x
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software/mif/monitor_SA1510.mif.bak
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software/mif/monitor_SA1510.mif.tst
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FPGA/SW700/v1.2/build/output_files/
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FPGA/SW700/v1.3/XX
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FPGA/SW700/v1.3/build/output_files/
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FPGA/SW700/v1.3/devices.old/
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CPLD/SW700/v1.3.bak/
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FPGA/SW700/v1.3.bak/
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FPGA/SW700/v1.3/PLL/Video_Clock.BAK.vhd
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FPGA/SW700/v1.3/PLL/Video_Clock_II.BAK.vhd
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FPGA/SW700/v1.3/PLL/Video_Clock_III.BAK.vhd
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FPGA/SW700/v1.3/PLL/Video_Clock_IV.BAK.vhd
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FPGA/SW700/v1.3/VideoController.vhd.prechangegputobram
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FPGA/SW700/v1.3/build/VideoController_constraints.sdc
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FPGA/SW700/v1.3/build/coreMZ_E115_description.txt
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FPGA/SW700/v1.3/coreMZ_constraints.sdc.old
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FPGA/SW700/v1.3/prechange.vhd
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FPGA/SW700/v1.3/prechange2.vhd
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FPGA/SW700/v1.3/softT80/constraints_t80_ok
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FPGA/a-z80/
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FPGA/a-z80_latest.tar.gz
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FPGA/nextz80/
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FPGA/nextz80_latest.tar.gz
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FPGA/SW700/v1.3/VideoController/VideoController_constraints.sdc.orig
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SD/
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devices/sysbus/BRAM/TZSW_DualPort32-64BootBRAM.vhd
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devices/sysbus/BRAM/TZSW_DualPort3264BootBRAM.vhd
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software/NASCAS
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software/CAS
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software/MZF
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software/BAS
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software/CPM/CPM00_MZ800
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software/CPM/CPM00_SYSTEM
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software/CPM/CPM01_TURBOP
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software/CPM/CPM02_HI_C
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software/CPM/CPM03_FORTRAN80
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software/CPM/CPM04_MBASIC
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software/CPM/CPM05_COBOL80_v13
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software/CPM/CPM06_COBOL80_v20
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software/CPM/CPM07_COBOL80
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software/CPM/CPM08_Z80FORTH
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software/CPM/CPM09_CPMTEX
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software/CPM/CPM10_DISKUTILFUNC5
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software/CPM/CPM11_MAC80
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software/CPM/CPM12_PASCALMTP_v561
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software/CPM/CPM13_MTPUG_01
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software/CPM/CPM14_MTPUG_02
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software/CPM/CPM15_MTPUG_03
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software/CPM/CPM16_MTPUG_04
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software/CPM/CPM17_MTPUG_05
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software/CPM/CPM18_MTPUG_06
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software/CPM/CPM19_MTPUG_07
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software/CPM/CPM20_MTPUG_08
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software/CPM/CPM21_MTPUG_09
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software/CPM/CPM22_MTPUG_10
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software/CPM/CPM23_PLI
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software/CPM/CPM24_PLI80_v13
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software/CPM/CPM25_PLI80_v14
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software/CPM/CPM26_TPASCAL_v300a
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software/CPM/CPM27_WORDSTAR_v30
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software/CPM/CPM28_PLM80
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software/CPM/CPM29_ZSID_v14
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software/CPM/CPM30_WORDSTAR_v400
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software/CPM/CPM31_WORDSTAR_v330
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software/CPM/CPM32_ZCPR3
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software/CPM/CPM33_ZCPR3_COMMON
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software/CPM/CPM_MC_5
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software/CPM/CPM_MC_C0
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software/CPM/CPM_MC_C1
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software/CPM/CPM_MC_C2
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software/CPM/CPM_MC_C3
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software/CPM/CPM_MC_C4
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software/CPM/CPM_MC_C5
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software/CPM/CPM_MC_C6
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software/CPM/CPM_MC_C7
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software/CPM/CPM_MC_C8
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software/CPM/CPM_MC_C9
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software/CPM/CPM_MC_D0
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software/CPM/CPM_MC_D1
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software/CPM/CPM_MC_D2
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software/CPM/CPM_MC_D3
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software/CPM/CPM_MC_D4
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software/CPM/CPM_MC_D5
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software/CPM/CPM_MC_D6
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software/CPM/CPM_MC_D7
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software/CPM/CPM_MC_D8
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software/CPM/CPM_MC_D9
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software/CPM/CPM_MC_E0
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software/CPM/CPM_MC_E1
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software/CPM/CPM_MC_E2
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software/CPM/CPM_MC_E3
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software/CPM/CPM_MC_E4
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software/CPM/CPM_MC_E5
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software/CPM/CPM_MC_E6
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software/CPM/CPM_MC_E7
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software/CPM/CPM_MC_E8
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software/CPM/CPM_MC_E9
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software/CPM/CPM_MC_F0
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software/CPM/CPM_MC_F1
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software/CPM/CPM_MC_F2
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software/CPM/CPM_MC_F3
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software/CPM/CPM_MC_F4
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software/CPM/CPM_MC_F5
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software/CPM/CPM_MC_F6
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software/CPM/CPM_MC_F7
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software/CPM/CPM_MC_F8
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software/CPM/CPM_MC_F9
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software/CPM/CPM_RFS_1
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software/CPM/CPM_RFS_2
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software/CPM/PLM80
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software/CPM/tosort
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FPGA/SW700/v1.3/coreMZ.vhd.bak
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FPGA/SW700/v1.3/softZPU/softZPU.vhd.bak
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schematics/sep/
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software/MZB
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software/CPM/320K/DSK
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software/CPM/320K/RAW
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software/CPM/720K/DSK
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software/CPM/720K/RAW
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software/CPM/1M44/DSK
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software/CPM/1M44/RAW
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software/CPM/CPM_MULTICOMP_contents.txt
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software/disks
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software/CPM
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software/DSK
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software/MZ800_IOCS.ref
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software/asm/new/
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software/asm/savit
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software/dz80.ini
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software/full.asm
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software.bak/
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CPLD/SW700/v1.3/build/greybox_tmp/
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FPGA/SW700/v1.3/GGGG
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FPGA/SW700/v1.3/VideoController/VideoController.vhd.preStatusMerge
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FPGA/SW700/v1.3/coreMZ_emuMZ_constraints.sdc.orig
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FPGA/SW700/v1.3/softZPU/ZPU/eee.vhd
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FPGA/SW700/v1.3/softZPU/ZPU/rrrr
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FPGA/SW700/v1.3/softZPU/ZPU/ssss
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FPGA/SW700/v1.3/softZPU/ZPU/tttt
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FPGA/SW700/v1.3/softZPU/ZPU/tyty
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FPGA/SW700/v1.3/softZPU/ZPU/zpu_core_evo.vhd.06052021
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FPGA/SW700/v1.3/softZPU/ZPU/zpu_core_evo_issue.vhd
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FPGA/SW700/v1.3/softZPU/ZPU/zpu_core_evo_noissue.vhd
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cpu/zpu_core_evo.vhd.06052012
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CPLD/SW700/v1.3/MZ2000/build/db/
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CPLD/SW700/v1.3/MZ2000/build/greybox_tmp/
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CPLD/SW700/v1.3/MZ2000/build/incremental_db/
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CPLD/SW700/v1.3/MZ2000/build/output_files/
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CPLD/SW700/v1.3/MZ2000/build/simulation/
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CPLD/SW700/v1.3/MZ2000/build/tranZPUterSW_constraints.sdc.clk
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW.sav2
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW.vhd.clk
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW.vhd.presweep
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CPLD/SW700/v1.3/MZ700/build/db/
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CPLD/SW700/v1.3/MZ700/build/greybox_tmp/
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CPLD/SW700/v1.3/MZ700/build/incremental_db/
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CPLD/SW700/v1.3/MZ700/build/output_files/
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CPLD/SW700/v1.3/MZ700/build/simulation/
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CPLD/SW700/v1.3/MZ700/build/tranZPUterSW_constraints.sdc.clk
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CPLD/SW700/v1.3/MZ700/tranZPUterSW.sav2
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CPLD/SW700/v1.3/MZ700/tranZPUterSW.vhd.clk
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CPLD/SW700/v1.3/MZ700/tranZPUterSW.vhd.presweep
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CPLD/SW700/v1.3/MZ2000/build/tzpuSW700 MZ2000.qsf
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW700.sav.bak
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW700.vhd.sav1
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW700.vhd.sav2
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW700.vhd.sav3
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CPLD/SW700/v1.3/MZ2000/tranZPUterSW700_tidy.vhd
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CPLD/SW700/v1.3/MZ700/rr
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CPLD/SW700/v1.3/MZ700/rtsd
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CPLD/SW700/v1.3/MZ700/working
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CPLD/SW700/v1.3/MZ700/working2
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CPLD/SW700/v1.3/MZ80A/build/db/
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CPLD/SW700/v1.3/MZ80A/build/emuMZ_ClockII.qip
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CPLD/SW700/v1.3/MZ80A/build/greybox_tmp/
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CPLD/SW700/v1.3/MZ80A/build/incremental_db/
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CPLD/SW700/v1.3/MZ80A/build/output_files/
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CPLD/SW700/v1.3/MZ80A/build/simulation/
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CPLD/SW700/v1.3/MZ80A/build/tranZPUterSW_constraints.sdc.clk
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FPGA/SW700/snap1/
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FPGA/SW700/v1.3.bak030122/
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FPGA/SW700/v1.3.bak070222/
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FPGA/SW700/v1.3/MZ700/PLL/emuMZ_VarClock.qip
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FPGA/SW700/v1.3/MZ700/PLL/greybox_tmp/
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FPGA/SW700/v1.3/MZ700/VideoController/.VideoController.vhd.swo.16t1
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.07t1
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.07t2
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.07t3
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.07t4
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.07t5
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.09t1
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.10t1
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.10t2
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.10t3work
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.10t4
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.16t1
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.1711
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.1911
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.2111
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.prejit
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.savcrash
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController.vhd.save06
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FPGA/SW700/v1.3/MZ700/VideoController/VideoController_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ700/VideoController/recover.1612
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FPGA/SW700/v1.3/MZ700/VideoController/xxxc
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FPGA/SW700/v1.3/MZ700/build/db.x/
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FPGA/SW700/v1.3/MZ700/coreMZ_emuMZ_constraints.sdc.old
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FPGA/SW700/v1.3/MZ700/ee
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FPGA/SW700/v1.3/MZ700/emuMZ/clkgen-all-divide
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FPGA/SW700/v1.3/MZ700/emuMZ/emuMZ_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ700/emuMZ/keymatrix_mz700.vhd.07022021
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FPGA/SW700/v1.3/MZ700/emuMZ/ll
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FPGA/SW700/v1.3/MZ700/emuMZ/mif/sav
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FPGA/SW700/v1.3/MZ700/emuMZ/mif/sav2
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FPGA/SW700/v1.3/MZ700/emuMZ/mif/sav3
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FPGA/SW700/v1.3/MZ700/emuMZ/rr
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FPGA/SW700/v1.3/MZ700/emuMZ/sigma_delta_dac.v
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FPGA/SW700/v1.3/MZ700/emuMZ/wd1793.newreadaddr
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FPGA/SW700/v1.3/MZ700/emuMZ/wd1793.oldreadaddr
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FPGA/SW700/v1.3/MZ700/emuMZ/wd1793.sv5
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FPGA/SW700/v1.3/MZ700/emuMZ/wd1793/cut1
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FPGA/SW700/v1.3/MZ700/emuMZ/wd1793/wd1793.sv5
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FPGA/SW700/v1.3/MZ700/keynew
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FPGA/SW700/v1.3/MZ700/sn76489_audio-master.zip
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FPGA/SW700/v1.3/MZ700/softT80/softT80_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ700/x1
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FPGA/SW700/v1.3/MZ700/x2
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software/roms/data
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software/roms/fill
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software/roms/keymap_readme.txt
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software/roms/split
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software/roms/x
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software/x/
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FPGA/SW700/v1.3/MZ80A/PLL/emuMZ_VarClock.qip
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FPGA/SW700/v1.3/MZ80A/PLL/greybox_tmp/
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FPGA/SW700/v1.3/MZ80A/VideoController/.VideoController.vhd.swo.16t1
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.07t1
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.07t2
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.07t3
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.07t4
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.07t5
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.09t1
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.10t1
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.10t2
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.10t3work
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.10t4
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.16t1
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.1711
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.1911
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.2111
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.prejit
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.savcrash
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController.vhd.save06
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FPGA/SW700/v1.3/MZ80A/VideoController/VideoController_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ80A/VideoController/recover.1612
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FPGA/SW700/v1.3/MZ80A/VideoController/xxxc
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FPGA/SW700/v1.3/MZ80A/build/db.x/
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FPGA/SW700/v1.3/MZ80A/coreMZ_emuMZ_constraints.sdc.old
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FPGA/SW700/v1.3/MZ80A/ee
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FPGA/SW700/v1.3/MZ80A/emuMZ/clkgen-all-divide
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FPGA/SW700/v1.3/MZ80A/emuMZ/emuMZ_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ80A/emuMZ/keymatrix_mz700.vhd.07022021
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FPGA/SW700/v1.3/MZ80A/emuMZ/ll
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FPGA/SW700/v1.3/MZ80A/emuMZ/mif/sav
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FPGA/SW700/v1.3/MZ80A/emuMZ/mif/sav2
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FPGA/SW700/v1.3/MZ80A/emuMZ/mif/sav3
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FPGA/SW700/v1.3/MZ80A/emuMZ/rr
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FPGA/SW700/v1.3/MZ80A/emuMZ/sigma_delta_dac.v
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FPGA/SW700/v1.3/MZ80A/emuMZ/wd1793.newreadaddr
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FPGA/SW700/v1.3/MZ80A/emuMZ/wd1793.oldreadaddr
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FPGA/SW700/v1.3/MZ80A/emuMZ/wd1793.sv5
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FPGA/SW700/v1.3/MZ80A/emuMZ/wd1793/cut1
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FPGA/SW700/v1.3/MZ80A/emuMZ/wd1793/wd1793.sv5
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FPGA/SW700/v1.3/MZ80A/keynew
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FPGA/SW700/v1.3/MZ80A/sn76489_audio-master.zip
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FPGA/SW700/v1.3/MZ80A/softT80/softT80_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ80A/x1
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FPGA/SW700/v1.3/MZ80A/x2
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FPGA/SW700/v1.3/MZ2000/PLL/emuMZ_VarClock.qip
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FPGA/SW700/v1.3/MZ2000/PLL/greybox_tmp/
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FPGA/SW700/v1.3/MZ2000/VideoController/.VideoController.vhd.swo.16t1
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.07t1
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.07t2
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.07t3
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.07t4
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.07t5
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.09t1
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.10t1
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.10t2
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.10t3work
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.10t4
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.16t1
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.1711
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.1911
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.2111
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.prejit
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.savcrash
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController.vhd.save06
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FPGA/SW700/v1.3/MZ2000/VideoController/VideoController_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ2000/VideoController/recover.1612
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FPGA/SW700/v1.3/MZ2000/VideoController/xxxc
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FPGA/SW700/v1.3/MZ2000/build/db.x/
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FPGA/SW700/v1.3/MZ2000/coreMZ_emuMZ_constraints.sdc.old
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FPGA/SW700/v1.3/MZ2000/ee
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FPGA/SW700/v1.3/MZ2000/emuMZ/clkgen-all-divide
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FPGA/SW700/v1.3/MZ2000/emuMZ/emuMZ_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ2000/emuMZ/keymatrix_mz700.vhd.07022021
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FPGA/SW700/v1.3/MZ2000/emuMZ/ll
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FPGA/SW700/v1.3/MZ2000/emuMZ/mif/sav
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FPGA/SW700/v1.3/MZ2000/emuMZ/mif/sav2
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FPGA/SW700/v1.3/MZ2000/emuMZ/mif/sav3
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FPGA/SW700/v1.3/MZ2000/emuMZ/rr
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FPGA/SW700/v1.3/MZ2000/emuMZ/sigma_delta_dac.v
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FPGA/SW700/v1.3/MZ2000/emuMZ/wd1793.newreadaddr
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FPGA/SW700/v1.3/MZ2000/emuMZ/wd1793.oldreadaddr
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FPGA/SW700/v1.3/MZ2000/emuMZ/wd1793.sv5
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FPGA/SW700/v1.3/MZ2000/emuMZ/wd1793/cut1
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FPGA/SW700/v1.3/MZ2000/emuMZ/wd1793/wd1793.sv5
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FPGA/SW700/v1.3/MZ2000/keynew
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FPGA/SW700/v1.3/MZ2000/sn76489_audio-master.zip
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FPGA/SW700/v1.3/MZ2000/softT80/softT80_constraints.sdc.hold
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FPGA/SW700/v1.3/MZ2000/x1
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FPGA/SW700/v1.3/MZ2000/x2
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FPGA/SW700/v1.3/MZ700/devices.old
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FPGA/SW700/v1.3/MZ2000/devices.old
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FPGA/SW700/v1.3/MZ80A/devices.old
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FPGA/SW700/v1.3/MZ700/build/x
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FPGA/SW700/v1.3/MZ700/build/simulation/
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FPGA/SW700/v1.3/MZ700/build/output_files/
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FPGA/SW700/v1.3/MZ700/build/incremental_db/
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FPGA/SW700/v1.3/MZ700/build/db/
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FPGA/SW700/v1.3/MZ700/build/core
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FPGA/SW700/v1.3/MZ700/build/coreMZ.qsf.bak
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FPGA/SW700/v1.3/MZ2000/build/x
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FPGA/SW700/v1.3/MZ2000/build/simulation/
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FPGA/SW700/v1.3/MZ2000/build/output_files/
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FPGA/SW700/v1.3/MZ2000/build/incremental_db/
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FPGA/SW700/v1.3/MZ2000/build/db/
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FPGA/SW700/v1.3/MZ2000/build/core
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FPGA/SW700/v1.3/MZ2000/build/coreMZ.qsf.bak
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FPGA/SW700/v1.3/MZ80A/build/x
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FPGA/SW700/v1.3/MZ80A/build/simulation/
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FPGA/SW700/v1.3/MZ80A/build/output_files/
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FPGA/SW700/v1.3/MZ80A/build/incremental_db/
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FPGA/SW700/v1.3/MZ80A/build/db/
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FPGA/SW700/v1.3/MZ80A/build/core
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FPGA/SW700/v1.3/MZ80A/build/coreMZ.qsf.bak
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