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Updates and compile and test verification

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This commit is contained in:
Philip Smart
2022-06-25 10:55:24 +01:00
parent 5e89baeadd
commit 112a9593e0
18 changed files with 6968 additions and 52 deletions
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1
.gitignore vendored
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@@ -50,3 +50,4 @@ sdkconfigq
components.x/ components.x/
components/ components/
main/main.cpp.bak2 main/main.cpp.bak2
webfs/

264
sdkconfig
View File

@@ -40,10 +40,10 @@ CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
# #
CONFIG_ENABLE_ARDUINO_DEPENDS=y CONFIG_ENABLE_ARDUINO_DEPENDS=y
# CONFIG_AUTOSTART_ARDUINO is not set # CONFIG_AUTOSTART_ARDUINO is not set
CONFIG_ARDUINO_RUN_CORE0=y # CONFIG_ARDUINO_RUN_CORE0 is not set
# CONFIG_ARDUINO_RUN_CORE1 is not set # CONFIG_ARDUINO_RUN_CORE1 is not set
# CONFIG_ARDUINO_RUN_NO_AFFINITY is not set CONFIG_ARDUINO_RUN_NO_AFFINITY=y
CONFIG_ARDUINO_RUNNING_CORE=0 CONFIG_ARDUINO_RUNNING_CORE=-1
CONFIG_ARDUINO_LOOP_STACK_SIZE=8192 CONFIG_ARDUINO_LOOP_STACK_SIZE=8192
CONFIG_ARDUINO_EVENT_RUN_CORE0=y CONFIG_ARDUINO_EVENT_RUN_CORE0=y
# CONFIG_ARDUINO_EVENT_RUN_CORE1 is not set # CONFIG_ARDUINO_EVENT_RUN_CORE1 is not set
@@ -77,7 +77,34 @@ CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT=y
# CONFIG_ARDUHAL_PARTITION_SCHEME_HUGE_APP is not set # CONFIG_ARDUHAL_PARTITION_SCHEME_HUGE_APP is not set
# CONFIG_ARDUHAL_PARTITION_SCHEME_MIN_SPIFFS is not set # CONFIG_ARDUHAL_PARTITION_SCHEME_MIN_SPIFFS is not set
CONFIG_ARDUHAL_PARTITION_SCHEME="default" CONFIG_ARDUHAL_PARTITION_SCHEME="default"
# CONFIG_ARDUINO_SELECTIVE_COMPILATION is not set CONFIG_ARDUINO_SELECTIVE_COMPILATION=y
CONFIG_ARDUINO_SELECTIVE_ArduinoOTA=y
# CONFIG_ARDUINO_SELECTIVE_AsyncUDP is not set
# CONFIG_ARDUINO_SELECTIVE_AzureIoT is not set
# CONFIG_ARDUINO_SELECTIVE_BLE is not set
# CONFIG_ARDUINO_SELECTIVE_BluetoothSerial is not set
# CONFIG_ARDUINO_SELECTIVE_DNSServer is not set
# CONFIG_ARDUINO_SELECTIVE_EEPROM is not set
CONFIG_ARDUINO_SELECTIVE_ESP32=y
CONFIG_ARDUINO_SELECTIVE_ESPmDNS=y
# CONFIG_ARDUINO_SELECTIVE_FFat is not set
CONFIG_ARDUINO_SELECTIVE_FS=y
CONFIG_ARDUINO_SELECTIVE_HTTPClient=y
CONFIG_ARDUINO_SELECTIVE_LITTLEFS=y
# CONFIG_ARDUINO_SELECTIVE_NetBIOS is not set
CONFIG_ARDUINO_SELECTIVE_Preferences=y
# CONFIG_ARDUINO_SELECTIVE_SD is not set
# CONFIG_ARDUINO_SELECTIVE_SD_MMC is not set
# CONFIG_ARDUINO_SELECTIVE_SimpleBLE is not set
# CONFIG_ARDUINO_SELECTIVE_SPI is not set
# CONFIG_ARDUINO_SELECTIVE_SPIFFS is not set
# CONFIG_ARDUINO_SELECTIVE_Ticker is not set
# CONFIG_ARDUINO_SELECTIVE_Update is not set
CONFIG_ARDUINO_SELECTIVE_WebServer=y
CONFIG_ARDUINO_SELECTIVE_WiFi=y
CONFIG_ARDUINO_SELECTIVE_WiFiClientSecure=y
# CONFIG_ARDUINO_SELECTIVE_WiFiProv is not set
# CONFIG_ARDUINO_SELECTIVE_Wire is not set
# end of Arduino Configuration # end of Arduino Configuration
# #
@@ -90,11 +117,11 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y # CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
CONFIG_BOOTLOADER_LOG_LEVEL=3 CONFIG_BOOTLOADER_LOG_LEVEL=2
# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set # CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
# CONFIG_BOOTLOADER_FACTORY_RESET is not set # CONFIG_BOOTLOADER_FACTORY_RESET is not set
@@ -176,9 +203,11 @@ CONFIG_PARTITION_TABLE_MD5=y
# #
# SharpKey Configuration # SharpKey Configuration
# #
CONFIG_SHARPKEY=y # CONFIG_SHARPKEY is not set
# CONFIG_MZ25KEY_MZ2500 is not set CONFIG_MZ25KEY_MZ2500=y
# CONFIG_MZ25KEY_MZ2800 is not set # CONFIG_MZ25KEY_MZ2800 is not set
CONFIG_DISABLE_FEATURE_SECURITY=y
# CONFIG_ENABLE_FEATURE_SECURITY is not set
# #
# PS2 Keyboard # PS2 Keyboard
@@ -308,9 +337,101 @@ CONFIG_APPTRACE_LOCK_ENABLE=y
# #
# Bluetooth # Bluetooth
# #
# CONFIG_BT_ENABLED is not set CONFIG_BT_ENABLED=y
#
# Bluetooth controller
#
# CONFIG_BTDM_CTRL_MODE_BLE_ONLY is not set
# CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY is not set
CONFIG_BTDM_CTRL_MODE_BTDM=y
CONFIG_BTDM_CTRL_BLE_MAX_CONN=5
CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN=5
CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN=0
CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_HCI=y
# CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_PCM is not set
CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=0
CONFIG_BTDM_CTRL_PCM_ROLE_EFF=0
CONFIG_BTDM_CTRL_PCM_POLAR_EFF=0
CONFIG_BTDM_CTRL_AUTO_LATENCY=y
CONFIG_BTDM_CTRL_AUTO_LATENCY_EFF=y
CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT=y
CONFIG_BTDM_CTRL_LEGACY_AUTH_VENDOR_EVT_EFF=y
CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=5
CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=5
CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0
CONFIG_BTDM_CTRL_PINNED_TO_CORE_0=y
# CONFIG_BTDM_CTRL_PINNED_TO_CORE_1 is not set
CONFIG_BTDM_CTRL_PINNED_TO_CORE=0
CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y
# CONFIG_BTDM_CTRL_HCI_MODE_UART_H4 is not set
#
# MODEM SLEEP Options
#
# CONFIG_BTDM_CTRL_MODEM_SLEEP is not set
# end of MODEM SLEEP Options
CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM=y
CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1
CONFIG_BTDM_BLE_SCAN_DUPL=y
CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE=y
# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA is not set
# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE is not set
CONFIG_BTDM_SCAN_DUPL_TYPE=0
CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE=10
# CONFIG_BTDM_BLE_MESH_SCAN_DUPL_EN is not set
CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED=y
CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y
CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM=100
CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
CONFIG_BTDM_RESERVE_DRAM=0xdb5c
CONFIG_BTDM_CTRL_HLI=y
# end of Bluetooth controller
CONFIG_BT_BLUEDROID_ENABLED=y
# CONFIG_BT_NIMBLE_ENABLED is not set
# CONFIG_BT_CONTROLLER_ONLY is not set
#
# Bluedroid Options
#
CONFIG_BT_BTC_TASK_STACK_SIZE=3072
CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0=y
# CONFIG_BT_BLUEDROID_PINNED_TO_CORE_1 is not set
CONFIG_BT_BLUEDROID_PINNED_TO_CORE=0
CONFIG_BT_BTU_TASK_STACK_SIZE=4096
# CONFIG_BT_BLUEDROID_MEM_DEBUG is not set
CONFIG_BT_CLASSIC_ENABLED=y
# CONFIG_BT_A2DP_ENABLE is not set
# CONFIG_BT_SPP_ENABLED is not set
# CONFIG_BT_HFP_ENABLE is not set
CONFIG_BT_HID_ENABLED=y
CONFIG_BT_HID_HOST_ENABLED=y
# CONFIG_BT_HID_DEVICE_ENABLED is not set
CONFIG_BT_SSP_ENABLED=y
CONFIG_BT_BLE_ENABLED=y
# CONFIG_BT_GATTS_ENABLE is not set
CONFIG_BT_GATTC_ENABLE=y
# CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set
CONFIG_BT_GATTC_CONNECT_RETRY_COUNT=7
CONFIG_BT_BLE_SMP_ENABLE=y
# CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
CONFIG_BT_STACK_NO_LOG=y
CONFIG_BT_ACL_CONNECTIONS=5
CONFIG_BT_MULTI_CONNECTION_ENBALE=y
# CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST is not set
CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY=y
# CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set
CONFIG_BT_SMP_ENABLE=y
# CONFIG_BT_BLE_ACT_SCAN_REP_ADV_SCAN is not set
CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT=60
# CONFIG_BT_BLE_RPA_SUPPORTED is not set
# end of Bluedroid Options
# end of Bluetooth # end of Bluetooth
# CONFIG_BLE_MESH is not set
# #
# CoAP Configuration # CoAP Configuration
# #
@@ -387,12 +508,11 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
# #
CONFIG_EFUSE_CUSTOM_TABLE=y CONFIG_EFUSE_CUSTOM_TABLE=y
CONFIG_EFUSE_CUSTOM_TABLE_FILENAME="main/esp_efuse_custom_table.csv" CONFIG_EFUSE_CUSTOM_TABLE_FILENAME="main/esp_efuse_custom_table.csv"
CONFIG_EFUSE_VIRTUAL=y # CONFIG_EFUSE_VIRTUAL is not set
# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH is not set CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE=y
# CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set # CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 is not set
CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y
# CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set # CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set
CONFIG_EFUSE_MAX_BLK_LEN=192 CONFIG_EFUSE_MAX_BLK_LEN=256
# end of eFuse Bit Manager # end of eFuse Bit Manager
# #
@@ -450,7 +570,6 @@ CONFIG_ESP32_XTAL_FREQ_40=y
# CONFIG_ESP32_XTAL_FREQ_AUTO is not set # CONFIG_ESP32_XTAL_FREQ_AUTO is not set
CONFIG_ESP32_XTAL_FREQ=40 CONFIG_ESP32_XTAL_FREQ=40
# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_ESP32_NO_BLOBS is not set
# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set
# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set
@@ -483,10 +602,7 @@ CONFIG_ETH_RMII_CLK_IN_GPIO=0
CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_BUFFER_SIZE=512
CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_RX_BUFFER_NUM=10
CONFIG_ETH_DMA_TX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10
CONFIG_ETH_USE_SPI_ETHERNET=y # CONFIG_ETH_USE_SPI_ETHERNET is not set
# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set
# CONFIG_ETH_SPI_ETHERNET_W5500 is not set
# CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL is not set
# CONFIG_ETH_USE_OPENETH is not set # CONFIG_ETH_USE_OPENETH is not set
# end of Ethernet # end of Ethernet
@@ -593,9 +709,9 @@ CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
# #
CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
# CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=10 CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP_PHY_MAX_TX_POWER=10 CONFIG_ESP_PHY_MAX_TX_POWER=20
CONFIG_ESP_PHY_REDUCE_TX_POWER=y # CONFIG_ESP_PHY_REDUCE_TX_POWER is not set
# end of PHY # end of PHY
# #
@@ -634,16 +750,15 @@ CONFIG_ESP_CONSOLE_MULTIPLE_UART=y
CONFIG_ESP_CONSOLE_UART_NUM=0 CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
CONFIG_ESP_INT_WDT=y CONFIG_ESP_INT_WDT=y
CONFIG_ESP_INT_WDT_TIMEOUT_MS=1000 CONFIG_ESP_INT_WDT_TIMEOUT_MS=5000
# CONFIG_ESP_INT_WDT_CHECK_CPU1 is not set # CONFIG_ESP_INT_WDT_CHECK_CPU1 is not set
CONFIG_ESP_TASK_WDT=y CONFIG_ESP_TASK_WDT=y
# CONFIG_ESP_TASK_WDT_PANIC is not set CONFIG_ESP_TASK_WDT_PANIC=y
CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
# CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set
# CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
# CONFIG_ESP_PANIC_HANDLER_IRAM is not set # CONFIG_ESP_PANIC_HANDLER_IRAM is not set
# CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5=y
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
# end of ESP System Settings # end of ESP System Settings
# #
@@ -663,13 +778,14 @@ CONFIG_ESP_TIMER_IMPL_TG0_LAC=y
# Wi-Fi # Wi-Fi
# #
CONFIG_ESP32_WIFI_ENABLED=y CONFIG_ESP32_WIFI_ENABLED=y
# CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE is not set
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
# CONFIG_ESP32_WIFI_CSI_ENABLED is not set CONFIG_ESP32_WIFI_CSI_ENABLED=y
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
CONFIG_ESP32_WIFI_TX_BA_WIN=6 CONFIG_ESP32_WIFI_TX_BA_WIN=6
CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
@@ -681,7 +797,7 @@ CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752
CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
CONFIG_ESP32_WIFI_IRAM_OPT=y CONFIG_ESP32_WIFI_IRAM_OPT=y
CONFIG_ESP32_WIFI_RX_IRAM_OPT=y CONFIG_ESP32_WIFI_RX_IRAM_OPT=y
CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set
# CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set
# CONFIG_ESP_WIFI_GMAC_SUPPORT is not set # CONFIG_ESP_WIFI_GMAC_SUPPORT is not set
@@ -949,10 +1065,10 @@ CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y
# end of Checksums # end of Checksums
CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY is not set
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0=y
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x0
# CONFIG_LWIP_PPP_SUPPORT is not set # CONFIG_LWIP_PPP_SUPPORT is not set
CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
@@ -1024,8 +1140,8 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
# end of Certificate Bundle # end of Certificate Bundle
# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set CONFIG_MBEDTLS_ECP_RESTARTABLE=y
# CONFIG_MBEDTLS_CMAC_C is not set CONFIG_MBEDTLS_CMAC_C=y
CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_HARDWARE_AES=y
CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_MPI=y
CONFIG_MBEDTLS_HARDWARE_SHA=y CONFIG_MBEDTLS_HARDWARE_SHA=y
@@ -1142,10 +1258,9 @@ CONFIG_MDNS_MULTIPLE_INSTANCE=y
# #
# ESP-MQTT Configurations # ESP-MQTT Configurations
# #
CONFIG_MQTT_PROTOCOL_311=y # CONFIG_MQTT_PROTOCOL_311 is not set
CONFIG_MQTT_TRANSPORT_SSL=y # CONFIG_MQTT_TRANSPORT_SSL is not set
CONFIG_MQTT_TRANSPORT_WEBSOCKET=y # CONFIG_MQTT_TRANSPORT_WEBSOCKET is not set
CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y
# CONFIG_MQTT_MSG_ID_INCREMENTAL is not set # CONFIG_MQTT_MSG_ID_INCREMENTAL is not set
# CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set # CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set
# CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set # CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set
@@ -1175,7 +1290,7 @@ CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
# OpenSSL # OpenSSL
# #
# CONFIG_OPENSSL_DEBUG is not set # CONFIG_OPENSSL_DEBUG is not set
CONFIG_OPENSSL_ERROR_STACK=y # CONFIG_OPENSSL_ERROR_STACK is not set
# CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set # CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set
CONFIG_OPENSSL_ASSERT_EXIT=y CONFIG_OPENSSL_ASSERT_EXIT=y
# end of OpenSSL # end of OpenSSL
@@ -1228,7 +1343,7 @@ CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
# end of Auto-detect flash chips # end of Auto-detect flash chips
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y # CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE is not set
# end of SPI Flash driver # end of SPI Flash driver
# #
@@ -1321,6 +1436,7 @@ CONFIG_WL_SECTOR_SIZE=4096
# #
CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16
CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30
# CONFIG_WIFI_PROV_BLE_BONDING is not set
# end of Wi-Fi Provisioning Manager # end of Wi-Fi Provisioning Manager
# #
@@ -1366,11 +1482,11 @@ CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
CONFIG_TOOLPREFIX="xtensa-esp32-elf-" CONFIG_TOOLPREFIX="xtensa-esp32-elf-"
# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set CONFIG_LOG_BOOTLOADER_LEVEL_WARN=y
CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y # CONFIG_LOG_BOOTLOADER_LEVEL_INFO is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
CONFIG_LOG_BOOTLOADER_LEVEL=3 CONFIG_LOG_BOOTLOADER_LEVEL=2
# CONFIG_APP_ROLLBACK_ENABLE is not set # CONFIG_APP_ROLLBACK_ENABLE is not set
# CONFIG_FLASH_ENCRYPTION_ENABLED is not set # CONFIG_FLASH_ENCRYPTION_ENABLED is not set
# CONFIG_FLASHMODE_QIO is not set # CONFIG_FLASHMODE_QIO is not set
@@ -1402,6 +1518,50 @@ CONFIG_STACK_CHECK_NONE=y
# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
CONFIG_ESP32_APPTRACE_DEST_NONE=y CONFIG_ESP32_APPTRACE_DEST_NONE=y
CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
# CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY is not set
# CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY is not set
CONFIG_BTDM_CONTROLLER_MODE_BTDM=y
CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN=5
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN=5
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN=0
CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=5
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=5
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0
CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0
CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y
# CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set
# CONFIG_BTDM_CONTROLLER_MODEM_SLEEP is not set
CONFIG_BLE_SCAN_DUPLICATE=y
CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR=y
# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA is not set
# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA_AND_DEVICE_ADDR is not set
CONFIG_SCAN_DUPLICATE_TYPE=0
CONFIG_DUPLICATE_SCAN_CACHE_SIZE=10
# CONFIG_BLE_MESH_SCAN_DUPLICATE_EN is not set
CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED=y
CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED=y
CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM=100
CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD=20
CONFIG_BLUEDROID_ENABLED=y
# CONFIG_NIMBLE_ENABLED is not set
CONFIG_BTC_TASK_STACK_SIZE=3072
CONFIG_BLUEDROID_PINNED_TO_CORE_0=y
# CONFIG_BLUEDROID_PINNED_TO_CORE_1 is not set
CONFIG_BLUEDROID_PINNED_TO_CORE=0
CONFIG_BTU_TASK_STACK_SIZE=4096
# CONFIG_BLUEDROID_MEM_DEBUG is not set
CONFIG_CLASSIC_BT_ENABLED=y
# CONFIG_A2DP_ENABLE is not set
# CONFIG_HFP_ENABLE is not set
# CONFIG_GATTS_ENABLE is not set
CONFIG_GATTC_ENABLE=y
# CONFIG_GATTC_CACHE_NVS_FLASH is not set
CONFIG_BLE_SMP_ENABLE=y
# CONFIG_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set
# CONFIG_BLE_HOST_QUEUE_CONGESTION_CHECK is not set
CONFIG_SMP_ENABLE=y
# CONFIG_BLE_ACTIVE_SCAN_REPORT_ADV_SCAN_RSP_INDIVIDUALLY is not set
CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT=60
CONFIG_ADC2_DISABLE_DAC=y CONFIG_ADC2_DISABLE_DAC=y
# CONFIG_SPIRAM_SUPPORT is not set # CONFIG_SPIRAM_SUPPORT is not set
CONFIG_TRACEMEM_RESERVE_DRAM=0x0 CONFIG_TRACEMEM_RESERVE_DRAM=0x0
@@ -1422,7 +1582,6 @@ CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set
# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set
# CONFIG_NO_BLOBS is not set
# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set
# CONFIG_EVENT_LOOP_PROFILING is not set # CONFIG_EVENT_LOOP_PROFILING is not set
CONFIG_POST_EVENTS_FROM_ISR=y CONFIG_POST_EVENTS_FROM_ISR=y
@@ -1435,9 +1594,9 @@ CONFIG_ESP_SYSTEM_PD_FLASH=y
CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_IPC_TASK_STACK_SIZE=1024
CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=10 CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP32_PHY_MAX_TX_POWER=10 CONFIG_ESP32_PHY_MAX_TX_POWER=20
CONFIG_ESP32_REDUCE_PHY_TX_POWER=y # CONFIG_ESP32_REDUCE_PHY_TX_POWER is not set
# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set # CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set # CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
@@ -1452,14 +1611,15 @@ CONFIG_CONSOLE_UART=y
CONFIG_CONSOLE_UART_NUM=0 CONFIG_CONSOLE_UART_NUM=0
CONFIG_CONSOLE_UART_BAUDRATE=115200 CONFIG_CONSOLE_UART_BAUDRATE=115200
CONFIG_INT_WDT=y CONFIG_INT_WDT=y
CONFIG_INT_WDT_TIMEOUT_MS=1000 CONFIG_INT_WDT_TIMEOUT_MS=5000
# CONFIG_INT_WDT_CHECK_CPU1 is not set # CONFIG_INT_WDT_CHECK_CPU1 is not set
CONFIG_TASK_WDT=y CONFIG_TASK_WDT=y
# CONFIG_TASK_WDT_PANIC is not set CONFIG_TASK_WDT_PANIC=y
CONFIG_TASK_WDT_TIMEOUT_S=5 CONFIG_TASK_WDT_TIMEOUT_S=5
# CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set # CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 is not set
# CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set # CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set
CONFIG_TIMER_TASK_STACK_SIZE=3584 CONFIG_TIMER_TASK_STACK_SIZE=3584
# CONFIG_SW_COEXIST_ENABLE is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y
@@ -1501,10 +1661,10 @@ CONFIG_TCP_OVERSIZE_MSS=y
# CONFIG_TCP_OVERSIZE_DISABLE is not set # CONFIG_TCP_OVERSIZE_DISABLE is not set
CONFIG_UDP_RECVMBOX_SIZE=6 CONFIG_UDP_RECVMBOX_SIZE=6
CONFIG_TCPIP_TASK_STACK_SIZE=3072 CONFIG_TCPIP_TASK_STACK_SIZE=3072
CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY is not set
# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set CONFIG_TCPIP_TASK_AFFINITY_CPU0=y
# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set
CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF CONFIG_TCPIP_TASK_AFFINITY=0x0
# CONFIG_PPP_SUPPORT is not set # CONFIG_PPP_SUPPORT is not set
CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072

8
v1.2/CMakeLists.txt Normal file
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@@ -0,0 +1,8 @@
# For more information about build system see
# https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/build-system.html
# The following five lines of boilerplate have to be in your project's
# CMakeLists in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.5)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(main)

4
v1.2/main/CMakeLists.txt Normal file
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@@ -0,0 +1,4 @@
set(COMPONENT_SRCS main.cpp ssd1306.c ssd1306_i2c.c ssd1306_spi.c PS2KeyAdvanced.cpp)
set(COMPONENT_ADD_INCLUDEDIRS ".")
register_component()

416
v1.2/main/Kconfig.projbuild Normal file
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@@ -0,0 +1,416 @@
menu "MZ25Key Configuration"
menu "PS2 Keyboard"
config PS2_HW_DATAPIN
int "GPIO pin number used for the PS/2 DATA line"
range 0 46
default 14
help
GPIO number (IOxx) used to connect with the PS/2 Keyboard DATA line.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to I2C.
GPIOs 35-39 are input-only so cannot be used as outputs.
config PS2_HW_CLKPIN
int "GPIO pin number used for the PS/2 CLK line"
range 0 46
default 13
help
GPIO number (IOxx) used to connect with the PS/2 Keyboard CLK line.
This pin must be interrupt capable.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to I2C.
GPIOs 35-39 are input-only so cannot be used as outputs.
choice KEYBOARD
prompt "Keyboard mapping"
default KEYMAP_WYSE_KB3926
help
Choose the PS/2 Keyboard being used with the interface. This option selects the map defined in
PS2KeyTable.h which maps the PS/2 Keyboard scan codes to the standard PS2_KEY_* definitions used
in the map to MZ-2500/2800 keys.
config KEYMAP_WYSE_KB3926
bool "Wyse KB-3926"
help
The Wyse KB3296 PS/2 keyboard mapping.
config KEYMAP_STANDARD
bool "Standard Definition"
help
A generic PS/2 keyboard mapping.
endchoice
endmenu
menu "MZ-2500/2800 Interface"
choice "Model"
prompt "Machine Model"
default MODEL_MZ2500
help
Choose the target machine on which the interface will be used. The MZ-2500 and MZ-2800 have the same keyboard hardware but the protocol differs and this option
will choose the correct protocol.
config MODEL_MZ2500
bool "Sharp MZ-2500"
help
The target machine is a Sharp MZ-2500.
config MODEL_MZ2800
bool "Sharp MZ-2800"
help
The target machine is a Sharp MZ-2800.
endchoice
menu "4Bit Strobe Input"
config MZ_KDB0
int "KDB0 GPIO pin number"
range 0 46
default 23
help
GPIO number (IOxx) used to connect the MZ-2500/2800 4bit bidirectional data bus Bit 0 with the ESP32. See schematic for actual used value. May change with revisions.
config MZ_KDB1
int "KDB1 GPIO pin number"
range 0 46
default 25
help
GPIO number (IOxx) used to connect the MZ-2500/2800 4bit bidirectional data bus Bit 1 with the ESP32. See schematic for actual used value. May change with revisions.
config MZ_KDB2
int "KDB2 GPIO pin number"
range 0 46
default 26
help
GPIO number (IOxx) used to connect the MZ-2500/2800 4bit bidirectional data bus Bit 2 with the ESP32. See schematic for actual used value. May change with revisions.
config MZ_KDB3
int "KDB3 GPIO pin number"
range 0 46
default 27
help
GPIO number (IOxx) used to connect the MZ-2500/2800 4bit bidirectional data bus Bit 3 with the ESP32. See schematic for actual used value. May change with revisions.
endmenu
menu "8Bit Scan Data Output"
config MZ_KDO0
int "KDO0 GPIO pin number"
range 0 46
default 14
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 0 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO1
int "KDO1 GPIO pin number"
range 0 46
default 15
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 1 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO2
int "KDO2 GPIO pin number"
range 0 46
default 16
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 2 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO3
int "KDO3 GPIO pin number"
range 0 46
default 17
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 3 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO4
int "KDO4 GPIO pin number"
range 0 46
default 18
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 4 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO5
int "KDO5 GPIO pin number"
range 0 46
default 19
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 5 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO6
int "KDO6 GPIO pin number"
range 0 46
default 21
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 6 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
config MZ_KDO7
int "KDO7 GPIO pin number"
range 0 46
default 21
help
GPIO number (IOxx) used to connect the MZ-2500/2800 8bit scan data output Bit 7 to the 74HCT257 IC. See schematic for actual used value. May change with revisions.
endmenu
config MZ_RTSNI
int "RTSNi GPIO pin number"
range 0 46
default 35
help
GPIO number (IOxx) used to connect the MZ-2500/2800 RTSN line with the ESP32. See schematic for actual used value. May change with revisions.
config MZ_KDI4
int "KDI4 GPIO pin number"
range 0 46
default 13
help
GPIO number (IOxx) used to connect the MZ-2500/2800 KDI4 line with the ESP32. See schematic for actual used value. May change with revisions.
endmenu
menu "WiFi"
config MZ_WIFI_ENABLED
bool "Enable WiFi connectivity"
default false
help
Allow interface to act as an Access Point to allow external connectivity. Once connected the WiFi is intended to be used for making
key mapping changes.
This is an experimental feature and under development.
config MZ_WIFI_EN_KEY
int "WiFi Enable GPIO pin number"
range 0 46
default 34
depends on MZ_WIFI_ENABLED
help
GPIO number (IOxx) used by the WiFi En switch to enable wifi connectivity.
config MZ_SSID
string "Default SSID in Access Point Mode"
default "mz25key"
depends on MZ_WIFI_ENABLED
help
The SSID broadcast whilst the mz25key module advertises wireless connectivity.
config MZ_DEFAULT_SSID_PWD
string "Default password for initial connection to Access Point Mode"
default "mz25key"
depends on MZ_WIFI_ENABLED
help
The initial password needed to connect and logon to access point.
config MZ_WIFI_MAX_RETRIES
int "Maximum number of connection retries."
range 0 100
default 10
depends on MZ_WIFI_ENABLED
help
Number of retries allowed for making a wireless connection with a client.
config MZ_WIFI_AP_CHANNEL
int "Channel of the Access Point."
range 0 13
default 7
depends on MZ_WIFI_ENABLED
help
Channel use by the Access Point, default is 7.
config MZ_WIFI_SSID_HIDDEN
int "Broadcast SSID?"
range 0 1
default 0
depends on MZ_WIFI_ENABLED
help
Broadcast the SSID (0) or hide it (1).
config MZ_WIFI_MAX_CONNECTIONS
int "Maximum sinultaneous connections."
range 0 20
default 5
depends on MZ_WIFI_ENABLED
help
Maximum number of simultaneous open connections supported.
endmenu
menu "Debug Options"
menu "OLED"
choice INTERFACE
prompt "OLED Interface Type"
default OLED_DISABLED
help
Select Interface.
config OLED_DISABLED
bool "Interface disabled"
help
No OLED present or to be disabled.
config I2C_INTERFACE
bool "I2C Interface"
help
I2C Interface.
config SPI_INTERFACE
bool "SPI Interface"
help
SPI Interface.
endchoice
choice PANEL
prompt "OLED Panel Type"
depends on I2C_INTERFACE || SPI_INTERFACE
default SSD1306_128x64
help
Select Panel Type.
config SSD1306_128x32
bool "128x32 Panel"
help
Panel is 128x32.
config SSD1306_128x64
bool "128x64 Panel"
help
Panel is 128x64.
endchoice
config OFFSETX
int "GRAM X OFFSET"
range 0 99
default 0
help
When your TFT have offset(X), set it.
config FLIP
bool "Flip upside down"
default false
help
Flip upside down.
config SCL_GPIO
depends on I2C_INTERFACE
int "SCL GPIO number"
range 0 46
default 22 if IDF_TARGET_ESP32
default 12 if IDF_TARGET_ESP32S2
default 9 if IDF_TARGET_ESP32C3
default 15 if IDF_TARGET_HELTEC32
help
GPIO number (IOxx) to I2C SCL.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to I2C.
GPIOs 35-39 are input-only so cannot be used as outputs.
config SDA_GPIO
depends on I2C_INTERFACE
int "SDA GPIO number"
range 0 46
default 21 if IDF_TARGET_ESP32
default 11 if IDF_TARGET_ESP32S2
default 10 if IDF_TARGET_ESP32C3
default 4 if IDF_TARGET_HELTEC32
help
GPIO number (IOxx) to I2C SDA.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to I2C.
GPIOs 35-39 are input-only so cannot be used as outputs.
config RESET_GPIO
int "RESET GPIO number"
range -1 46
default -1 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3
default 16 if IDF_TARGET_HELTEC32
help
GPIO number (IOxx) to RESET.
When it is -1, RESET isn't performed.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to Reset.
GPIOs 35-39 are input-only so cannot be used as outputs.
config MOSI_GPIO
depends on SPI_INTERFACE
int "MOSI GPIO number"
range 0 46
default 23 if IDF_TARGET_ESP32
default 35 if IDF_TARGET_ESP32S2
default 0 if IDF_TARGET_ESP32C3
help
GPIO number (IOxx) to SPI MOSI.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to DC.
On the ESP32, GPIOs 35-39 are input-only so cannot be used as outputs.
On the ESP32-S2, GPIO 46 is input-only so cannot be used as outputs.
config SCLK_GPIO
depends on SPI_INTERFACE
int "SCLK GPIO number"
range 0 46
default 18 if IDF_TARGET_ESP32
default 36 if IDF_TARGET_ESP32S2
default 1 if IDF_TARGET_ESP32C3
help
GPIO number (IOxx) to SPI SCLK.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to DC.
On the ESP32, GPIOs 35-39 are input-only so cannot be used as outputs.
On the ESP32-S2, GPIO 46 is input-only so cannot be used as outputs.
config CS_GPIO
depends on SPI_INTERFACE
int "CS GPIO number"
range 0 34
default 5 if IDF_TARGET_ESP32
default 34 if IDF_TARGET_ESP32S2
default 10 if IDF_TARGET_ESP32C3
help
GPIO number (IOxx) to SPI CS.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to CS.
GPIOs 35-39 are input-only so cannot be used as outputs.
config DC_GPIO
depends on SPI_INTERFACE
int "DC GPIO number"
range 0 34
default 2
help
GPIO number (IOxx) to SPI DC.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to DC.
GPIOs 35-39 are input-only so cannot be used as outputs.
endmenu
config MZ_DEBUG_SERIAL
bool "Serial debug output"
default false
help
Enable debug output (non ESP logging) on the serial port.
config MZ_DISABLE_KDB
bool "Disable input mode actuation of the KDB data bus"
default false
help
Disable the MZ Interface KDB input configuration step, useful feature for debugging.
config MZ_DISABLE_KDO
bool "Disable output mode actuation of the KDO strobe row"
default false
help
Disable the MZ Interface KDO output configuration step, useful feature for debugging.
config MZ_DISABLE_RTSNI
bool "Disable input mode actuation of the RTSNi signal"
default false
help
Disable the MZ Interface RTSNi input configuration step, useful feature for debugging.
config MZ_DISABLE_KDI
bool "Disable input mode actuation of the KDI4 signal"
default false
help
Disable the MZ Interface KDI input configuration step, useful feature for debugging.
endmenu
config PWRLED
int "GPIO pin number used for Power On and Status LED"
range 0 46
default 25
help
GPIO number (IOxx) used to control the Power On/Status LED.
Some GPIOs are used for other purposes (flash connections, etc.) and cannot be used to I2C.
GPIOs 35-39 are input-only so cannot be used as outputs.
endmenu

309
v1.2/main/MZKeyTable.h Normal file
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@@ -0,0 +1,309 @@
/////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// Name: MZKeyTable.h
// Created: Jan 2022
// Version: v1.0
// Author(s): Philip Smart
// Description: The PS/2 Scan Code to MZ-2500/2800 Key Matrix mapping logic.
// This source file contains the definitions and tables to convert a PS/2 scan code
// into an MZ 14x8 matrix equivalent for the received key. The matrix is then read
// out to the MZ-2500/2800 as though it was a real keyboard.
// Credits:
// Copyright: (c) 2019-2022 Philip Smart <philip.smart@net2net.org>
//
// History: Jan 2022 - Initial write.
// Feb 2022 - Added parameterisation to the mapping table such that keymaps
// are applied according to machine selected to cater for differences
// between the MZ2500/2000/80B. Also added release parameters which are
// needed when say SHIFT+Key on PS/2 is required whereas on the MZ
// only the mapped key. As SHIFT is an override and will be presented to
// the MZ, it needs to be deactivated before applying a mapped key then
// reactivated after completion.
//
// Notes: See Makefile to enable/disable conditional components
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////
// This source file is free software: you can redistribute it and#or modify
// it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This source file is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <http://www.gnu.org/licenses/>.
/////////////////////////////////////////////////////////////////////////////////////////////////////////
#ifndef KEYTABLE_H
#define KEYTABLE_H
// The initial mapping is made inside the PS2KeyAdvanced class from Scan Code Set 2 to ASCII
// for a selected keyboard. Special functions are detected and combined inside this module
// before mapping with the table below to MZ Scan Matrix.
// ie. PS/2 Scan Code -> ASCII + Flags -> MZ Scan Matrix
#include <PS2KeyAdvanced.h>
///////////////////////////
// MZ-2500 Keyboard Map. //
///////////////////////////
//
// Row D7 D6 D5 D4 D3 D2 D1 D0
//----------------------------------------------------------------------------------
// 0 F8 F7 F6 F5 F4 F3 F2 F1
// 1 KP - KP + KP . KP , KP 9 KP 8 F1O F9
// 2 KP 7 KP 6 KP 5 KP 4 KP 3 KP 2 KP 1 KP 0
// 3 BREAK RIGHT LEFT DOWN UP RETURN SPACE TAB
// 4 G F E D C B A / ?
// 5 O N M L K J I H
// 6 W V U T S R Q P
// 7 , < . > _ YEN | ^ '¿ Z ¿ Y X ¿
// 8 7 ' 6 & 5 % 4 $ 3 # 2 " 1 ! 0
// 9 [ { @ ` - = ; + : * 9 ) 8 (
// 10 KP / KP * ESC BACKSPACE INST/DEL CLR/HOME COPY ] }
// 11 CTRL KANA SHIFT LOCK GRAPH
// 12 KJ2 KJ1
// 13 HELP ARGO
//
// Col 0 1 2 3 4 5 6 7 8 9 10 11 12 13
// --------------------------------------------------------------------------------------------------------------------------------------
// D0 F1 F9 KP 0 TAB / ? H P X 0 8 ( ] } GRAPH KJ1 ARGO
// D1 F2 F10 KP 1 SPACE A I Q Y 1 ! 9 ) COPY LOCK KJ2 HELP
// D2 F3 KP 8 KP 2 RETURN B J R Z 2 " : * CLR/HOME SHIFT
// D3 F4 KP 9 KP 3 UP C K S ^ '¿ 3 # ; + INST/DEL KANA
// D4 F5 KP , KP 4 DOWN D L T YEN | 4 $ - = BACKSPACE CTRL
// D5 F6 KP . KP 5 LEFT E M U _ 5 % @ ` ESC
// D6 F7 KP + KP 6 RIGHT F N V . > 6 & [ { KP *
// D7 F8 KP - KP 7 BREAK G O W , < 7 ' KP /
//
//
#define MZ_ALL 0
#define MZ_80B 1
#define MZ_2000 2
#define MZ_2500 3
#define PSMZTBL_KEYPOS 0
#define PSMZTBL_MACHINE 1
#define PSMZTBL_SHIFTPOS 2
#define PSMZTBL_FUNCPOS 3
#define PSMZTBL_CTRLPOS 4
#define PSMZTBL_ALTPOS 5
#define PSMZTBL_ALTGRPOS 6
#define PSMZTBL_GUIPOS 7
#define PSMZTBL_MK_ROW1 8
#define PSMZTBL_MK_KEY1 9
#define PSMZTBL_MK_ROW2 10
#define PSMZTBL_MK_KEY2 11
#define PSMZTBL_MK_ROW3 12
#define PSMZTBL_MK_KEY3 13
#define PSMZTBL_BRK_ROW1 14
#define PSMZTBL_BRK_KEY1 15
#define PSMZTBL_BRK_ROW2 16
#define PSMZTBL_BRK_KEY2 17
#define PSMZTBL_MAXROWS 18
// Lookup table to matrix row/column co-ordinates.
//
// Given that the MZ-2500 can emulate 3 machines and each machine has it's own mapping, differences are tagged by machine name, ie. ALL, MZ80B, MZ2000, MZ2500
//
// If a PS2 key is matched, then the Matrix is updated using MK_ROW to point into the array with MK_KEY being the column value, equivalent of strobe line and
// the required KEY bits to be set. Upto 3 matrix bits can be set (3 key presses on the MZ-2500 keyboard) per PS/2 key. Upto 2 matrix releases can be set per
// PS/2 key. A key release is used when a modifier may already have been pressed, ie. SHIFT and it needs to be released to set the required key into the matrix.
// A set bit = 1, reset bits = 0 but is inverted in the actual matrix (1 = inactive, 0 = active), this applies for releases two, if bit = 1 then that key will be released.
// The table is scanned for a match from top to bottom. The first match is used so order is important. Japanese characters are being added as I gleam more information.
//
#if defined(CONFIG_KEYMAP_WYSE_KB3926) || defined(CONFIG_KEYMAP_STANDARD)
//
// This mapping is for the UK Wyse KB-3926 PS/2 keyboard
//
const unsigned char PS2toMZ[][PSMZTBL_MAXROWS] =
{
// < Keys to be applied on match > < Keys to be reset on match >
// PS2 Code Machine Shift Function Ctrl ALT ALT-Gr GUI MK_ROW1 MK_KEY1 MK_ROW2 MK_KEY2 MK_ROW3 MK_KEY3 BRK_ROW1 BRK_KEY1 BRK_ROW2 BRK_KEY2
PS2_KEY_F1, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F1
PS2_KEY_F2, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F2
PS2_KEY_F3, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F3
PS2_KEY_F4, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F4
PS2_KEY_F5, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F5
PS2_KEY_F6, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F6
PS2_KEY_F7, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F7
PS2_KEY_F8, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x00, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F8
PS2_KEY_F9, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F9
PS2_KEY_F10, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F10
PS2_KEY_F11, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // HELP
PS2_KEY_F12, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // COPY
PS2_KEY_TAB, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // TAB
PS2_KEY_0, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x02, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Close Right Bracket )
PS2_KEY_0, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 0
PS2_KEY_1, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x02, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Exclamation
PS2_KEY_1, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 1
PS2_KEY_2, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x04, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Double quote.
PS2_KEY_2, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 2
PS2_KEY_3, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Pound Sign -> Hash
PS2_KEY_3, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 3
PS2_KEY_4, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x10, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Dollar
PS2_KEY_4, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 4
PS2_KEY_5, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x20, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Percent
PS2_KEY_5, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 5
PS2_KEY_6, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // Kappa
PS2_KEY_6, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 6
PS2_KEY_7, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x08, 0x40, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Ampersand
PS2_KEY_7, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 7
PS2_KEY_8, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x04, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Star
PS2_KEY_8, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 8
PS2_KEY_9, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x01, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Open Left Bracket (
PS2_KEY_9, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 9
PS2_KEY_A, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // a
PS2_KEY_A, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // A
PS2_KEY_B, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // b
PS2_KEY_B, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // B
PS2_KEY_C, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // c
PS2_KEY_C, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // C
PS2_KEY_D, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // d
PS2_KEY_D, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // D
PS2_KEY_E, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // e
PS2_KEY_E, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // E
PS2_KEY_F, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // f
PS2_KEY_F, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // F
PS2_KEY_G, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // g
PS2_KEY_G, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // G
PS2_KEY_H, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // h
PS2_KEY_H, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // H
PS2_KEY_I, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // i
PS2_KEY_I, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // I
PS2_KEY_J, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // j
PS2_KEY_J, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // J
PS2_KEY_K, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // k
PS2_KEY_K, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // K
PS2_KEY_L, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // l
PS2_KEY_L, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // L
PS2_KEY_M, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // m
PS2_KEY_M, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // M
PS2_KEY_N, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // n
PS2_KEY_N, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // N
PS2_KEY_O, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x05, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // o
PS2_KEY_O, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x05, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // O
PS2_KEY_P, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // p
PS2_KEY_P, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // P
PS2_KEY_Q, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // q
PS2_KEY_Q, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Q
PS2_KEY_R, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // r
PS2_KEY_R, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // R
PS2_KEY_S, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // s
PS2_KEY_S, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // S
PS2_KEY_T, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // t
PS2_KEY_T, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // T
PS2_KEY_U, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // u
PS2_KEY_U, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // U
PS2_KEY_V, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // v
PS2_KEY_V, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // V
PS2_KEY_W, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x06, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // w
PS2_KEY_W, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x06, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // W
PS2_KEY_X, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // x
PS2_KEY_X, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // X
PS2_KEY_Y, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // y
PS2_KEY_Y, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Y
PS2_KEY_Z, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // z
PS2_KEY_Z, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Z
// PS2 Code Machine Shift Function Ctrl ALT ALT-Gr GUI MK_ROW1 MK_KEY1 MK_ROW2 MK_KEY2 MK_ROW3 MK_KEY3 BRK_ROW1 BRK_KEY1 BRK_ROW2 BRK_KEY2
PS2_KEY_SPACE, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Space
PS2_KEY_COMMA, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x80, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Less Than <
PS2_KEY_COMMA, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Comma ,
PS2_KEY_SEMI, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // Colon :
PS2_KEY_SEMI, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Semi-Colon ;
PS2_KEY_DOT, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x40, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Greater Than >
PS2_KEY_DOT, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Full stop .
PS2_KEY_DIV, MZ_2000, 1, 0, 0, 0, 0, 0, 0x07, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // Question ?
PS2_KEY_DIV, MZ_80B, 1, 0, 0, 0, 0, 0, 0x07, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // Question ?
PS2_KEY_DIV, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x04, 0x01, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Question ?
PS2_KEY_DIV, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x04, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Divide /
PS2_KEY_MINUS, MZ_2000, 1, 0, 0, 0, 0, 0, 0x08, 0x01, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Upper bar
PS2_KEY_MINUS, MZ_80B, 1, 0, 0, 0, 0, 0, 0x08, 0x01, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Upper bar
PS2_KEY_MINUS, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // Underscore
PS2_KEY_MINUS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
PS2_KEY_APOS, MZ_80B, 1, 0, 0, 0, 0, 0, 0x09, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // At @
PS2_KEY_APOS, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0x0B, 0x04, 0xFF, 0xFF, // At @
PS2_KEY_APOS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x80, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Single quote '
PS2_KEY_OPEN_SQ, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x40, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Open Left Brace {
PS2_KEY_OPEN_SQ, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Open Left Square Bracket [
PS2_KEY_EQUAL, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x09, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Plus +
PS2_KEY_EQUAL, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x10, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Equal =
PS2_KEY_CAPS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0B, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // LOCK
PS2_KEY_ENTER, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ENTER/RETURN
PS2_KEY_CLOSE_SQ, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x0A, 0x01, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Close Right Brace }
PS2_KEY_CLOSE_SQ, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Close Right Square Bracket ]
PS2_KEY_BACK, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x10, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, //
PS2_KEY_BACK, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x07, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Back slash maps to Yen
PS2_KEY_BTICK, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x07, 0x10, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Pipe
PS2_KEY_BTICK, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x09, 0x20, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Back tick `
PS2_KEY_HASH, MZ_2000, 1, 0, 0, 0, 0, 0, 0x07, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Tilde
PS2_KEY_HASH, MZ_80B, 1, 0, 0, 0, 0, 0, 0x07, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Tilde
PS2_KEY_HASH, MZ_ALL, 1, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Tilde has no mapping.
PS2_KEY_HASH, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x08, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Hash
PS2_KEY_BS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Backspace
PS2_KEY_ESC, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ESCape
PS2_KEY_SCROLL, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not assigned.
PS2_KEY_INSERT, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x08, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // INSERT
PS2_KEY_HOME, MZ_ALL, 1, 0, 0, 0, 0, 0, 0x0A, 0x04, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // CLR
PS2_KEY_HOME, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // HOME
PS2_KEY_PGUP, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not assigned.
PS2_KEY_DELETE, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // DELETE
PS2_KEY_END, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not assigned.
#if defined(CONFIG_MODEL_MZ2500)
PS2_KEY_PGDN, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not mapped
#endif
#if defined(CONFIG_MODEL_MZ2800)
PS2_KEY_PGDN, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0C, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Japanese Key - Previous
#endif
PS2_KEY_UP_ARROW, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Up Arrow
PS2_KEY_L_ARROW, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Left Arrow
PS2_KEY_DN_ARROW, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Down Arrow
PS2_KEY_R_ARROW, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Right Arrow
PS2_KEY_NUM, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not assigned.
// Keypad.
PS2_KEY_KP0, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 0
PS2_KEY_KP1, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 1
PS2_KEY_KP2, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 2
PS2_KEY_KP3, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 3
PS2_KEY_KP4, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 4
PS2_KEY_KP5, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 5
PS2_KEY_KP6, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 6
PS2_KEY_KP7, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x02, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 7
PS2_KEY_KP8, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 8
PS2_KEY_KP9, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad 9
PS2_KEY_KP_COMMA, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Comma ,
PS2_KEY_KP_DOT, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x20, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Full stop .
PS2_KEY_KP_PLUS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Plus +
PS2_KEY_KP_MINUS, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x01, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Minus -
PS2_KEY_KP_TIMES, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Times *
PS2_KEY_KP_DIV, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0A, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Divide /
PS2_KEY_KP_ENTER, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Keypad Ebter /
// PS2 Code Machine Shift Function Ctrl ALT ALT-Gr GUI MK_ROW1 MK_KEY1 MK_ROW2 MK_KEY2 MK_ROW3 MK_KEY3 BRK_ROW1 BRK_KEY1 BRK_ROW2 BRK_KEY2
// Special keys.
PS2_KEY_PRTSCR, MZ_ALL, 0, 1, 0, 0, 0, 0, 0x0D, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ARGO KEY
PS2_KEY_PAUSE, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x03, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // BREAK KEY
PS2_KEY_L_GUI, MZ_ALL, 0, 1, 0, 0, 0, 1, 0x0B, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // GRAPH KEY
PS2_KEY_L_ALT, MZ_ALL, 0, 1, 0, 1, 0, 0, 0x0C, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // KJ1 Sentence
PS2_KEY_R_ALT, MZ_ALL, 0, 1, 0, 0, 1, 0, 0x0C, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // KJ2 Transform
PS2_KEY_R_GUI, MZ_ALL, 0, 1, 0, 0, 0, 1, 0x0B, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // KANA KEY
PS2_KEY_MENU, MZ_ALL, 0, 1, 0, 0, 0, 1, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Not assigned.
// Modifiers are last, only being selected if an earlier match isnt made.
PS2_KEY_L_SHIFT, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
PS2_KEY_R_SHIFT, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0B, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
PS2_KEY_L_CTRL, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0B, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
#if defined(CONFIG_MODEL_MZ2500)
PS2_KEY_R_CTRL, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0B, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Map to Control
#endif
#if defined(CONFIG_MODEL_MZ2800)
PS2_KEY_R_CTRL, MZ_ALL, 0, 0, 0, 0, 0, 0, 0x0C, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // Japanese Key - Cancel
#endif
0, MZ_ALL, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
};
#endif
#endif // KEYTABLE_H

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/* Version V1.0.9
PS2KeyAdvanced.h - PS2KeyAdvanced library
Copyright (c) 2007 Free Software Foundation. All right reserved.
Written by Paul Carpenter, PC Services <sales@pcserviceselectronics.co.uk>
Created September 2014
Updated January 2016 - Paul Carpenter - add tested on Due and tidy ups for V1.5 Library Management
January 2020 Fix typos, correct keyboard reset status improve library.properties
and additional platform handling and some documentation
March 2020 Add SAMD1 as recognised support as has been tested by user
Improve different architecture handling
November 2020 Add support for STM32 from user Hiabuto-de
Tested on STM32Duino-Framework and PlatformIO on STM32F103C8T6 and an IBM Model M
July 2021 Add workaround for ESP32 issue with Silicon (hardware) from user submissions
IMPORTANT WARNING
If using a DUE or similar board with 3V3 I/O you MUST put a level translator
like a Texas Instruments TXS0102 or FET circuit as the signals are
Bi-directional (signals transmitted from both ends on same wire).
Failure to do so may damage your Arduino Due or similar board.
Test History
September 2014 Uno and Mega 2560 September 2014 using Arduino V1.6.0
January 2016 Uno, Mega 2560 and Due using Arduino 1.6.7 and Due Board
Manager V1.6.6
ONLY use defines in this file others may disappear on updates.
This is for a LATIN style keyboard using Scan code set 2. See various
websites on what different scan code sets use. Scan Code Set 2 is the
default scan code set for PS2 keyboards on power up.
Will support most keyboards even ones with multimedia keys or even 24 function keys.
Fully featured PS2 keyboard library to provide
All function and movement keys supported even multi-lingual
Parity checking of data sent/received on receive request keyboard resend
Resends data when needed handles keyboard protocol for RESEND and ECHO
Functions for get and set of
Scancode set in use READ only
LED and LOCK control
ReadID
Reset keyboard
Send ECHO
Ignore Break codes for keys
Ignore typematic repeat of CTRL, SHIFT, ALT, Num, Scroll, Caps
Handles NUM, CAPS and SCROLL lock keys to LEDs
Handles NUM/SCROLL internally
Read function Returns an UNSIGNED INT containing
Make/Break status
Caps status
Shift, CTRL, ALT, ALT GR, GUI keys
Flag for function key not a displayable/printable character
8 bit key code
Code Ranges (bottom byte of unsigned int)
0 invalid/error
1-1F Functions (Caps, Shift, ALT, Enter, DEL... )
1A-1F Functions with ASCII control code
(DEL, BS, TAB, ESC, ENTER, SPACE)
20-61 Printable characters noting
0-9 = 0x30 to 0x39 as ASCII
A to Z = 0x41 to 0x5A as upper case ASCII type codes
8B Extra European key
61-A0 Function keys and other special keys (plus F2 and F1)
61-78 F1 to F24
79-8A Multimedia
8B NOT included
8C-8E ACPI power
91-A0 and F2 and F1 - Special multilingual
A8-FF Keyboard communications commands (note F2 and F1 are special
codes for special multi-lingual keyboards)
By using these ranges it is possible to perform detection of any key and do
easy translation to ASCII/UTF-8 avoiding keys that do not have a valid code.
Top Byte is 8 bits denoting as follows with defines for bit code
Define name bit description
PS2_BREAK 15 1 = Break key code
(MSB) 0 = Make Key code
PS2_SHIFT 14 1 = Shift key pressed as well (either side)
0 = NO shift key
PS2_CTRL 13 1 = Ctrl key pressed as well (either side)
0 = NO Ctrl key
PS2_CAPS 12 1 = Caps Lock ON
0 = Caps lock OFF
PS2_ALT 11 1 = Left Alt key pressed as well
0 = NO Left Alt key
PS2_ALT_GR 10 1 = Right Alt (Alt GR) key pressed as well
0 = NO Right Alt key
PS2_GUI 9 1 = GUI key pressed as well (either)
0 = NO GUI key
PS2_FUNCTION 8 1 = FUNCTION key non-printable character (plus space, tab, enter)
0 = standard character key
Error Codes
Most functions return 0 or 0xFFFF as error, other codes to note and
handle appropriately
0xAA keyboard has reset and passed power up tests
will happen if keyboard plugged in after code start
0xFC Keyboard General error or power up fail
It is responsibility of your programme to deal with converting special cases like
<CTRL>+<ENTER> sends a special code to something else. If you wish to do that make a
NEW library called SOMETHING different NOT a variant or revision of this one, as you
are changing base functionality
See PS2KeyCode.h for codes from the keyboard this library uses to decode.
(may disappear in updates do not rely on that file or definitions)
See this file for returned definitions of Keys
Note defines starting
PS2_KC_* are internal defines for codes from the keyboard
PS2_KEY_* are the codes this library returns
PS2_* remaining defines for use in higher levels
To get the key as ASCII/UTF-8 single byte character conversion requires use
of PS2KeyMap library AS WELL.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef PS2KeyAdvanced_h
#define PS2KeyAdvanced_h
// Platform specific areas
// Harvard architecture settings for PROGMEM
// Add separate for EACH architecture as easier to maintain
// AVR (includes Teensy 2.0)
#if defined( ARDUINO_ARCH_AVR )
#define PS2_SUPPORTED 1
#define PS2_REQUIRES_PROGMEM 1
#define PS2_CLEAR_PENDING_IRQ 1
#endif
// SAM (Due)
#if defined( ARDUINO_ARCH_SAM )
#define PS2_SUPPORTED 1
#define PS2_CLEAR_PENDING_IRQ 1
#endif
// SAMD1
#if defined( ARDUINO_ARCH_SAMD1 )
#define PS2_SUPPORTED 1
#define PS2_CLEAR_PENDING_IRQ 1
#endif
// STM32
#if defined( ARDUINO_ARCH_STM32 )
#define PS2_SUPPORTED 1
#define PS2_CLEAR_PENDING_IRQ 1
#endif
// ESP32
#if defined( ARDUINO_ARCH_ESP32 )
#define PS2_SUPPORTED 1
#define PS2_ONLY_CHANGE_IRQ 1
#endif
// Invalid architecture
#if !( defined( PS2_SUPPORTED ) )
#warning Library is NOT supported on this board Use at your OWN risk
#endif
/* Flags/bit masks for status bits in returned unsigned int value */
#define PS2_BREAK 0x8000
#define PS2_SHIFT 0x4000
#define PS2_CTRL 0x2000
#define PS2_CAPS 0x1000
#define PS2_ALT 0x800
#define PS2_ALT_GR 0x400
#define PS2_GUI 0x200
#define PS2_FUNCTION 0x100
/* General defines of communications codes */
/* Command or response */
#define PS2_KEY_RESEND 0xFE
#define PS2_KEY_ACK 0xFA
#define PS2_KEY_ECHO 0xEE
/* Responses */
#define PS2_KEY_BAT 0xAA
// Actually buffer overrun
#define PS2_KEY_OVERRUN 0xFF
// Below is general error code
#define PS2_KEY_ERROR 0xFC
/* Command parameters for functions */
/* LED codes OR together */
#define PS2_LOCK_SCROLL 0x01
#define PS2_LOCK_NUM 0x02
#define PS2_LOCK_CAPS 0x04
/* Only useful for very few keyboards */
#define PS2_LOCK_EXTRA 0x08
/* Returned keycode definitions */
/* Do NOT change these codings as you will break base
functionality use PS2KeyMap for that and internationalisation */
#define PS2_KEY_NUM 0x01
#define PS2_KEY_SCROLL 0x02
#define PS2_KEY_CAPS 0x03
#define PS2_KEY_PRTSCR 0x04
#define PS2_KEY_PAUSE 0x05
#define PS2_KEY_L_SHIFT 0x06
#define PS2_KEY_R_SHIFT 0x07
#define PS2_KEY_L_CTRL 0X08
#define PS2_KEY_R_CTRL 0X09
#define PS2_KEY_L_ALT 0x0A
#define PS2_KEY_R_ALT 0x0B
/* Sometimes called windows key */
#define PS2_KEY_L_GUI 0x0C
#define PS2_KEY_R_GUI 0x0D
#define PS2_KEY_MENU 0x0E
/* Break is CTRL + PAUSE generated inside keyboard */
#define PS2_KEY_BREAK 0x0F
/* Generated by some keyboards by ALT and PRTSCR */
#define PS2_KEY_SYSRQ 0x10
#define PS2_KEY_HOME 0x11
#define PS2_KEY_END 0x12
#define PS2_KEY_PGUP 0x13
#define PS2_KEY_PGDN 0x14
#define PS2_KEY_L_ARROW 0x15
#define PS2_KEY_R_ARROW 0x16
#define PS2_KEY_UP_ARROW 0x17
#define PS2_KEY_DN_ARROW 0x18
#define PS2_KEY_INSERT 0x19
#define PS2_KEY_DELETE 0x1A
#define PS2_KEY_ESC 0x1B
#define PS2_KEY_BS 0x1C
#define PS2_KEY_TAB 0x1D
#define PS2_KEY_ENTER 0x1E
#define PS2_KEY_SPACE 0x1F
#define PS2_KEY_KP0 0x20
#define PS2_KEY_KP1 0x21
#define PS2_KEY_KP2 0x22
#define PS2_KEY_KP3 0x23
#define PS2_KEY_KP4 0x24
#define PS2_KEY_KP5 0x25
#define PS2_KEY_KP6 0x26
#define PS2_KEY_KP7 0x27
#define PS2_KEY_KP8 0x28
#define PS2_KEY_KP9 0x29
#define PS2_KEY_KP_DOT 0x2A
#define PS2_KEY_KP_ENTER 0x2B
#define PS2_KEY_KP_PLUS 0x2C
#define PS2_KEY_KP_MINUS 0x2D
#define PS2_KEY_KP_TIMES 0x2E
#define PS2_KEY_KP_DIV 0x2F
#define PS2_KEY_0 0X30
#define PS2_KEY_1 0X31
#define PS2_KEY_2 0X32
#define PS2_KEY_3 0X33
#define PS2_KEY_4 0X34
#define PS2_KEY_5 0X35
#define PS2_KEY_6 0X36
#define PS2_KEY_7 0X37
#define PS2_KEY_8 0X38
#define PS2_KEY_9 0X39
#define PS2_KEY_APOS 0X3A
#define PS2_KEY_COMMA 0X3B
#define PS2_KEY_MINUS 0X3C
#define PS2_KEY_DOT 0X3D
#define PS2_KEY_DIV 0X3E
/* Some Numeric keyboards have an '=' on right keypad */
#define PS2_KEY_KP_EQUAL 0x3F
/* Single quote or back quote */
#define PS2_KEY_SINGLE 0X40
#define PS2_KEY_A 0X41
#define PS2_KEY_B 0X42
#define PS2_KEY_C 0X43
#define PS2_KEY_D 0X44
#define PS2_KEY_E 0X45
#define PS2_KEY_F 0X46
#define PS2_KEY_G 0X47
#define PS2_KEY_H 0X48
#define PS2_KEY_I 0X49
#define PS2_KEY_J 0X4A
#define PS2_KEY_K 0X4B
#define PS2_KEY_L 0X4C
#define PS2_KEY_M 0X4D
#define PS2_KEY_N 0X4E
#define PS2_KEY_O 0X4F
#define PS2_KEY_P 0X50
#define PS2_KEY_Q 0X51
#define PS2_KEY_R 0X52
#define PS2_KEY_S 0X53
#define PS2_KEY_T 0X54
#define PS2_KEY_U 0X55
#define PS2_KEY_V 0X56
#define PS2_KEY_W 0X57
#define PS2_KEY_X 0X58
#define PS2_KEY_Y 0X59
#define PS2_KEY_Z 0X5A
#define PS2_KEY_SEMI 0X5B
#define PS2_KEY_BACK 0X5C
#define PS2_KEY_OPEN_SQ 0X5D
#define PS2_KEY_CLOSE_SQ 0X5E
#define PS2_KEY_EQUAL 0X5F
/* Some Numeric keypads have a comma key */
#define PS2_KEY_KP_COMMA 0x60
#define PS2_KEY_F1 0X61
#define PS2_KEY_F2 0X62
#define PS2_KEY_F3 0X63
#define PS2_KEY_F4 0X64
#define PS2_KEY_F5 0X65
#define PS2_KEY_F6 0X66
#define PS2_KEY_F7 0X67
#define PS2_KEY_F8 0X68
#define PS2_KEY_F9 0X69
#define PS2_KEY_F10 0X6A
#define PS2_KEY_F11 0X6B
#define PS2_KEY_F12 0X6C
#define PS2_KEY_F13 0X6D
#define PS2_KEY_F14 0X6E
#define PS2_KEY_F15 0X6F
#define PS2_KEY_F16 0X70
#define PS2_KEY_F17 0X71
#define PS2_KEY_F18 0X72
#define PS2_KEY_F19 0X73
#define PS2_KEY_F20 0X74
#define PS2_KEY_F21 0X75
#define PS2_KEY_F22 0X76
#define PS2_KEY_F23 0X77
#define PS2_KEY_F24 0X78
#define PS2_KEY_NEXT_TR 0X79
#define PS2_KEY_PREV_TR 0X7A
#define PS2_KEY_STOP 0X7B
#define PS2_KEY_PLAY 0X7C
#define PS2_KEY_MUTE 0X7D
#define PS2_KEY_VOL_UP 0X7E
#define PS2_KEY_VOL_DN 0X7F
#define PS2_KEY_MEDIA 0X80
#define PS2_KEY_EMAIL 0X81
#define PS2_KEY_CALC 0X82
#define PS2_KEY_COMPUTER 0X83
#define PS2_KEY_WEB_SEARCH 0X84
#define PS2_KEY_WEB_HOME 0X85
#define PS2_KEY_WEB_BACK 0X86
#define PS2_KEY_WEB_FORWARD 0X87
#define PS2_KEY_WEB_STOP 0X88
#define PS2_KEY_WEB_REFRESH 0X89
#define PS2_KEY_WEB_FAVOR 0X8A
#define PS2_KEY_EUROPE2 0X8B
#define PS2_KEY_POWER 0X8C
#define PS2_KEY_SLEEP 0X8D
#define PS2_KEY_WAKE 0X90
#define PS2_KEY_INTL1 0X91
#define PS2_KEY_INTL2 0X92
#define PS2_KEY_INTL3 0X93
#define PS2_KEY_INTL4 0X94
#define PS2_KEY_INTL5 0X95
#define PS2_KEY_LANG1 0X96
#define PS2_KEY_LANG2 0X97
#define PS2_KEY_LANG3 0X98
#define PS2_KEY_LANG4 0X99
#define PS2_KEY_LANG5 0xA0
#define PS2_KEY_BTICK 0X9A
#define PS2_KEY_HASH 0X9B
/*
Purpose: Provides advanced access to PS2 keyboards
Public class definitions
See standard error codes for error code returns
*/
class PS2KeyAdvanced {
public:
/* This constructor does basically nothing. Please call the begin(int,int)
method before using any other method of this class. */
PS2KeyAdvanced( );
/* Starts the keyboard "service" by registering the external interrupt.
setting the pin modes correctly and driving those needed to high.
Sets default LOCK status (LEDs) to passed in value or default of all off
The best place to call this method is in the setup routine. */
void begin( uint8_t, uint8_t );
// Additional key available check which doesnt affect the queue.
uint8_t keyAvailable(void);
/* Returns number of codes available or 0 for none */
uint8_t available( );
/* Returns the key last read from the keyboard.
If there is no key available, 0 is returned. */
uint16_t read( );
/* Returns the current status of Locks
Use Macro to mask out bits from
PS2_LOCK_NUM PS2_LOCK_CAPS PS2_LOCK_SCROLL */
uint8_t getLock( );
/* Sets the current status of Locks and LEDs
Use macro defines added together from
PS2_LOCK_NUM PS2_LOCK_CAPS PS2_LOCK_SCROLL */
void setLock( byte );
/* Set library to not send break key codes
1 = no break codes
0 = send break codes */
void setNoBreak( uint8_t );
/* Set library to not repeat make codes for CTRL, ALT, GUI, SHIFT
1 = no repeat codes
0 = send repeat codes */
void setNoRepeat( uint8_t );
/* Resets keyboard when reset has completed
keyboard sends AA - Pass or FC for fail
Read from keyboard data buffer */
void resetKey( );
/* Get the current Scancode Set used in keyboard
returned data in keyboard buffer read as keys */
void getScanCodeSet( void );
/* Get the current Scancode Set used in keyboard
returned data in keyboard buffer read as keys */
void readID( void );
/* Send Echo command to keyboard
returned data in keyboard buffer read as keys */
void echo( void );
/* Send Typematic rate/delay command to keyboard
First Parameter rate is 0 - 0x1F (31)
0 = 30 CPS
0x1F = 2 CPS
default in keyboard is 0xB (10.9 CPS)
Second Parameter delay is 0 - 3 for 0.25s to 1s in 0.25 increments
default in keyboard is 1 = 0.5 second delay
Returned data in keyboard buffer read as keys */
int typematic( uint8_t , uint8_t );
};
#endif

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/* Version V1.0.8
PS2KeyCode.h - PS2KeyAdvanced library Internal actual PS2 key code sequences
Copyright (c) 2007 Free Software Foundation. All right reserved.
Written by Paul Carpenter, PC Services <sales@pcserviceselectronics.co.uk>
Created September 2014
Updated January 2016 - Paul Carpenter - add tested on Due and tidy ups for V1.5 Library Management
Updated December 2019 - Paul Carpenter - Fix typo in code for Multimedia STOP
PRIVATE to library
Test History
September 2014 Uno and Mega 2560 September 2014 using Arduino V1.6.0
January 2016 Uno, Mega 2560 and Due using Arduino 1.6.7 and Due Board
Manager V1.6.6
This is for a LATIN style keyboard. Will support most keyboards even ones
with multimedia keys or even 24 function keys.
Definitions used for key codes from a PS2 keyboard, do not use in your
code these are to be handled INTERNALLY by the library.
(may disappear in updates do not rely on this file or definitions)
See PS2KeyAdvanced.h for codes returned from library and flag settings
Defines are in three groups
Special codes definition of communications bytes
Single Byte codes returned as key codes
Two byte Codes preceded by E0 code returned as keycodes
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef PS2KeyCode_h
#define PS2KeyCode_h
/* Ignore code for key code translation */
#define PS2_KEY_IGNORE 0xBB
// buffer sizes keyboard RX and TX, then key reading buffer
// Minimum size 8 can be larger
#define _RX_BUFFER_SIZE 8
// Minimum size 6 can be larger
#define _TX_BUFFER_SIZE 6
// Output Buffer of unsigned int values. Minimum size 4 can be larger
#define _KEY_BUFF_SIZE 4
/* private defines for library files not global */
/* _ps2mode status flags */
#define _PS2_BUSY 0x80
#define _TX_MODE 0x40
#define _BREAK_KEY 0x20
#define _WAIT_RESPONSE 0x10
#define _E0_MODE 0x08
#define _E1_MODE 0x04
#define _LAST_VALID 0x02
/* _tx_ready flags */
#define _HANDSHAKE 0x80
#define _COMMAND 0x01
/* Key Repeat defines */
#define _NO_BREAKS 0x08
#define _NO_REPEATS 0x80
/* PS2_keystatus byte masks (from 16 bit int masks) */
#define _BREAK ( PS2_BREAK >> 8 )
#define _SHIFT ( PS2_SHIFT >> 8 )
#define _CTRL ( PS2_CTRL >> 8 )
#define _CAPS ( PS2_CAPS >> 8 )
#define _ALT ( PS2_ALT >> 8 )
#define _ALT_GR ( PS2_ALT_GR >> 8 )
#define _GUI ( PS2_GUI >> 8 )
#define _FUNCTION ( PS2_FUNCTION >> 8 )
/* General defines of comms codes */
/* Command or response */
#define PS2_KC_RESEND 0xFE
#define PS2_KC_ACK 0xFA
#define PS2_KC_ECHO 0xEE
/* Responses */
#define PS2_KC_BAT 0xAA
// Actually buffer overrun
#define PS2_KC_OVERRUN 0xFF
// Below is general error code
#define PS2_KC_ERROR 0xFC
#define PS2_KC_KEYBREAK 0xF0
#define PS2_KC_EXTEND1 0xE1
#define PS2_KC_EXTEND 0xE0
/* Commands */
#define PS2_KC_RESET 0xFF
#define PS2_KC_DEFAULTS 0xF6
#define PS2_KC_DISABLE 0xF5
#define PS2_KC_ENABLE 0xF4
#define PS2_KC_RATE 0xF3
#define PS2_KC_READID 0xF2
#define PS2_KC_SCANCODE 0xF0
#define PS2_KC_LOCK 0xED
/* Single Byte Key Codes */
#define PS2_KC_NUM 0x77
#define PS2_KC_SCROLL 0x7E
#define PS2_KC_CAPS 0x58
#define PS2_KC_L_SHIFT 0x12
#define PS2_KC_R_SHIFT 0x59
/* This is Left CTRL and ALT but Right version is in E0 with same code */
#define PS2_KC_CTRL 0X14
#define PS2_KC_ALT 0x11
/* Generated by some keyboards by ALT and PRTSCR */
#define PS2_KC_SYSRQ 0x84
#define PS2_KC_ESC 0x76
#define PS2_KC_BS 0x66
#define PS2_KC_TAB 0x0D
#define PS2_KC_ENTER 0x5A
#define PS2_KC_SPACE 0x29
#define PS2_KC_KP0 0x70
#define PS2_KC_KP1 0x69
#define PS2_KC_KP2 0x72
#define PS2_KC_KP3 0x7A
#define PS2_KC_KP4 0x6B
#define PS2_KC_KP5 0x73
#define PS2_KC_KP6 0x74
#define PS2_KC_KP7 0x6C
#define PS2_KC_KP8 0x75
#define PS2_KC_KP9 0x7D
#define PS2_KC_KP_DOT 0x71
#define PS2_KC_KP_PLUS 0x79
#define PS2_KC_KP_MINUS 0x7B
#define PS2_KC_KP_TIMES 0x7C
/* Some keyboards have an '=' on right keypad */
#define PS2_KC_KP_EQUAL 0x0F
#define PS2_KC_0 0X45
#define PS2_KC_1 0X16
#define PS2_KC_2 0X1E
#define PS2_KC_3 0X26
#define PS2_KC_4 0X25
#define PS2_KC_5 0X2E
#define PS2_KC_6 0X36
#define PS2_KC_7 0X3D
#define PS2_KC_8 0X3E
#define PS2_KC_9 0X46
#define PS2_KC_APOS 0X52
#define PS2_KC_COMMA 0X41
#define PS2_KC_MINUS 0X4E
#define PS2_KC_DOT 0X49
#define PS2_KC_DIV 0X4A
/* Single quote or back apostrophe */
#define PS2_KC_BTICK 0X0E
#define PS2_KC_A 0X1C
#define PS2_KC_B 0X32
#define PS2_KC_C 0X21
#define PS2_KC_D 0X23
#define PS2_KC_E 0X24
#define PS2_KC_F 0X2B
#define PS2_KC_G 0X34
#define PS2_KC_H 0X33
#define PS2_KC_I 0X43
#define PS2_KC_J 0X3B
#define PS2_KC_K 0X42
#define PS2_KC_L 0X4B
#define PS2_KC_M 0X3A
#define PS2_KC_N 0X31
#define PS2_KC_O 0X44
#define PS2_KC_P 0X4D
#define PS2_KC_Q 0X15
#define PS2_KC_R 0X2D
#define PS2_KC_S 0X1B
#define PS2_KC_T 0X2C
#define PS2_KC_U 0X3C
#define PS2_KC_V 0X2A
#define PS2_KC_W 0X1D
#define PS2_KC_X 0X22
#define PS2_KC_Y 0X35
#define PS2_KC_Z 0X1A
#define PS2_KC_SEMI 0X4C
#define PS2_KC_BACK 0X5D
// Extra key left of Z on 102 keyboards
#define PS2_KC_EUROPE2 0x61
#define PS2_KC_OPEN_SQ 0X54
#define PS2_KC_CLOSE_SQ 0X5B
#define PS2_KC_EQUAL 0X55
#define PS2_KC_F1 0X05
#define PS2_KC_F2 0X06
#define PS2_KC_F3 0X04
#define PS2_KC_F4 0X0C
#define PS2_KC_F5 0X03
#define PS2_KC_F6 0X0B
#define PS2_KC_F7 0X83
#define PS2_KC_F8 0X0A
#define PS2_KC_F9 0X01
#define PS2_KC_F10 0X09
#define PS2_KC_F11 0X78
#define PS2_KC_F12 0X07
#define PS2_KC_F13 0X08
#define PS2_KC_F14 0X10
#define PS2_KC_F15 0X18
#define PS2_KC_F16 0X20
#define PS2_KC_F17 0X28
#define PS2_KC_F18 0X30
#define PS2_KC_F19 0X38
#define PS2_KC_F20 0X40
#define PS2_KC_F21 0X48
#define PS2_KC_F22 0X50
#define PS2_KC_F23 0X57
#define PS2_KC_F24 0X5F
#define PS2_KC_KP_COMMA 0X6D
#define PS2_KC_INTL1 0X51
#define PS2_KC_INTL2 0X13
#define PS2_KC_INTL3 0X6A
#define PS2_KC_INTL4 0X64
#define PS2_KC_INTL5 0X67
#define PS2_KC_LANG1 0XF2
#define PS2_KC_LANG2 0XF1
#define PS2_KC_LANG3 0X63
#define PS2_KC_LANG4 0X62
#define PS2_KC_LANG5 0X5F
/* Extended key codes E0 table for two byte codes */
/* PS2_CTRL and PS2_ALT Need using in any table for the right keys */
/* first is special case for PRTSCR not always used so ignored by decoding */
#define PS2_KC_IGNORE 0x12
#define PS2_KC_PRTSCR 0x7C
/* Sometimes called windows key */
#define PS2_KC_L_GUI 0x1F
#define PS2_KC_R_GUI 0x27
#define PS2_KC_MENU 0x2F
/* Break is CTRL + PAUSE generated inside keyboard */
#define PS2_KC_BREAK 0x7E
#define PS2_KC_HOME 0x6C
#define PS2_KC_END 0x69
#define PS2_KC_PGUP 0x7D
#define PS2_KC_PGDN 0x7A
#define PS2_KC_L_ARROW 0x6B
#define PS2_KC_R_ARROW 0x74
#define PS2_KC_UP_ARROW 0x75
#define PS2_KC_DN_ARROW 0x72
#define PS2_KC_INSERT 0x70
#define PS2_KC_DELETE 0x71
#define PS2_KC_KP_ENTER 0x5A
#define PS2_KC_KP_DIV 0x4A
#define PS2_KC_NEXT_TR 0X4D
#define PS2_KC_PREV_TR 0X15
#define PS2_KC_STOP 0X3B
#define PS2_KC_PLAY 0X34
#define PS2_KC_MUTE 0X23
#define PS2_KC_VOL_UP 0X32
#define PS2_KC_VOL_DN 0X21
#define PS2_KC_MEDIA 0X50
#define PS2_KC_EMAIL 0X48
#define PS2_KC_CALC 0X2B
#define PS2_KC_COMPUTER 0X40
#define PS2_KC_WEB_SEARCH 0X10
#define PS2_KC_WEB_HOME 0X3A
#define PS2_KC_WEB_BACK 0X38
#define PS2_KC_WEB_FORWARD 0X30
#define PS2_KC_WEB_STOP 0X28
#define PS2_KC_WEB_REFRESH 0X20
#define PS2_KC_WEB_FAVOR 0X18
#define PS2_KC_POWER 0X37
#define PS2_KC_SLEEP 0X3F
#define PS2_KC_WAKE 0X5E
#endif

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v1.2/main/PS2KeyTable.h Normal file
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/* Version V1.0.8
PS2KeyTable.h - PS2KeyAdvanced library keycode values to return values
Copyright (c) 2007 Free Software Foundation. All right reserved.
Written by Paul Carpenter, PC Services <sales@pcserviceselectronics.co.uk>
Created September 2014
V1.0.2 Updated January 2016 - Paul Carpenter - add tested on Due and tidy ups for V1.5 Library Management
PRIVATE to library
Test History
September 2014 Uno and Mega 2560 September 2014 using Arduino V1.6.0
January 2016 Uno, Mega 2560 and Due using Arduino 1.6.7 and Due Board
Manager V1.6.6
Internal to library private tables
(may disappear in updates do not rely on this file or definitions)
This is for a LATIN style keyboard. Will support most keyboards even ones
with multimedia keys or even 24 function keys.
Definitions used for key codes from a PS2 keyboard, do not use in your
code these are handled by the library.
See PS2KeyAdvanced.h for codes returned from library and flag settings
Two sets of tables
Single Byte codes returned as key codes
Two byte Codes preceded by E0 code returned as keycodes
Same tables used for make and break decode
Special cases are -
PRTSCR that ignores one of the sequences (E0,12) as this is not always sent
especially with modifier keys or some keyboards when typematic repeat comes on.
PAUSE as this is an 8 byte sequence only one starting E1 so main code gets E1
and waits for 7 more valid bytes to make the coding.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef PS2KeyTable_h
#define PS2KeyTable_h
/* Table contents are pairs of numbers
first code from keyboard
second is either PS2_KEY_IGNOPRE code or key code to return
Single byte Key table
In codes can only be 1 - 0x9F, plus 0xF2 and 0xF1
Out Codes in range 1 to 0x9F
*/
#if defined(CONFIG_KEYMAP_WYSE_KB3926)
const uint8_t single_key[][ 2 ] = {
{ PS2_KC_NUM, PS2_KEY_NUM },
{ PS2_KC_SCROLL, PS2_KEY_SCROLL },
{ PS2_KC_CAPS, PS2_KEY_CAPS },
{ PS2_KC_L_SHIFT, PS2_KEY_L_SHIFT },
{ PS2_KC_R_SHIFT, PS2_KEY_R_SHIFT },
{ PS2_KC_CTRL, PS2_KEY_L_CTRL },
{ PS2_KC_ALT, PS2_KEY_L_ALT },
{ PS2_KC_SYSRQ, PS2_KEY_SYSRQ },
{ PS2_KC_ESC, PS2_KEY_ESC },
{ PS2_KC_BS, PS2_KEY_BS },
{ PS2_KC_TAB, PS2_KEY_TAB },
{ PS2_KC_ENTER, PS2_KEY_ENTER },
{ PS2_KC_SPACE, PS2_KEY_SPACE },
{ PS2_KC_KP0, PS2_KEY_KP0 },
{ PS2_KC_KP1, PS2_KEY_KP1 },
{ PS2_KC_KP2, PS2_KEY_KP2 },
{ PS2_KC_KP3, PS2_KEY_KP3 },
{ PS2_KC_KP4, PS2_KEY_KP4 },
{ PS2_KC_KP5, PS2_KEY_KP5 },
{ PS2_KC_KP6, PS2_KEY_KP6 },
{ PS2_KC_KP7, PS2_KEY_KP7 },
{ PS2_KC_KP8, PS2_KEY_KP8 },
{ PS2_KC_KP9, PS2_KEY_KP9 },
{ PS2_KC_KP_DOT, PS2_KEY_KP_DOT },
{ PS2_KC_KP_PLUS, PS2_KEY_KP_PLUS },
{ PS2_KC_KP_MINUS, PS2_KEY_KP_MINUS },
{ PS2_KC_KP_TIMES, PS2_KEY_KP_TIMES },
{ PS2_KC_KP_EQUAL, PS2_KEY_KP_EQUAL },
{ PS2_KC_0, PS2_KEY_0 },
{ PS2_KC_1, PS2_KEY_1 },
{ PS2_KC_2, PS2_KEY_2 },
{ PS2_KC_3, PS2_KEY_3 },
{ PS2_KC_4, PS2_KEY_4 },
{ PS2_KC_5, PS2_KEY_5 },
{ PS2_KC_6, PS2_KEY_6 },
{ PS2_KC_7, PS2_KEY_7 },
{ PS2_KC_8, PS2_KEY_8 },
{ PS2_KC_9, PS2_KEY_9 },
{ PS2_KC_APOS, PS2_KEY_APOS },
{ PS2_KC_COMMA, PS2_KEY_COMMA },
{ PS2_KC_MINUS, PS2_KEY_MINUS },
{ PS2_KC_DOT, PS2_KEY_DOT },
{ PS2_KC_DIV, PS2_KEY_DIV },
{ PS2_KC_BTICK, PS2_KEY_BTICK },
{ PS2_KC_A, PS2_KEY_A },
{ PS2_KC_B, PS2_KEY_B },
{ PS2_KC_C, PS2_KEY_C },
{ PS2_KC_D, PS2_KEY_D },
{ PS2_KC_E, PS2_KEY_E },
{ PS2_KC_F, PS2_KEY_F },
{ PS2_KC_G, PS2_KEY_G },
{ PS2_KC_H, PS2_KEY_H },
{ PS2_KC_I, PS2_KEY_I },
{ PS2_KC_J, PS2_KEY_J },
{ PS2_KC_K, PS2_KEY_K },
{ PS2_KC_L, PS2_KEY_L },
{ PS2_KC_M, PS2_KEY_M },
{ PS2_KC_N, PS2_KEY_N },
{ PS2_KC_O, PS2_KEY_O },
{ PS2_KC_P, PS2_KEY_P },
{ PS2_KC_Q, PS2_KEY_Q },
{ PS2_KC_R, PS2_KEY_R },
{ PS2_KC_S, PS2_KEY_S },
{ PS2_KC_T, PS2_KEY_T },
{ PS2_KC_U, PS2_KEY_U },
{ PS2_KC_V, PS2_KEY_V },
{ PS2_KC_W, PS2_KEY_W },
{ PS2_KC_X, PS2_KEY_X },
{ PS2_KC_Y, PS2_KEY_Y },
{ PS2_KC_Z, PS2_KEY_Z },
{ PS2_KC_SEMI, PS2_KEY_SEMI },
{ PS2_KC_BACK, PS2_KEY_HASH },
{ PS2_KC_OPEN_SQ, PS2_KEY_OPEN_SQ },
{ PS2_KC_CLOSE_SQ, PS2_KEY_CLOSE_SQ },
{ PS2_KC_EQUAL, PS2_KEY_EQUAL },
{ PS2_KC_EUROPE2, PS2_KEY_BACK },
{ PS2_KC_F1, PS2_KEY_F1 },
{ PS2_KC_F2, PS2_KEY_F2 },
{ PS2_KC_F3, PS2_KEY_F3 },
{ PS2_KC_F4, PS2_KEY_F4 },
{ PS2_KC_F5, PS2_KEY_F5 },
{ PS2_KC_F6, PS2_KEY_F6 },
{ PS2_KC_F7, PS2_KEY_F7 },
{ PS2_KC_F8, PS2_KEY_F8 },
{ PS2_KC_F9, PS2_KEY_F9 },
{ PS2_KC_F10, PS2_KEY_F10 },
{ PS2_KC_F11, PS2_KEY_F11 },
{ PS2_KC_F12, PS2_KEY_F12 },
{ PS2_KC_KP_COMMA, PS2_KEY_KP_COMMA },
{ PS2_KC_INTL1, PS2_KEY_INTL1 },
{ PS2_KC_INTL2, PS2_KEY_INTL2 },
{ PS2_KC_INTL3, PS2_KEY_INTL3 },
{ PS2_KC_INTL4, PS2_KEY_INTL4 },
{ PS2_KC_INTL5, PS2_KEY_INTL5 },
{ PS2_KC_LANG1, PS2_KEY_LANG1 },
{ PS2_KC_LANG2, PS2_KEY_LANG2 },
{ PS2_KC_LANG3, PS2_KEY_LANG3 },
{ PS2_KC_LANG4, PS2_KEY_LANG4 },
{ PS2_KC_LANG5, PS2_KEY_LANG5 }
};
/* Two byte Key table after an E0 byte received */
const uint8_t extended_key[][ 2 ] = {
{ PS2_KC_IGNORE, PS2_KEY_IGNORE },
{ PS2_KC_PRTSCR, PS2_KEY_PRTSCR },
{ PS2_KC_CTRL, PS2_KEY_R_CTRL },
{ PS2_KC_ALT, PS2_KEY_R_ALT },
{ PS2_KC_L_GUI, PS2_KEY_L_GUI },
{ PS2_KC_R_GUI, PS2_KEY_R_GUI },
{ PS2_KC_MENU, PS2_KEY_MENU },
{ PS2_KC_BREAK, PS2_KEY_BREAK },
{ PS2_KC_HOME, PS2_KEY_HOME },
{ PS2_KC_END, PS2_KEY_END },
{ PS2_KC_PGUP, PS2_KEY_PGUP },
{ PS2_KC_PGDN, PS2_KEY_PGDN },
{ PS2_KC_L_ARROW, PS2_KEY_L_ARROW },
{ PS2_KC_R_ARROW, PS2_KEY_R_ARROW },
{ PS2_KC_UP_ARROW, PS2_KEY_UP_ARROW },
{ PS2_KC_DN_ARROW, PS2_KEY_DN_ARROW },
{ PS2_KC_INSERT, PS2_KEY_INSERT },
{ PS2_KC_DELETE, PS2_KEY_DELETE },
{ PS2_KC_KP_ENTER, PS2_KEY_KP_ENTER },
{ PS2_KC_KP_DIV, PS2_KEY_KP_DIV },
{ PS2_KC_NEXT_TR, PS2_KEY_NEXT_TR },
{ PS2_KC_PREV_TR, PS2_KEY_PREV_TR },
{ PS2_KC_STOP, PS2_KEY_STOP },
{ PS2_KC_PLAY, PS2_KEY_PLAY },
{ PS2_KC_MUTE, PS2_KEY_MUTE },
{ PS2_KC_VOL_UP, PS2_KEY_VOL_UP },
{ PS2_KC_VOL_DN, PS2_KEY_VOL_DN },
{ PS2_KC_MEDIA, PS2_KEY_MEDIA },
{ PS2_KC_EMAIL, PS2_KEY_EMAIL },
{ PS2_KC_CALC, PS2_KEY_CALC },
{ PS2_KC_COMPUTER, PS2_KEY_COMPUTER },
{ PS2_KC_WEB_SEARCH, PS2_KEY_WEB_SEARCH },
{ PS2_KC_WEB_HOME, PS2_KEY_WEB_HOME },
{ PS2_KC_WEB_BACK, PS2_KEY_WEB_BACK },
{ PS2_KC_WEB_FORWARD, PS2_KEY_WEB_FORWARD },
{ PS2_KC_WEB_STOP, PS2_KEY_WEB_STOP },
{ PS2_KC_WEB_REFRESH, PS2_KEY_WEB_REFRESH },
{ PS2_KC_WEB_FAVOR, PS2_KEY_WEB_FAVOR },
{ PS2_KC_POWER, PS2_KEY_POWER },
{ PS2_KC_SLEEP, PS2_KEY_SLEEP },
{ PS2_KC_WAKE, PS2_KEY_WAKE }
};
/* Scroll lock numeric keypad re-mappings for NOT NUMLOCK */
/* in translated code order order is important */
const uint8_t scroll_remap[] = {
PS2_KEY_INSERT, // PS2_KEY_KP0
PS2_KEY_END, // PS2_KEY_KP1
PS2_KEY_DN_ARROW, // PS2_KEY_KP2
PS2_KEY_PGDN, // PS2_KEY_KP3
PS2_KEY_L_ARROW, // PS2_KEY_KP4
PS2_KEY_IGNORE, // PS2_KEY_KP5
PS2_KEY_R_ARROW, // PS2_KEY_KP6
PS2_KEY_HOME, // PS2_KEY_KP7
PS2_KEY_UP_ARROW, // PS2_KEY_KP8
PS2_KEY_PGUP, // PS2_KEY_KP9
PS2_KEY_DELETE // PS2_KEY_KP_DOT
};
#endif
#if defined(CONFIG_KEYMAP_STANDARD)
const uint8_t single_key[][ 2 ] = {
{ PS2_KC_NUM, PS2_KEY_NUM },
{ PS2_KC_SCROLL, PS2_KEY_SCROLL },
{ PS2_KC_CAPS, PS2_KEY_CAPS },
{ PS2_KC_L_SHIFT, PS2_KEY_L_SHIFT },
{ PS2_KC_R_SHIFT, PS2_KEY_R_SHIFT },
{ PS2_KC_CTRL, PS2_KEY_L_CTRL },
{ PS2_KC_ALT, PS2_KEY_L_ALT },
{ PS2_KC_SYSRQ, PS2_KEY_SYSRQ },
{ PS2_KC_ESC, PS2_KEY_ESC },
{ PS2_KC_BS, PS2_KEY_BS },
{ PS2_KC_TAB, PS2_KEY_TAB },
{ PS2_KC_ENTER, PS2_KEY_ENTER },
{ PS2_KC_SPACE, PS2_KEY_SPACE },
{ PS2_KC_KP0, PS2_KEY_KP0 },
{ PS2_KC_KP1, PS2_KEY_KP1 },
{ PS2_KC_KP2, PS2_KEY_KP2 },
{ PS2_KC_KP3, PS2_KEY_KP3 },
{ PS2_KC_KP4, PS2_KEY_KP4 },
{ PS2_KC_KP5, PS2_KEY_KP5 },
{ PS2_KC_KP6, PS2_KEY_KP6 },
{ PS2_KC_KP7, PS2_KEY_KP7 },
{ PS2_KC_KP8, PS2_KEY_KP8 },
{ PS2_KC_KP9, PS2_KEY_KP9 },
{ PS2_KC_KP_DOT, PS2_KEY_KP_DOT },
{ PS2_KC_KP_PLUS, PS2_KEY_KP_PLUS },
{ PS2_KC_KP_MINUS, PS2_KEY_KP_MINUS },
{ PS2_KC_KP_TIMES, PS2_KEY_KP_TIMES },
{ PS2_KC_KP_EQUAL, PS2_KEY_KP_EQUAL },
{ PS2_KC_0, PS2_KEY_0 },
{ PS2_KC_1, PS2_KEY_1 },
{ PS2_KC_2, PS2_KEY_2 },
{ PS2_KC_3, PS2_KEY_3 },
{ PS2_KC_4, PS2_KEY_4 },
{ PS2_KC_5, PS2_KEY_5 },
{ PS2_KC_6, PS2_KEY_6 },
{ PS2_KC_7, PS2_KEY_7 },
{ PS2_KC_8, PS2_KEY_8 },
{ PS2_KC_9, PS2_KEY_9 },
{ PS2_KC_APOS, PS2_KEY_APOS },
{ PS2_KC_COMMA, PS2_KEY_COMMA },
{ PS2_KC_MINUS, PS2_KEY_MINUS },
{ PS2_KC_DOT, PS2_KEY_DOT },
{ PS2_KC_DIV, PS2_KEY_DIV },
{ PS2_KC_BTICK, PS2_KEY_BTICK },
{ PS2_KC_A, PS2_KEY_A },
{ PS2_KC_B, PS2_KEY_B },
{ PS2_KC_C, PS2_KEY_C },
{ PS2_KC_D, PS2_KEY_D },
{ PS2_KC_E, PS2_KEY_E },
{ PS2_KC_F, PS2_KEY_F },
{ PS2_KC_G, PS2_KEY_G },
{ PS2_KC_H, PS2_KEY_H },
{ PS2_KC_I, PS2_KEY_I },
{ PS2_KC_J, PS2_KEY_J },
{ PS2_KC_K, PS2_KEY_K },
{ PS2_KC_L, PS2_KEY_L },
{ PS2_KC_M, PS2_KEY_M },
{ PS2_KC_N, PS2_KEY_N },
{ PS2_KC_O, PS2_KEY_O },
{ PS2_KC_P, PS2_KEY_P },
{ PS2_KC_Q, PS2_KEY_Q },
{ PS2_KC_R, PS2_KEY_R },
{ PS2_KC_S, PS2_KEY_S },
{ PS2_KC_T, PS2_KEY_T },
{ PS2_KC_U, PS2_KEY_U },
{ PS2_KC_V, PS2_KEY_V },
{ PS2_KC_W, PS2_KEY_W },
{ PS2_KC_X, PS2_KEY_X },
{ PS2_KC_Y, PS2_KEY_Y },
{ PS2_KC_Z, PS2_KEY_Z },
{ PS2_KC_SEMI, PS2_KEY_SEMI },
{ PS2_KC_BACK, PS2_KEY_BACK },
{ PS2_KC_OPEN_SQ, PS2_KEY_OPEN_SQ },
{ PS2_KC_CLOSE_SQ, PS2_KEY_CLOSE_SQ },
{ PS2_KC_EQUAL, PS2_KEY_EQUAL },
{ PS2_KC_EUROPE2, PS2_KEY_BACK },
{ PS2_KC_F1, PS2_KEY_F1 },
{ PS2_KC_F2, PS2_KEY_F2 },
{ PS2_KC_F3, PS2_KEY_F3 },
{ PS2_KC_F4, PS2_KEY_F4 },
{ PS2_KC_F5, PS2_KEY_F5 },
{ PS2_KC_F6, PS2_KEY_F6 },
{ PS2_KC_F7, PS2_KEY_F7 },
{ PS2_KC_F8, PS2_KEY_F8 },
{ PS2_KC_F9, PS2_KEY_F9 },
{ PS2_KC_F10, PS2_KEY_F10 },
{ PS2_KC_F11, PS2_KEY_F11 },
{ PS2_KC_F12, PS2_KEY_F12 },
{ PS2_KC_KP_COMMA, PS2_KEY_KP_COMMA },
{ PS2_KC_INTL1, PS2_KEY_INTL1 },
{ PS2_KC_INTL2, PS2_KEY_INTL2 },
{ PS2_KC_INTL3, PS2_KEY_INTL3 },
{ PS2_KC_INTL4, PS2_KEY_INTL4 },
{ PS2_KC_INTL5, PS2_KEY_INTL5 },
{ PS2_KC_LANG1, PS2_KEY_LANG1 },
{ PS2_KC_LANG2, PS2_KEY_LANG2 },
{ PS2_KC_LANG3, PS2_KEY_LANG3 },
{ PS2_KC_LANG4, PS2_KEY_LANG4 },
{ PS2_KC_LANG5, PS2_KEY_LANG5 }
};
/* Two byte Key table after an E0 byte received */
const uint8_t extended_key[][ 2 ] = {
{ PS2_KC_IGNORE, PS2_KEY_IGNORE },
{ PS2_KC_PRTSCR, PS2_KEY_PRTSCR },
{ PS2_KC_CTRL, PS2_KEY_R_CTRL },
{ PS2_KC_ALT, PS2_KEY_R_ALT },
{ PS2_KC_L_GUI, PS2_KEY_L_GUI },
{ PS2_KC_R_GUI, PS2_KEY_R_GUI },
{ PS2_KC_MENU, PS2_KEY_MENU },
{ PS2_KC_BREAK, PS2_KEY_BREAK },
{ PS2_KC_HOME, PS2_KEY_HOME },
{ PS2_KC_END, PS2_KEY_END },
{ PS2_KC_PGUP, PS2_KEY_PGUP },
{ PS2_KC_PGDN, PS2_KEY_PGDN },
{ PS2_KC_L_ARROW, PS2_KEY_L_ARROW },
{ PS2_KC_R_ARROW, PS2_KEY_R_ARROW },
{ PS2_KC_UP_ARROW, PS2_KEY_UP_ARROW },
{ PS2_KC_DN_ARROW, PS2_KEY_DN_ARROW },
{ PS2_KC_INSERT, PS2_KEY_INSERT },
{ PS2_KC_DELETE, PS2_KEY_DELETE },
{ PS2_KC_KP_ENTER, PS2_KEY_KP_ENTER },
{ PS2_KC_KP_DIV, PS2_KEY_KP_DIV },
{ PS2_KC_NEXT_TR, PS2_KEY_NEXT_TR },
{ PS2_KC_PREV_TR, PS2_KEY_PREV_TR },
{ PS2_KC_STOP, PS2_KEY_STOP },
{ PS2_KC_PLAY, PS2_KEY_PLAY },
{ PS2_KC_MUTE, PS2_KEY_MUTE },
{ PS2_KC_VOL_UP, PS2_KEY_VOL_UP },
{ PS2_KC_VOL_DN, PS2_KEY_VOL_DN },
{ PS2_KC_MEDIA, PS2_KEY_MEDIA },
{ PS2_KC_EMAIL, PS2_KEY_EMAIL },
{ PS2_KC_CALC, PS2_KEY_CALC },
{ PS2_KC_COMPUTER, PS2_KEY_COMPUTER },
{ PS2_KC_WEB_SEARCH, PS2_KEY_WEB_SEARCH },
{ PS2_KC_WEB_HOME, PS2_KEY_WEB_HOME },
{ PS2_KC_WEB_BACK, PS2_KEY_WEB_BACK },
{ PS2_KC_WEB_FORWARD, PS2_KEY_WEB_FORWARD },
{ PS2_KC_WEB_STOP, PS2_KEY_WEB_STOP },
{ PS2_KC_WEB_REFRESH, PS2_KEY_WEB_REFRESH },
{ PS2_KC_WEB_FAVOR, PS2_KEY_WEB_FAVOR },
{ PS2_KC_POWER, PS2_KEY_POWER },
{ PS2_KC_SLEEP, PS2_KEY_SLEEP },
{ PS2_KC_WAKE, PS2_KEY_WAKE }
};
/* Scroll lock numeric keypad re-mappings for NOT NUMLOCK */
/* in translated code order order is important */
const uint8_t scroll_remap[] = {
PS2_KEY_INSERT, // PS2_KEY_KP0
PS2_KEY_END, // PS2_KEY_KP1
PS2_KEY_DN_ARROW, // PS2_KEY_KP2
PS2_KEY_PGDN, // PS2_KEY_KP3
PS2_KEY_L_ARROW, // PS2_KEY_KP4
PS2_KEY_IGNORE, // PS2_KEY_KP5
PS2_KEY_R_ARROW, // PS2_KEY_KP6
PS2_KEY_HOME, // PS2_KEY_KP7
PS2_KEY_UP_ARROW, // PS2_KEY_KP8
PS2_KEY_PGUP, // PS2_KEY_KP9
PS2_KEY_DELETE // PS2_KEY_KP_DOT
};
#endif
#endif

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#
# Main component makefile.
#
# This Makefile can be left empty. By default, it will take the sources in the
# src/ directory, compile them and link them into lib(subdirectory_name).a
# in the build directory. This behaviour is entirely configurable,
# please read the ESP-IDF documents if you need to do this.
#

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/*
* font8x8_basic.h
*
* Created on: 2017/05/03
* Author: yanbe
*/
#ifndef MAIN_FONT8X8_BASIC_H_
#define MAIN_FONT8X8_BASIC_H_
/*
Constant: font8x8_basic_tr
Contains an 90 digree transposed 8x8 font map for unicode points
U+0000 - U+007F (basic latin)
To make it easy to use with SSD1306's GDDRAM mapping and API,
this constant is an 90 degree transposed.
The original version written by Marcel Sondaar is availble at:
https://github.com/dhepper/font8x8/blob/master/font8x8_basic.h
Conversion is done via following procedure:
for (int code = 0; code < 128; code++) {
uint8_t trans[8];
for (int w = 0; w < 8; w++) {
trans[w] = 0x00;
for (int b = 0; b < 8; b++) {
trans[w] |= ((font8x8_basic[code][b] & (1 << w)) >> w) << b;
}
}
for (int w = 0; w < 8; w++) {
if (w == 0) { printf(" { "); }
printf("0x%.2X", trans[w]);
if (w < 7) { printf(", "); }
if (w == 7) { printf(" }, // U+00%.2X (%c)\n", code, code); }
}
}
*/
static uint8_t font8x8_basic_tr[128][8] = {
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0000 (nul)
{ 0x00, 0x04, 0x02, 0xFF, 0x02, 0x04, 0x00, 0x00 }, // U+0001 (Up Allow)
{ 0x00, 0x20, 0x40, 0xFF, 0x40, 0x20, 0x00, 0x00 }, // U+0002 (Down Allow)
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0003
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0004
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0005
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0006
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0007
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0008
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0009
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000A
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000B
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000C
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000D
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000E
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+000F
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0010
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0011
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0012
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0013
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0014
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0015
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0016
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0017
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0018
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0019
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001A
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001B
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001C
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001D
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001E
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+001F
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0020 (space)
{ 0x00, 0x00, 0x06, 0x5F, 0x5F, 0x06, 0x00, 0x00 }, // U+0021 (!)
{ 0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x00 }, // U+0022 (")
{ 0x14, 0x7F, 0x7F, 0x14, 0x7F, 0x7F, 0x14, 0x00 }, // U+0023 (#)
{ 0x24, 0x2E, 0x6B, 0x6B, 0x3A, 0x12, 0x00, 0x00 }, // U+0024 ($)
{ 0x46, 0x66, 0x30, 0x18, 0x0C, 0x66, 0x62, 0x00 }, // U+0025 (%)
{ 0x30, 0x7A, 0x4F, 0x5D, 0x37, 0x7A, 0x48, 0x00 }, // U+0026 (&)
{ 0x04, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 }, // U+0027 (')
{ 0x00, 0x1C, 0x3E, 0x63, 0x41, 0x00, 0x00, 0x00 }, // U+0028 (()
{ 0x00, 0x41, 0x63, 0x3E, 0x1C, 0x00, 0x00, 0x00 }, // U+0029 ())
{ 0x08, 0x2A, 0x3E, 0x1C, 0x1C, 0x3E, 0x2A, 0x08 }, // U+002A (*)
{ 0x08, 0x08, 0x3E, 0x3E, 0x08, 0x08, 0x00, 0x00 }, // U+002B (+)
{ 0x00, 0x80, 0xE0, 0x60, 0x00, 0x00, 0x00, 0x00 }, // U+002C (,)
{ 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00 }, // U+002D (-)
{ 0x00, 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, 0x00 }, // U+002E (.)
{ 0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x00 }, // U+002F (/)
{ 0x3E, 0x7F, 0x71, 0x59, 0x4D, 0x7F, 0x3E, 0x00 }, // U+0030 (0)
{ 0x40, 0x42, 0x7F, 0x7F, 0x40, 0x40, 0x00, 0x00 }, // U+0031 (1)
{ 0x62, 0x73, 0x59, 0x49, 0x6F, 0x66, 0x00, 0x00 }, // U+0032 (2)
{ 0x22, 0x63, 0x49, 0x49, 0x7F, 0x36, 0x00, 0x00 }, // U+0033 (3)
{ 0x18, 0x1C, 0x16, 0x53, 0x7F, 0x7F, 0x50, 0x00 }, // U+0034 (4)
{ 0x27, 0x67, 0x45, 0x45, 0x7D, 0x39, 0x00, 0x00 }, // U+0035 (5)
{ 0x3C, 0x7E, 0x4B, 0x49, 0x79, 0x30, 0x00, 0x00 }, // U+0036 (6)
{ 0x03, 0x03, 0x71, 0x79, 0x0F, 0x07, 0x00, 0x00 }, // U+0037 (7)
{ 0x36, 0x7F, 0x49, 0x49, 0x7F, 0x36, 0x00, 0x00 }, // U+0038 (8)
{ 0x06, 0x4F, 0x49, 0x69, 0x3F, 0x1E, 0x00, 0x00 }, // U+0039 (9)
{ 0x00, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00 }, // U+003A (:)
{ 0x00, 0x80, 0xE6, 0x66, 0x00, 0x00, 0x00, 0x00 }, // U+003B (;)
{ 0x08, 0x1C, 0x36, 0x63, 0x41, 0x00, 0x00, 0x00 }, // U+003C (<)
{ 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x00, 0x00 }, // U+003D (=)
{ 0x00, 0x41, 0x63, 0x36, 0x1C, 0x08, 0x00, 0x00 }, // U+003E (>)
{ 0x02, 0x03, 0x51, 0x59, 0x0F, 0x06, 0x00, 0x00 }, // U+003F (?)
{ 0x3E, 0x7F, 0x41, 0x5D, 0x5D, 0x1F, 0x1E, 0x00 }, // U+0040 (@)
{ 0x7C, 0x7E, 0x13, 0x13, 0x7E, 0x7C, 0x00, 0x00 }, // U+0041 (A)
{ 0x41, 0x7F, 0x7F, 0x49, 0x49, 0x7F, 0x36, 0x00 }, // U+0042 (B)
{ 0x1C, 0x3E, 0x63, 0x41, 0x41, 0x63, 0x22, 0x00 }, // U+0043 (C)
{ 0x41, 0x7F, 0x7F, 0x41, 0x63, 0x3E, 0x1C, 0x00 }, // U+0044 (D)
{ 0x41, 0x7F, 0x7F, 0x49, 0x5D, 0x41, 0x63, 0x00 }, // U+0045 (E)
{ 0x41, 0x7F, 0x7F, 0x49, 0x1D, 0x01, 0x03, 0x00 }, // U+0046 (F)
{ 0x1C, 0x3E, 0x63, 0x41, 0x51, 0x73, 0x72, 0x00 }, // U+0047 (G)
{ 0x7F, 0x7F, 0x08, 0x08, 0x7F, 0x7F, 0x00, 0x00 }, // U+0048 (H)
{ 0x00, 0x41, 0x7F, 0x7F, 0x41, 0x00, 0x00, 0x00 }, // U+0049 (I)
{ 0x30, 0x70, 0x40, 0x41, 0x7F, 0x3F, 0x01, 0x00 }, // U+004A (J)
{ 0x41, 0x7F, 0x7F, 0x08, 0x1C, 0x77, 0x63, 0x00 }, // U+004B (K)
{ 0x41, 0x7F, 0x7F, 0x41, 0x40, 0x60, 0x70, 0x00 }, // U+004C (L)
{ 0x7F, 0x7F, 0x0E, 0x1C, 0x0E, 0x7F, 0x7F, 0x00 }, // U+004D (M)
{ 0x7F, 0x7F, 0x06, 0x0C, 0x18, 0x7F, 0x7F, 0x00 }, // U+004E (N)
{ 0x1C, 0x3E, 0x63, 0x41, 0x63, 0x3E, 0x1C, 0x00 }, // U+004F (O)
{ 0x41, 0x7F, 0x7F, 0x49, 0x09, 0x0F, 0x06, 0x00 }, // U+0050 (P)
{ 0x1E, 0x3F, 0x21, 0x71, 0x7F, 0x5E, 0x00, 0x00 }, // U+0051 (Q)
{ 0x41, 0x7F, 0x7F, 0x09, 0x19, 0x7F, 0x66, 0x00 }, // U+0052 (R)
{ 0x26, 0x6F, 0x4D, 0x59, 0x73, 0x32, 0x00, 0x00 }, // U+0053 (S)
{ 0x03, 0x41, 0x7F, 0x7F, 0x41, 0x03, 0x00, 0x00 }, // U+0054 (T)
{ 0x7F, 0x7F, 0x40, 0x40, 0x7F, 0x7F, 0x00, 0x00 }, // U+0055 (U)
{ 0x1F, 0x3F, 0x60, 0x60, 0x3F, 0x1F, 0x00, 0x00 }, // U+0056 (V)
{ 0x7F, 0x7F, 0x30, 0x18, 0x30, 0x7F, 0x7F, 0x00 }, // U+0057 (W)
{ 0x43, 0x67, 0x3C, 0x18, 0x3C, 0x67, 0x43, 0x00 }, // U+0058 (X)
{ 0x07, 0x4F, 0x78, 0x78, 0x4F, 0x07, 0x00, 0x00 }, // U+0059 (Y)
{ 0x47, 0x63, 0x71, 0x59, 0x4D, 0x67, 0x73, 0x00 }, // U+005A (Z)
{ 0x00, 0x7F, 0x7F, 0x41, 0x41, 0x00, 0x00, 0x00 }, // U+005B ([)
{ 0x01, 0x03, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x00 }, // U+005C (\)
{ 0x00, 0x41, 0x41, 0x7F, 0x7F, 0x00, 0x00, 0x00 }, // U+005D (])
{ 0x08, 0x0C, 0x06, 0x03, 0x06, 0x0C, 0x08, 0x00 }, // U+005E (^)
{ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 }, // U+005F (_)
{ 0x00, 0x00, 0x03, 0x07, 0x04, 0x00, 0x00, 0x00 }, // U+0060 (`)
{ 0x20, 0x74, 0x54, 0x54, 0x3C, 0x78, 0x40, 0x00 }, // U+0061 (a)
{ 0x41, 0x7F, 0x3F, 0x48, 0x48, 0x78, 0x30, 0x00 }, // U+0062 (b)
{ 0x38, 0x7C, 0x44, 0x44, 0x6C, 0x28, 0x00, 0x00 }, // U+0063 (c)
{ 0x30, 0x78, 0x48, 0x49, 0x3F, 0x7F, 0x40, 0x00 }, // U+0064 (d)
{ 0x38, 0x7C, 0x54, 0x54, 0x5C, 0x18, 0x00, 0x00 }, // U+0065 (e)
{ 0x48, 0x7E, 0x7F, 0x49, 0x03, 0x02, 0x00, 0x00 }, // U+0066 (f)
{ 0x98, 0xBC, 0xA4, 0xA4, 0xF8, 0x7C, 0x04, 0x00 }, // U+0067 (g)
{ 0x41, 0x7F, 0x7F, 0x08, 0x04, 0x7C, 0x78, 0x00 }, // U+0068 (h)
{ 0x00, 0x44, 0x7D, 0x7D, 0x40, 0x00, 0x00, 0x00 }, // U+0069 (i)
{ 0x60, 0xE0, 0x80, 0x80, 0xFD, 0x7D, 0x00, 0x00 }, // U+006A (j)
{ 0x41, 0x7F, 0x7F, 0x10, 0x38, 0x6C, 0x44, 0x00 }, // U+006B (k)
{ 0x00, 0x41, 0x7F, 0x7F, 0x40, 0x00, 0x00, 0x00 }, // U+006C (l)
{ 0x7C, 0x7C, 0x18, 0x38, 0x1C, 0x7C, 0x78, 0x00 }, // U+006D (m)
{ 0x7C, 0x7C, 0x04, 0x04, 0x7C, 0x78, 0x00, 0x00 }, // U+006E (n)
{ 0x38, 0x7C, 0x44, 0x44, 0x7C, 0x38, 0x00, 0x00 }, // U+006F (o)
{ 0x84, 0xFC, 0xF8, 0xA4, 0x24, 0x3C, 0x18, 0x00 }, // U+0070 (p)
{ 0x18, 0x3C, 0x24, 0xA4, 0xF8, 0xFC, 0x84, 0x00 }, // U+0071 (q)
{ 0x44, 0x7C, 0x78, 0x4C, 0x04, 0x1C, 0x18, 0x00 }, // U+0072 (r)
{ 0x48, 0x5C, 0x54, 0x54, 0x74, 0x24, 0x00, 0x00 }, // U+0073 (s)
{ 0x00, 0x04, 0x3E, 0x7F, 0x44, 0x24, 0x00, 0x00 }, // U+0074 (t)
{ 0x3C, 0x7C, 0x40, 0x40, 0x3C, 0x7C, 0x40, 0x00 }, // U+0075 (u)
{ 0x1C, 0x3C, 0x60, 0x60, 0x3C, 0x1C, 0x00, 0x00 }, // U+0076 (v)
{ 0x3C, 0x7C, 0x70, 0x38, 0x70, 0x7C, 0x3C, 0x00 }, // U+0077 (w)
{ 0x44, 0x6C, 0x38, 0x10, 0x38, 0x6C, 0x44, 0x00 }, // U+0078 (x)
{ 0x9C, 0xBC, 0xA0, 0xA0, 0xFC, 0x7C, 0x00, 0x00 }, // U+0079 (y)
{ 0x4C, 0x64, 0x74, 0x5C, 0x4C, 0x64, 0x00, 0x00 }, // U+007A (z)
{ 0x08, 0x08, 0x3E, 0x77, 0x41, 0x41, 0x00, 0x00 }, // U+007B ({)
{ 0x00, 0x00, 0x00, 0x77, 0x77, 0x00, 0x00, 0x00 }, // U+007C (|)
{ 0x41, 0x41, 0x77, 0x3E, 0x08, 0x08, 0x00, 0x00 }, // U+007D (})
{ 0x02, 0x03, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00 }, // U+007E (~)
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } // U+007F
};
#endif /* MAIN_FONT8X8_BASIC_H_ */

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#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_log.h"
#include "ssd1306.h"
#include "font8x8_basic.h"
#define tag "SSD1306"
void ssd1306_init(SSD1306_t * dev, int width, int height)
{
if (dev->_address == SPIAddress) {
spi_init(dev, width, height);
} else {
i2c_init(dev, width, height);
}
}
void ssd1306_display_text(SSD1306_t * dev, int page, char * text, int text_len, bool invert)
{
if (page >= dev->_pages) return;
int _text_len = text_len;
if (_text_len > 16) _text_len = 16;
uint8_t seg = 0;
uint8_t image[8];
for (uint8_t i = 0; i < _text_len; i++) {
memcpy(image, font8x8_basic_tr[(uint8_t)text[i]], 8);
if (invert) ssd1306_invert(image, 8);
if (dev->_flip) ssd1306_flip(image, 8);
if (dev->_address == SPIAddress) {
spi_display_image(dev, page, seg, image, 8);
} else {
i2c_display_image(dev, page, seg, image, 8);
}
seg = seg + 8;
}
}
void ssd1306_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width)
{
if (dev->_address == SPIAddress) {
spi_display_image(dev, page, seg, images, width);
} else {
i2c_display_image(dev, page, seg, images, width);
}
}
void ssd1306_clear_screen(SSD1306_t * dev, bool invert)
{
char space[16];
memset(space, 0x20, sizeof(space));
for (int page = 0; page < dev->_pages; page++) {
ssd1306_display_text(dev, page, space, sizeof(space), invert);
}
}
void ssd1306_clear_line(SSD1306_t * dev, int page, bool invert)
{
char space[16];
memset(space, 0x20, sizeof(space));
ssd1306_display_text(dev, page, space, sizeof(space), invert);
}
void ssd1306_contrast(SSD1306_t * dev, int contrast)
{
if (dev->_address == SPIAddress) {
spi_contrast(dev, contrast);
} else {
i2c_contrast(dev, contrast);
}
}
void ssd1306_software_scroll(SSD1306_t * dev, int start, int end)
{
ESP_LOGD(tag, "software_scroll start=%d end=%d _pages=%d", start, end, dev->_pages);
if (start < 0 || end < 0) {
dev->_scEnable = false;
} else if (start >= dev->_pages || end >= dev->_pages) {
dev->_scEnable = false;
} else {
dev->_scEnable = true;
dev->_scStart = start;
dev->_scEnd = end;
dev->_scDirection = 1;
if (start > end ) dev->_scDirection = -1;
for (int i=0;i<dev->_pages;i++) {
dev->_page[i]._valid = false;
dev->_page[i]._segLen = 0;
}
}
}
void ssd1306_scroll_text(SSD1306_t * dev, char * text, int text_len, bool invert)
{
ESP_LOGD(tag, "dev->_scEnable=%d", dev->_scEnable);
if (dev->_scEnable == false) return;
void (*func)(SSD1306_t * dev, int page, int seg, uint8_t * images, int width);
if (dev->_address == SPIAddress) {
func = spi_display_image;
} else {
func = i2c_display_image;
}
int srcIndex = dev->_scEnd - dev->_scDirection;
while(1) {
int dstIndex = srcIndex + dev->_scDirection;
ESP_LOGD(tag, "srcIndex=%d dstIndex=%d", srcIndex,dstIndex);
dev->_page[dstIndex]._valid = dev->_page[srcIndex]._valid;
dev->_page[dstIndex]._segLen = dev->_page[srcIndex]._segLen;
for(int seg = 0; seg < dev->_width; seg++) {
dev->_page[dstIndex]._segs[seg] = dev->_page[srcIndex]._segs[seg];
}
ESP_LOGD(tag, "_valid=%d", dev->_page[dstIndex]._valid);
if (dev->_page[dstIndex]._valid) (*func)(dev, dstIndex, 0, dev->_page[dstIndex]._segs, dev->_page[srcIndex]._segLen);
if (srcIndex == dev->_scStart) break;
srcIndex = srcIndex - dev->_scDirection;
}
int _text_len = text_len;
if (_text_len > 16) _text_len = 16;
uint8_t seg = 0;
uint8_t image[8];
for (uint8_t i = 0; i < _text_len; i++) {
memcpy(image, font8x8_basic_tr[(uint8_t)text[i]], 8);
if (invert) ssd1306_invert(image, 8);
if (dev->_flip) ssd1306_flip(image, 8);
(*func)(dev, srcIndex, seg, image, 8);
for(int j=0;j<8;j++) dev->_page[srcIndex]._segs[seg+j] = image[j];
seg = seg + 8;
}
dev->_page[srcIndex]._valid = true;
dev->_page[srcIndex]._segLen = seg;
}
void ssd1306_scroll_clear(SSD1306_t * dev)
{
ESP_LOGD(tag, "dev->_scEnable=%d", dev->_scEnable);
if (dev->_scEnable == false) return;
int srcIndex = dev->_scEnd - dev->_scDirection;
while(1) {
int dstIndex = srcIndex + dev->_scDirection;
ESP_LOGD(tag, "srcIndex=%d dstIndex=%d", srcIndex,dstIndex);
ssd1306_clear_line(dev, dstIndex, false);
dev->_page[dstIndex]._valid = false;
if (dstIndex == dev->_scStart) break;
srcIndex = srcIndex - dev->_scDirection;
}
}
void ssd1306_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll)
{
if (dev->_address == SPIAddress) {
spi_hardware_scroll(dev, scroll);
} else {
i2c_hardware_scroll(dev, scroll);
}
}
void ssd1306_invert(uint8_t *buf, size_t blen)
{
uint8_t wk;
for(int i=0; i<blen; i++){
wk = buf[i];
buf[i] = ~wk;
}
}
// Flip upside down
void ssd1306_flip(uint8_t *buf, size_t blen)
{
for(int i=0; i<blen; i++){
buf[i] = ssd1306_rotate(buf[i]);
}
}
// Rotate 8-bit data
// 0x12-->0x48
uint8_t ssd1306_rotate(uint8_t ch1) {
uint8_t ch2 = 0;
for (int j=0;j<8;j++) {
ch2 = (ch2 << 1) + (ch1 & 0x01);
ch1 = ch1 >> 1;
}
return ch2;
}
void ssd1306_fadeout(SSD1306_t * dev)
{
void (*func)(SSD1306_t * dev, int page, int seg, uint8_t * images, int width);
if (dev->_address == SPIAddress) {
func = spi_display_image;
} else {
func = i2c_display_image;
}
uint8_t image[1];
for(int page=0; page<dev->_pages; page++) {
image[0] = 0xFF;
for(int line=0; line<8; line++) {
if (dev->_flip) {
image[0] = image[0] >> 1;
} else {
image[0] = image[0] << 1;
}
for(int seg=0; seg<128; seg++) {
(*func)(dev, page, seg, image, 1);
}
}
}
}
void ssd1306_dump(SSD1306_t dev)
{
printf("_address=%x\n",dev._address);
printf("_width=%x\n",dev._width);
printf("_height=%x\n",dev._height);
printf("_pages=%x\n",dev._pages);
}

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#ifdef __cplusplus
extern "C" {
#endif
#ifndef MAIN_SSD1306_H_
#define MAIN_SSD1306_H_
#include "driver/spi_master.h"
// Following definitions are bollowed from
// http://robotcantalk.blogspot.com/2015/03/interfacing-arduino-with-ssd1306-driven.html
/* Control byte for i2c
Co : bit 8 : Continuation Bit
* 1 = no-continuation (only one byte to follow)
* 0 = the controller should expect a stream of bytes.
D/C# : bit 7 : Data/Command Select bit
* 1 = the next byte or byte stream will be Data.
* 0 = a Command byte or byte stream will be coming up next.
Bits 6-0 will be all zeros.
Usage:
0x80 : Single Command byte
0x00 : Command Stream
0xC0 : Single Data byte
0x40 : Data Stream
*/
#define OLED_CONTROL_BYTE_CMD_SINGLE 0x80
#define OLED_CONTROL_BYTE_CMD_STREAM 0x00
#define OLED_CONTROL_BYTE_DATA_SINGLE 0xC0
#define OLED_CONTROL_BYTE_DATA_STREAM 0x40
// Fundamental commands (pg.28)
#define OLED_CMD_SET_CONTRAST 0x81 // follow with 0x7F
#define OLED_CMD_DISPLAY_RAM 0xA4
#define OLED_CMD_DISPLAY_ALLON 0xA5
#define OLED_CMD_DISPLAY_NORMAL 0xA6
#define OLED_CMD_DISPLAY_INVERTED 0xA7
#define OLED_CMD_DISPLAY_OFF 0xAE
#define OLED_CMD_DISPLAY_ON 0xAF
// Addressing Command Table (pg.30)
#define OLED_CMD_SET_MEMORY_ADDR_MODE 0x20
#define OLED_CMD_SET_HORI_ADDR_MODE 0x00 // Horizontal Addressing Mode
#define OLED_CMD_SET_VERT_ADDR_MODE 0x01 // Vertical Addressing Mode
#define OLED_CMD_SET_PAGE_ADDR_MODE 0x02 // Page Addressing Mode
#define OLED_CMD_SET_COLUMN_RANGE 0x21 // can be used only in HORZ/VERT mode - follow with 0x00 and 0x7F = COL127
#define OLED_CMD_SET_PAGE_RANGE 0x22 // can be used only in HORZ/VERT mode - follow with 0x00 and 0x07 = PAGE7
// Hardware Config (pg.31)
#define OLED_CMD_SET_DISPLAY_START_LINE 0x40
#define OLED_CMD_SET_SEGMENT_REMAP_0 0xA0
#define OLED_CMD_SET_SEGMENT_REMAP_1 0xA1
#define OLED_CMD_SET_MUX_RATIO 0xA8 // follow with 0x3F = 64 MUX
#define OLED_CMD_SET_COM_SCAN_MODE 0xC8
#define OLED_CMD_SET_DISPLAY_OFFSET 0xD3 // follow with 0x00
#define OLED_CMD_SET_COM_PIN_MAP 0xDA // follow with 0x12
#define OLED_CMD_NOP 0xE3 // NOP
// Timing and Driving Scheme (pg.32)
#define OLED_CMD_SET_DISPLAY_CLK_DIV 0xD5 // follow with 0x80
#define OLED_CMD_SET_PRECHARGE 0xD9 // follow with 0xF1
#define OLED_CMD_SET_VCOMH_DESELCT 0xDB // follow with 0x30
// Charge Pump (pg.62)
#define OLED_CMD_SET_CHARGE_PUMP 0x8D // follow with 0x14
// Scrolling Command
#define OLED_CMD_HORIZONTAL_RIGHT 0x26
#define OLED_CMD_HORIZONTAL_LEFT 0x27
#define OLED_CMD_CONTINUOUS_SCROLL 0x29
#define OLED_CMD_DEACTIVE_SCROLL 0x2E
#define OLED_CMD_ACTIVE_SCROLL 0x2F
#define OLED_CMD_VERTICAL 0xA3
#define I2CAddress 0x3C
#define SPIAddress 0xFF
typedef enum {
SCROLL_RIGHT = 1,
SCROLL_LEFT = 2,
SCROLL_DOWN = 3,
SCROLL_UP = 4,
SCROLL_STOP = 5
} ssd1306_scroll_type_t;
typedef struct {
bool _valid;
int _segLen; // 0-128
uint8_t _segs[128];
} PAGE_t;
typedef struct {
int _address;
int _width;
int _height;
int _pages;
int _dc;
spi_device_handle_t _SPIHandle;
bool _scEnable;
int _scStart;
int _scEnd;
int _scDirection;
PAGE_t _page[8];
bool _flip;
} SSD1306_t;
void ssd1306_init(SSD1306_t * dev, int width, int height);
void ssd1306_display_text(SSD1306_t * dev, int page, char * text, int text_len, bool invert);
void ssd1306_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width);
void ssd1306_clear_screen(SSD1306_t * dev, bool invert);
void ssd1306_clear_line(SSD1306_t * dev, int page, bool invert);
void ssd1306_contrast(SSD1306_t * dev, int contrast);
void ssd1306_software_scroll(SSD1306_t * dev, int start, int end);
void ssd1306_scroll_text(SSD1306_t * dev, char * text, int text_len, bool invert);
void ssd1306_scroll_clear(SSD1306_t * dev);
void ssd1306_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll);
void ssd1306_invert(uint8_t *buf, size_t blen);
void ssd1306_flip(uint8_t *buf, size_t blen);
uint8_t ssd1306_rotate(uint8_t ch1);
void ssd1306_fadeout(SSD1306_t * dev);
void ssd1306_dump(SSD1306_t dev);
void i2c_master_init(SSD1306_t * dev, int16_t sda, int16_t scl, int16_t reset);
void i2c_init(SSD1306_t * dev, int width, int height);
void i2c_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width);
void i2c_contrast(SSD1306_t * dev, int contrast);
void i2c_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll);
void spi_master_init(SSD1306_t * dev, int16_t GPIO_MOSI, int16_t GPIO_SCLK, int16_t GPIO_CS, int16_t GPIO_DC, int16_t GPIO_RESET);
bool spi_master_write_byte(spi_device_handle_t SPIHandle, const uint8_t* Data, size_t DataLength );
bool spi_master_write_command(SSD1306_t * dev, uint8_t Command );
bool spi_master_write_data(SSD1306_t * dev, const uint8_t* Data, size_t DataLength );
void spi_init(SSD1306_t * dev, int width, int height);
void spi_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width);
void spi_contrast(SSD1306_t * dev, int contrast);
void spi_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll);
#endif /* MAIN_SSD1306_H_ */
#ifdef __cplusplus
}
#endif

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#ifdef __cplusplus
extern "C" {
#endif
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "driver/i2c.h"
#include "esp_log.h"
#include "ssd1306.h"
#define tag "SSD1306"
#define I2C_NUM I2C_NUM_0
//#define I2C_NUM I2C_NUM_1
#define I2C_MASTER_FREQ_HZ 400000 /*!< I2C master clock frequency. no higher than 1MHz for now */
void i2c_master_init(SSD1306_t * dev, int16_t sda, int16_t scl, int16_t reset)
{
i2c_config_t i2c_config = {
.mode = I2C_MODE_MASTER,
.sda_io_num = sda,
.scl_io_num = scl,
.sda_pullup_en = GPIO_PULLUP_ENABLE,
.scl_pullup_en = GPIO_PULLUP_ENABLE,
.master.clk_speed = I2C_MASTER_FREQ_HZ
};
ESP_ERROR_CHECK(i2c_param_config(I2C_NUM, &i2c_config));
ESP_ERROR_CHECK(i2c_driver_install(I2C_NUM, I2C_MODE_MASTER, 0, 0, 0));
if (reset >= 0) {
//gpio_pad_select_gpio(reset);
gpio_reset_pin(reset);
gpio_set_direction(reset, GPIO_MODE_OUTPUT);
gpio_set_level(reset, 0);
vTaskDelay(50 / portTICK_PERIOD_MS);
gpio_set_level(reset, 1);
}
dev->_address = I2CAddress;
dev->_flip = false;
}
void i2c_init(SSD1306_t * dev, int width, int height) {
dev->_width = width;
dev->_height = height;
dev->_pages = 8;
if (dev->_height == 32) dev->_pages = 4;
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, (dev->_address << 1) | I2C_MASTER_WRITE, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_CMD_STREAM, true);
i2c_master_write_byte(cmd, OLED_CMD_DISPLAY_OFF, true); // AE
i2c_master_write_byte(cmd, OLED_CMD_SET_MUX_RATIO, true); // A8
if (dev->_height == 64) i2c_master_write_byte(cmd, 0x3F, true);
if (dev->_height == 32) i2c_master_write_byte(cmd, 0x1F, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_DISPLAY_OFFSET, true); // D3
i2c_master_write_byte(cmd, 0x00, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_DATA_STREAM, true); // 40
//i2c_master_write_byte(cmd, OLED_CMD_SET_SEGMENT_REMAP, true); // A1
if (dev->_flip) {
i2c_master_write_byte(cmd, OLED_CMD_SET_SEGMENT_REMAP_0, true); // A0
} else {
i2c_master_write_byte(cmd, OLED_CMD_SET_SEGMENT_REMAP_1, true); // A1
}
i2c_master_write_byte(cmd, OLED_CMD_SET_COM_SCAN_MODE, true); // C8
i2c_master_write_byte(cmd, OLED_CMD_SET_DISPLAY_CLK_DIV, true); // D5
i2c_master_write_byte(cmd, 0x80, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_COM_PIN_MAP, true); // DA
if (dev->_height == 64) i2c_master_write_byte(cmd, 0x12, true);
if (dev->_height == 32) i2c_master_write_byte(cmd, 0x02, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_CONTRAST, true); // 81
i2c_master_write_byte(cmd, 0xFF, true);
i2c_master_write_byte(cmd, OLED_CMD_DISPLAY_RAM, true); // A4
i2c_master_write_byte(cmd, OLED_CMD_SET_VCOMH_DESELCT, true); // DB
i2c_master_write_byte(cmd, 0x40, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_MEMORY_ADDR_MODE, true); // 20
//i2c_master_write_byte(cmd, OLED_CMD_SET_HORI_ADDR_MODE, true); // 00
i2c_master_write_byte(cmd, OLED_CMD_SET_PAGE_ADDR_MODE, true); // 02
// Set Lower Column Start Address for Page Addressing Mode
i2c_master_write_byte(cmd, 0x00, true);
// Set Higher Column Start Address for Page Addressing Mode
i2c_master_write_byte(cmd, 0x10, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_CHARGE_PUMP, true); // 8D
i2c_master_write_byte(cmd, 0x14, true);
i2c_master_write_byte(cmd, OLED_CMD_DEACTIVE_SCROLL, true); // 2E
i2c_master_write_byte(cmd, OLED_CMD_DISPLAY_NORMAL, true); // A6
i2c_master_write_byte(cmd, OLED_CMD_DISPLAY_ON, true); // AF
i2c_master_stop(cmd);
esp_err_t espRc = i2c_master_cmd_begin(I2C_NUM, cmd, 10/portTICK_PERIOD_MS);
if (espRc == ESP_OK) {
ESP_LOGI(tag, "OLED configured successfully");
} else {
ESP_LOGE(tag, "OLED configuration failed. code: 0x%.2X", espRc);
}
i2c_cmd_link_delete(cmd);
}
void i2c_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width) {
i2c_cmd_handle_t cmd;
if (page >= dev->_pages) return;
if (seg >= dev->_width) return;
int _seg = seg + CONFIG_OFFSETX;
uint8_t columLow = _seg & 0x0F;
uint8_t columHigh = (_seg >> 4) & 0x0F;
int _page = page;
if (dev->_flip) {
_page = (dev->_pages - page) - 1;
}
cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, (dev->_address << 1) | I2C_MASTER_WRITE, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_CMD_STREAM, true);
// Set Lower Column Start Address for Page Addressing Mode
i2c_master_write_byte(cmd, (0x00 + columLow), true);
// Set Higher Column Start Address for Page Addressing Mode
i2c_master_write_byte(cmd, (0x10 + columHigh), true);
// Set Page Start Address for Page Addressing Mode
i2c_master_write_byte(cmd, 0xB0 | _page, true);
i2c_master_stop(cmd);
i2c_master_cmd_begin(I2C_NUM, cmd, 10/portTICK_PERIOD_MS);
i2c_cmd_link_delete(cmd);
cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, (dev->_address << 1) | I2C_MASTER_WRITE, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_DATA_STREAM, true);
i2c_master_write(cmd, images, width, true);
i2c_master_stop(cmd);
i2c_master_cmd_begin(I2C_NUM, cmd, 10/portTICK_PERIOD_MS);
i2c_cmd_link_delete(cmd);
}
void i2c_contrast(SSD1306_t * dev, int contrast) {
i2c_cmd_handle_t cmd;
int _contrast = contrast;
if (contrast < 0x0) _contrast = 0;
if (contrast > 0xFF) _contrast = 0xFF;
cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, (dev->_address << 1) | I2C_MASTER_WRITE, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_CMD_STREAM, true);
i2c_master_write_byte(cmd, OLED_CMD_SET_CONTRAST, true); // 81
i2c_master_write_byte(cmd, _contrast, true);
i2c_master_stop(cmd);
i2c_master_cmd_begin(I2C_NUM, cmd, 10/portTICK_PERIOD_MS);
i2c_cmd_link_delete(cmd);
}
void i2c_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) {
esp_err_t espRc;
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, (dev->_address << 1) | I2C_MASTER_WRITE, true);
i2c_master_write_byte(cmd, OLED_CONTROL_BYTE_CMD_STREAM, true);
if (scroll == SCROLL_RIGHT) {
i2c_master_write_byte(cmd, OLED_CMD_HORIZONTAL_RIGHT, true); // 26
i2c_master_write_byte(cmd, 0x00, true); // Dummy byte
i2c_master_write_byte(cmd, 0x00, true); // Define start page address
i2c_master_write_byte(cmd, 0x07, true); // Frame frequency
i2c_master_write_byte(cmd, 0x07, true); // Define end page address
i2c_master_write_byte(cmd, 0x00, true); //
i2c_master_write_byte(cmd, 0xFF, true); //
i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F
}
if (scroll == SCROLL_LEFT) {
i2c_master_write_byte(cmd, OLED_CMD_HORIZONTAL_LEFT, true); // 27
i2c_master_write_byte(cmd, 0x00, true); // Dummy byte
i2c_master_write_byte(cmd, 0x00, true); // Define start page address
i2c_master_write_byte(cmd, 0x07, true); // Frame frequency
i2c_master_write_byte(cmd, 0x07, true); // Define end page address
i2c_master_write_byte(cmd, 0x00, true); //
i2c_master_write_byte(cmd, 0xFF, true); //
i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F
}
if (scroll == SCROLL_DOWN) {
i2c_master_write_byte(cmd, OLED_CMD_CONTINUOUS_SCROLL, true); // 29
i2c_master_write_byte(cmd, 0x00, true); // Dummy byte
i2c_master_write_byte(cmd, 0x00, true); // Define start page address
i2c_master_write_byte(cmd, 0x07, true); // Frame frequency
//i2c_master_write_byte(cmd, 0x01, true); // Define end page address
i2c_master_write_byte(cmd, 0x00, true); // Define end page address
i2c_master_write_byte(cmd, 0x3F, true); // Vertical scrolling offset
i2c_master_write_byte(cmd, OLED_CMD_VERTICAL, true); // A3
i2c_master_write_byte(cmd, 0x00, true);
if (dev->_height == 64)
//i2c_master_write_byte(cmd, 0x7F, true);
i2c_master_write_byte(cmd, 0x40, true);
if (dev->_height == 32)
i2c_master_write_byte(cmd, 0x20, true);
i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F
}
if (scroll == SCROLL_UP) {
i2c_master_write_byte(cmd, OLED_CMD_CONTINUOUS_SCROLL, true); // 29
i2c_master_write_byte(cmd, 0x00, true); // Dummy byte
i2c_master_write_byte(cmd, 0x00, true); // Define start page address
i2c_master_write_byte(cmd, 0x07, true); // Frame frequency
//i2c_master_write_byte(cmd, 0x01, true); // Define end page address
i2c_master_write_byte(cmd, 0x00, true); // Define end page address
i2c_master_write_byte(cmd, 0x01, true); // Vertical scrolling offset
i2c_master_write_byte(cmd, OLED_CMD_VERTICAL, true); // A3
i2c_master_write_byte(cmd, 0x00, true);
if (dev->_height == 64)
//i2c_master_write_byte(cmd, 0x7F, true);
i2c_master_write_byte(cmd, 0x40, true);
if (dev->_height == 32)
i2c_master_write_byte(cmd, 0x20, true);
i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F
}
if (scroll == SCROLL_STOP) {
i2c_master_write_byte(cmd, OLED_CMD_DEACTIVE_SCROLL, true); // 2E
}
i2c_master_stop(cmd);
espRc = i2c_master_cmd_begin(I2C_NUM, cmd, 10/portTICK_PERIOD_MS);
if (espRc == ESP_OK) {
ESP_LOGD(tag, "Scroll command succeeded");
} else {
ESP_LOGE(tag, "Scroll command failed. code: 0x%.2X", espRc);
}
i2c_cmd_link_delete(cmd);
}
#ifdef __cplusplus
}
#endif

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#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "driver/spi_master.h"
#include "driver/gpio.h"
#include "esp_log.h"
#include "ssd1306.h"
#define tag "SSD1306"
#ifdef CONFIG_IDF_TARGET_ESP32
#define LCD_HOST HSPI_HOST
#elif defined CONFIG_IDF_TARGET_ESP32S2
#define LCD_HOST SPI2_HOST
#elif defined CONFIG_IDF_TARGET_ESP32C3
#define LCD_HOST SPI2_HOST
#endif
static const int SPI_Command_Mode = 0;
static const int SPI_Data_Mode = 1;
static const int SPI_Frequency = 1000000;
void spi_master_init(SSD1306_t * dev, int16_t GPIO_MOSI, int16_t GPIO_SCLK, int16_t GPIO_CS, int16_t GPIO_DC, int16_t GPIO_RESET)
{
esp_err_t ret;
//gpio_pad_select_gpio( GPIO_CS );
gpio_reset_pin( GPIO_CS );
gpio_set_direction( GPIO_CS, GPIO_MODE_OUTPUT );
gpio_set_level( GPIO_CS, 0 );
//gpio_pad_select_gpio( GPIO_DC );
gpio_reset_pin( GPIO_DC );
gpio_set_direction( GPIO_DC, GPIO_MODE_OUTPUT );
gpio_set_level( GPIO_DC, 0 );
if ( GPIO_RESET >= 0 ) {
//gpio_pad_select_gpio( GPIO_RESET );
gpio_reset_pin( GPIO_RESET );
gpio_set_direction( GPIO_RESET, GPIO_MODE_OUTPUT );
gpio_set_level( GPIO_RESET, 0 );
vTaskDelay( pdMS_TO_TICKS( 100 ) );
gpio_set_level( GPIO_RESET, 1 );
}
spi_bus_config_t spi_bus_config = {
.mosi_io_num = GPIO_MOSI,
.miso_io_num = -1,
.sclk_io_num = GPIO_SCLK,
.quadwp_io_num = -1,
.quadhd_io_num = -1,
.max_transfer_sz = 0,
.flags = 0
};
ret = spi_bus_initialize( LCD_HOST, &spi_bus_config, SPI_DMA_CH_AUTO );
ESP_LOGI(tag, "spi_bus_initialize=%d",ret);
assert(ret==ESP_OK);
spi_device_interface_config_t devcfg;
memset( &devcfg, 0, sizeof( spi_device_interface_config_t ) );
devcfg.clock_speed_hz = SPI_Frequency;
devcfg.spics_io_num = GPIO_CS;
devcfg.queue_size = 1;
spi_device_handle_t handle;
ret = spi_bus_add_device( LCD_HOST, &devcfg, &handle);
ESP_LOGI(tag, "spi_bus_add_device=%d",ret);
assert(ret==ESP_OK);
dev->_dc = GPIO_DC;
dev->_SPIHandle = handle;
dev->_address = SPIAddress;
dev->_flip = false;
}
bool spi_master_write_byte(spi_device_handle_t SPIHandle, const uint8_t* Data, size_t DataLength )
{
spi_transaction_t SPITransaction;
if ( DataLength > 0 ) {
memset( &SPITransaction, 0, sizeof( spi_transaction_t ) );
SPITransaction.length = DataLength * 8;
SPITransaction.tx_buffer = Data;
spi_device_transmit( SPIHandle, &SPITransaction );
}
return true;
}
bool spi_master_write_command(SSD1306_t * dev, uint8_t Command )
{
static uint8_t CommandByte = 0;
CommandByte = Command;
gpio_set_level( dev->_dc, SPI_Command_Mode );
return spi_master_write_byte( dev->_SPIHandle, &CommandByte, 1 );
}
bool spi_master_write_data(SSD1306_t * dev, const uint8_t* Data, size_t DataLength )
{
gpio_set_level( dev->_dc, SPI_Data_Mode );
return spi_master_write_byte( dev->_SPIHandle, Data, DataLength );
}
void spi_init(SSD1306_t * dev, int width, int height)
{
dev->_width = width;
dev->_height = height;
dev->_pages = 8;
if (dev->_height == 32) dev->_pages = 4;
spi_master_write_command(dev, OLED_CMD_DISPLAY_OFF); // AE
spi_master_write_command(dev, OLED_CMD_SET_MUX_RATIO); // A8
if (dev->_height == 64) spi_master_write_command(dev, 0x3F);
if (dev->_height == 32) spi_master_write_command(dev, 0x1F);
spi_master_write_command(dev, OLED_CMD_SET_DISPLAY_OFFSET); // D3
spi_master_write_command(dev, 0x00);
spi_master_write_command(dev, OLED_CONTROL_BYTE_DATA_STREAM); // 40
if (dev->_flip) {
spi_master_write_command(dev, OLED_CMD_SET_SEGMENT_REMAP_0); // A0
} else {
spi_master_write_command(dev, OLED_CMD_SET_SEGMENT_REMAP_1); // A1
}
//spi_master_write_command(dev, OLED_CMD_SET_SEGMENT_REMAP); // A1
spi_master_write_command(dev, OLED_CMD_SET_COM_SCAN_MODE); // C8
spi_master_write_command(dev, OLED_CMD_SET_DISPLAY_CLK_DIV); // D5
spi_master_write_command(dev, 0x80);
spi_master_write_command(dev, OLED_CMD_SET_COM_PIN_MAP); // DA
if (dev->_height == 64) spi_master_write_command(dev, 0x12);
if (dev->_height == 32) spi_master_write_command(dev, 0x02);
spi_master_write_command(dev, OLED_CMD_SET_CONTRAST); // 81
spi_master_write_command(dev, 0xFF);
spi_master_write_command(dev, OLED_CMD_DISPLAY_RAM); // A4
spi_master_write_command(dev, OLED_CMD_SET_VCOMH_DESELCT); // DB
spi_master_write_command(dev, 0x40);
spi_master_write_command(dev, OLED_CMD_SET_MEMORY_ADDR_MODE); // 20
//spi_master_write_command(dev, OLED_CMD_SET_HORI_ADDR_MODE); // 00
spi_master_write_command(dev, OLED_CMD_SET_PAGE_ADDR_MODE); // 02
// Set Lower Column Start Address for Page Addressing Mode
spi_master_write_command(dev, 0x00);
// Set Higher Column Start Address for Page Addressing Mode
spi_master_write_command(dev, 0x10);
spi_master_write_command(dev, OLED_CMD_SET_CHARGE_PUMP); // 8D
spi_master_write_command(dev, 0x14);
spi_master_write_command(dev, OLED_CMD_DEACTIVE_SCROLL); // 2E
spi_master_write_command(dev, OLED_CMD_DISPLAY_NORMAL); // A6
spi_master_write_command(dev, OLED_CMD_DISPLAY_ON); // AF
}
void spi_display_image(SSD1306_t * dev, int page, int seg, uint8_t * images, int width)
{
if (page >= dev->_pages) return;
if (seg >= dev->_width) return;
int _seg = seg + CONFIG_OFFSETX;
uint8_t columLow = _seg & 0x0F;
uint8_t columHigh = (_seg >> 4) & 0x0F;
int _page = page;
if (dev->_flip) {
_page = (dev->_pages - page) - 1;
}
// Set Lower Column Start Address for Page Addressing Mode
spi_master_write_command(dev, (0x00 + columLow));
// Set Higher Column Start Address for Page Addressing Mode
spi_master_write_command(dev, (0x10 + columHigh));
// Set Page Start Address for Page Addressing Mode
spi_master_write_command(dev, 0xB0 | _page);
spi_master_write_data(dev, images, width);
}
void spi_contrast(SSD1306_t * dev, int contrast) {
int _contrast = contrast;
if (contrast < 0x0) _contrast = 0;
if (contrast > 0xFF) _contrast = 0xFF;
spi_master_write_command(dev, OLED_CMD_SET_CONTRAST); // 81
spi_master_write_command(dev, _contrast);
}
void spi_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll)
{
if (scroll == SCROLL_RIGHT) {
spi_master_write_command(dev, OLED_CMD_HORIZONTAL_RIGHT); // 26
spi_master_write_command(dev, 0x00); // Dummy byte
spi_master_write_command(dev, 0x00); // Define start page address
spi_master_write_command(dev, 0x07); // Frame frequency
spi_master_write_command(dev, 0x07); // Define end page address
spi_master_write_command(dev, 0x00); //
spi_master_write_command(dev, 0xFF); //
spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F
}
if (scroll == SCROLL_LEFT) {
spi_master_write_command(dev, OLED_CMD_HORIZONTAL_LEFT); // 27
spi_master_write_command(dev, 0x00); // Dummy byte
spi_master_write_command(dev, 0x00); // Define start page address
spi_master_write_command(dev, 0x07); // Frame frequency
spi_master_write_command(dev, 0x07); // Define end page address
spi_master_write_command(dev, 0x00); //
spi_master_write_command(dev, 0xFF); //
spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F
}
if (scroll == SCROLL_DOWN) {
spi_master_write_command(dev, OLED_CMD_CONTINUOUS_SCROLL); // 29
spi_master_write_command(dev, 0x00); // Dummy byte
spi_master_write_command(dev, 0x00); // Define start page address
spi_master_write_command(dev, 0x07); // Frame frequency
//spi_master_write_command(dev, 0x01); // Define end page address
spi_master_write_command(dev, 0x00); // Define end page address
spi_master_write_command(dev, 0x3F); // Vertical scrolling offset
spi_master_write_command(dev, OLED_CMD_VERTICAL); // A3
spi_master_write_command(dev, 0x00);
if (dev->_height == 64)
spi_master_write_command(dev, 0x40);
if (dev->_height == 32)
spi_master_write_command(dev, 0x20);
spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F
}
if (scroll == SCROLL_UP) {
spi_master_write_command(dev, OLED_CMD_CONTINUOUS_SCROLL); // 29
spi_master_write_command(dev, 0x00); // Dummy byte
spi_master_write_command(dev, 0x00); // Define start page address
spi_master_write_command(dev, 0x07); // Frame frequency
//spi_master_write_command(dev, 0x01); // Define end page address
spi_master_write_command(dev, 0x00); // Define end page address
spi_master_write_command(dev, 0x01); // Vertical scrolling offset
spi_master_write_command(dev, OLED_CMD_VERTICAL); // A3
spi_master_write_command(dev, 0x00);
if (dev->_height == 64)
spi_master_write_command(dev, 0x40);
if (dev->_height == 32)
spi_master_write_command(dev, 0x20);
spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F
}
if (scroll == SCROLL_STOP) {
spi_master_write_command(dev, OLED_CMD_DEACTIVE_SCROLL); // 2E
}
}

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