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95f6f88aa7e6080f47f7b785fe3554bdfe83df4e
esp-idf/components/soc
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kooho 3a6be05945 driver(uart):merge branch into v3.0 which fixed three bug related with uart
1. uart fifo reset
    2. uart pattern interrupt
    3. uart buffered_len error.
2018-01-24 21:27:31 +08:00
..
esp32
driver(uart):merge branch into v3.0 which fixed three bug related with uart
2018-01-24 21:27:31 +08:00
include/soc
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00
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