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42986bf1e5f990888a5df76921e1143d9d9aad05
esp-idf/components/soc
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maojianxin 857bdf65e5 Fix external start fail
2019-04-26 07:07:53 +00:00
..
esp32
Fix external start fail
2019-04-26 07:07:53 +00:00
include/soc
heap: Add integer overflow checks on MALLOC_CAP_32BIT & MALLOC_CAP_EXEC
2019-03-21 16:05:52 +11:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
CMakeLists.txt
cmake: make main a component again
2018-09-13 11:13:27 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00
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