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369da50ea1a0828e94de2ecbf11b2aa2e3d153b6
esp-idf/components/soc/esp32
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Angus Gratton 5122154dbb efuse/flash encryption: Reduce FLASH_CRYPT_CNT to a 7 bit efuse field
8th bit is not used by hardware.

As reported https://esp32.com/viewtopic.php?f=2&t=7800&p=40895#p40894
2019-04-09 09:59:35 +10:00
..
include/soc
efuse/flash encryption: Reduce FLASH_CRYPT_CNT to a 7 bit efuse field
2019-04-09 09:59:35 +10:00
test
docs: add information about execution time of ULP instructions
2017-12-27 16:54:20 +08:00
cpu_util.c
esp_restart: fix possible race while stalling other CPU, enable WDT early
2017-10-26 19:53:53 +08:00
i2c_apll.h
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
i2c_bbpll.h
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
i2c_rtc_clk.h
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
rtc_clk.c
Merge branch 'bugfix/dfs_rtc_fixes' into 'master'
2018-03-21 12:02:58 +08:00
rtc_init.c
esp_adc_cal/Add eFuse functionality and update calibration method
2018-02-26 21:52:00 +08:00
rtc_pm.c
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
rtc_sleep.c
soc/rtc: add function to get/set VDDSDIO configuration
2017-11-03 15:49:09 +08:00
rtc_time.c
soc/rtc: add a function to wait for slow clock cycle
2017-10-26 19:53:53 +08:00
soc_log.h
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
soc_memory_layout.c
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
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