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tools: use riscv32-esp-elf toolchain for ESP32-S2 RISC-V ULP

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riscv32-esp-elf toolchain (used for ESP32-C3) can also be used for
ESP32-S2 RISC-V ULP coprocessor.

This removes the riscv-none-embed-gcc toolchain which was originally
used for the ULP, and updates the docs and CMake files to use
riscv32-esp-elf.

Some flags are cleaned up and workarounds removed from CMake toolchain
file.
This commit is contained in:
Ivan Grokhotkov
2020-12-15 18:24:07 +01:00
committed by bot
parent 39cbf2f7ed
commit de798541dc
7 changed files with 46 additions and 72 deletions
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5
docs/en/api-guides/tools/idf-tools-notes.inc
View File

@@ -25,11 +25,6 @@
.. tool-esp32s2ulp-elf-notes
---
.. tool-riscv-none-embed-gcc-notes
---
.. tool-openocd-esp32-notes

10
docs/en/api-guides/ulp-risc-v.rst
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@@ -11,11 +11,11 @@ The ULP-RISC-V coprocessor is a variant of the ULP, present in ESP32-S2. Similar
Installing the ULP-RISC-V Toolchain
-----------------------------------
The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using the `riscv-embedded toolchain`_.
The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using RISC-V toolchain based on GCC.
If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then you need to perform an extra step to get the ULP-RISC-V toolchain installed, execute the command below inside the IDF folder::
If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then the toolchain should already be installed.
$ idf_tools.py install riscv-none-embed-gcc
.. note: In earlier versions of ESP-IDF, RISC-V toolchain had a different prefix: `riscv-none-embed-gcc`.
Compiling the ULP-RISC-V Code
@@ -56,7 +56,7 @@ To compile the ULP-RISC-V code as part of the component, the following steps mus
5. **Dump the contents of the ELF file into a binary** (``ulp_app_name.bin``) which can then be embedded into the application.
6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv-none-embed-nm``.
6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv32-esp-elf-nm``.
7. **Create an LD export script and header file** (``ulp_app_name.ld`` and ``ulp_app_name.h``) containing the symbols from ``ulp_app_name.sym``. This is done using the ``esp32ulp_mapgen.py`` utility.
@@ -147,5 +147,3 @@ The program runs until the field ``RTC_CNTL_COCPU_DONE`` in register ``RTC_CNTL_
To disable the timer (effectively preventing the ULP program from running again), please clear the ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` bit in the ``RTC_CNTL_STATE0_REG`` register. This can be done both from the ULP code and from the main program.
.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/

5
docs/zh_CN/api-guides/tools/idf-tools-notes.inc
View File

@@ -27,11 +27,6 @@
.. tool-esp32s2ulp-elf-notes
---
.. tool-riscv-none-embed-gcc-notes
---
.. tool-openocd-esp32-notes

11
docs/zh_CN/api-guides/ulp-risc-v.rst
View File

@@ -11,12 +11,11 @@ ULP-RISC-V 协处理器是 ULP 的一种变体，用于 ESP32-S2。与 ULP 类
安装 ULP-RISC-V 工具链
-----------------------------------
ULP-RISC-V 协处理器代码以 C 语言编写（也可能是汇编语言），使用 `riscv-embedded toolchain`_ 进行编译。
ULP-RISC-V 协处理器代码以 C 语言编写（也可能是汇编语言），使用基于GCC的 RISC-V 工具链进行编译。
如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统，还需要在 IDF 文件夹中执行以下指令，安装 ULP-RISC-V 工具链::
$ idf_tools.py install riscv-none-embed-gcc
如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统，那么 ULP-RISC-V 工具链已经被默认安装到了你的开发环境中。
.. note: 在早期版本的ESP-IDF中，RISC-V工具链具有不同的名称：`riscv-none-embed-gcc`。
编译 ULP-RISC-V 代码
-----------------------------
@@ -25,7 +24,7 @@ $ idf_tools.py install riscv-none-embed-gcc
1. ULP-RISC-V 代码以 C 语言或汇编语言编写（必须使用 `.S` 扩展名)，必须放在组件目录中一个独立的目录中，例如 `ulp/`。
.. 注意：当注册组件时（通过 ``idf_component_register``），该目录不应被添加至 ``SRC_DIRS`` 参数，因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件，请见以下步骤。
.. note: 当注册组件时（通过 ``idf_component_register``），该目录不应被添加至 ``SRC_DIRS`` 参数，因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件，请见以下步骤。
2. 注册后从组件 CMakeLists.txt 中调用 ``ulp_embed_binary`` 示例如下::
@@ -147,5 +146,3 @@ ULP-RISC-V 协处理器由定时器启动，调用 :cpp:func:`ulp_riscv_run` 即
如需禁用定时器（有效防止 ULP 程序再次运行），请清除 ``RTC_CNTL_STATE0_REG`` 寄存器中的 ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` 位，此项操作可在 ULP 代码或主程序中进行。
.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/