Merge branch 'feature/c3_crypto_gdma' into 'master'

AES/SHA: GDMA crypto driver

Closes IDF-2192 and IDF-2501

See merge request espressif/esp-idf!12014
This commit is contained in:
Angus Gratton
2021-01-20 16:42:39 +08:00
25 changed files with 680 additions and 187 deletions

View File

@@ -13,8 +13,6 @@
// There are 3 DMA channels on ESP32-C3
// Attention: These fixed DMA channels are temporarily workaround before we have a centralized DMA controller API to help alloc the channel dynamically
// Remove them when GDMA driver API is ready
#define SOC_GDMA_AES_DMA_CHANNEL (0)
#define SOC_GDMA_SHA_DMA_CHANNEL (1)
#define SOC_GDMA_SPI2_DMA_CHANNEL (2)
#define SOC_GDMA_ADC_DMA_CHANNEL (0)
@@ -77,7 +75,7 @@
#define SOC_SHA_SUPPORT_RESUME (1)
/* Has a centralized DMA, which is shared with all peripherals */
#define SOC_SHA_GENERAL_DMA (1)
#define SOC_SHA_GDMA (1)
/* Supported HW algorithms */
#define SOC_SHA_SUPPORT_SHA1 (1)
@@ -94,7 +92,7 @@
#define SOC_AES_SUPPORT_DMA (1)
/* Has a centralized DMA, which is shared with all peripherals */
#define SOC_AES_GENERAL_DMA (1)
#define SOC_AES_GDMA (1)
#define SOC_AES_SUPPORT_AES_128 (1)
#define SOC_AES_SUPPORT_AES_256 (1)

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@@ -116,7 +116,7 @@
#define SOC_SHA_SUPPORT_RESUME (1)
/* Has a centralized DMA, which is shared with all peripherals */
#define SOC_SHA_GENERAL_DMA (1)
#define SOC_SHA_GDMA (1)
/* Supported HW algorithms */
#define SOC_SHA_SUPPORT_SHA1 (1)
@@ -151,7 +151,7 @@
#define SOC_PM_SUPPORT_BT_WAKEUP (1)
/* Has a centralized DMA, which is shared with all peripherals */
#define SOC_AES_GENERAL_DMA (1)
#define SOC_AES_GDMA (1)
#define SOC_AES_SUPPORT_AES_128 (1)
#define SOC_AES_SUPPORT_AES_256 (1)
@@ -160,5 +160,3 @@
// Remove them when GDMA driver API is ready
#define SOC_GDMA_SPI2_DMA_CHANNEL (1)
#define SOC_GDMA_SPI3_DMA_CHANNEL (2)
#define SOC_GDMA_SHA_DMA_CHANNEL (3)
#define SOC_GDMA_AES_DMA_CHANNEL (4)