eaw/esp-idf
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

esp32h2: add bootloader support

Browse Source
This commit is contained in:
Shu Chen
2021-06-10 19:28:18 +08:00
parent 5e3689ae0f
commit c0056813f2
21 changed files with 1397 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
components/bootloader_support/src/bootloader_flash.c
View File

@@ -29,6 +29,8 @@
#include "esp32s3/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/spi_flash.h"
#endif
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
@@ -124,6 +126,10 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size)
#include "esp32c3/rom/spi_flash.h"
#include "esp32c3/rom/cache.h"
#include "soc/cache_memory.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/spi_flash.h"
#include "esp32h2/rom/cache.h"
#include "soc/cache_memory.h"
#endif
static const char *TAG = "bootloader_flash";
@@ -188,6 +194,9 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
#elif CONFIG_IDF_TARGET_ESP32C3
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#elif CONFIG_IDF_TARGET_ESP32H2
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#endif
ESP_LOGD(TAG, "mmu set paddr=%08x count=%d size=%x src_addr=%x src_addr_aligned=%x",
src_addr & MMU_FLASH_MASK, count, size, src_addr, src_addr_aligned );
@@ -195,7 +204,7 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
int e = cache_flash_mmu_set(0, 0, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count);
#elif CONFIG_IDF_TARGET_ESP32S2
int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
#else // S3, C3
#else // S3, C3, H2
int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
#endif
if (e != 0) {
@@ -208,6 +217,8 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
Cache_Resume_DCache(autoload);
#elif CONFIG_IDF_TARGET_ESP32C3
Cache_Resume_ICache(autoload);
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Resume_ICache(autoload);
#endif
return NULL;
}
@@ -219,6 +230,8 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
Cache_Resume_DCache(autoload);
#elif CONFIG_IDF_TARGET_ESP32C3
Cache_Resume_ICache(autoload);
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Resume_ICache(autoload);
#endif
mapped = true;
@@ -248,6 +261,10 @@ void bootloader_munmap(const void *mapping)
Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
Cache_MMU_Init();
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
Cache_MMU_Init();
#endif
mapped = false;
current_read_mapping = UINT32_MAX;
@@ -279,6 +296,8 @@ static esp_err_t bootloader_flash_read_no_decrypt(size_t src_addr, void *dest, s
uint32_t autoload = Cache_Suspend_DCache();
#elif CONFIG_IDF_TARGET_ESP32C3
uint32_t autoload = Cache_Suspend_ICache();
#elif CONFIG_IDF_TARGET_ESP32H2
uint32_t autoload = Cache_Suspend_ICache();
#endif
esp_rom_spiflash_result_t r = esp_rom_spiflash_read(src_addr, dest, size);
#if CONFIG_IDF_TARGET_ESP32
@@ -289,6 +308,8 @@ static esp_err_t bootloader_flash_read_no_decrypt(size_t src_addr, void *dest, s
Cache_Resume_DCache(autoload);
#elif CONFIG_IDF_TARGET_ESP32C3
Cache_Resume_ICache(autoload);
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Resume_ICache(autoload);
#endif
return spi_to_esp_err(r);
@@ -316,6 +337,9 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
#elif CONFIG_IDF_TARGET_ESP32C3
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#elif CONFIG_IDF_TARGET_ESP32H2
uint32_t autoload = Cache_Suspend_ICache();
Cache_Invalidate_ICache_All();
#endif
ESP_LOGD(TAG, "mmu set block paddr=0x%08x (was 0x%08x)", map_at, current_read_mapping);
#if CONFIG_IDF_TARGET_ESP32
@@ -326,6 +350,8 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
#elif CONFIG_IDF_TARGET_ESP32C3
int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
#elif CONFIG_IDF_TARGET_ESP32H2
int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
#endif
if (e != 0) {
ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
@@ -337,6 +363,8 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
Cache_Resume_DCache(autoload);
#elif CONFIG_IDF_TARGET_ESP32C3
Cache_Resume_ICache(autoload);
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Resume_ICache(autoload);
#endif
return ESP_FAIL;
}
@@ -349,6 +377,8 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
Cache_Resume_DCache(autoload);
#elif CONFIG_IDF_TARGET_ESP32C3
Cache_Resume_ICache(autoload);
#elif CONFIG_IDF_TARGET_ESP32H2
Cache_Resume_ICache(autoload);
#endif
}
map_ptr = (uint32_t *)(FLASH_READ_VADDR + (word_src - map_at));