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esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3

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This commit is contained in:
Mahavir Jain
2021-10-11 15:38:06 +05:30
parent 390f71cbcb
commit bdeaeb8d7f
3 changed files with 65 additions and 20 deletions
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tools/ci/check_copyright_ignore.txt
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@@ -1154,7 +1154,6 @@ components/esp_system/port/soc/esp32s2/clk.c
components/esp_system/port/soc/esp32s2/reset_reason.c
components/esp_system/port/soc/esp32s2/system_internal.c
components/esp_system/port/soc/esp32s2/usb_console.c
components/esp_system/port/soc/esp32s3/cache_err_int.c
components/esp_system/port/soc/esp32s3/cache_err_int.h
components/esp_system/port/soc/esp32s3/clk.c
components/esp_system/port/soc/esp32s3/reset_reason.c