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LEDC: improved support for ESP32-C3 and refactored divisor calculation

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As ESP32C3 does not have support for REF_TICK source clock, it is now not
possible to select it anymore.
Auto cfg clock has been improved for all boards.
This commit is contained in:
Omar Chebib
2021-06-02 20:19:09 +08:00
parent 534cd5bb31
commit aa2ca7dd94
17 changed files with 417 additions and 242 deletions
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21
components/hal/esp32/include/hal/ledc_ll.h
View File

@@ -22,6 +22,27 @@
#include "soc/ledc_struct.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_USE_APB_CLK, \
LEDC_USE_RTC8M_CLK, \
}
#define LEDC_LL_TIMER_SPECIFIC_CLOCKS \
{\
{ \
.clk = LEDC_REF_TICK, \
.freq = LEDC_REF_CLK_HZ, \
} \
}
/* On ESP32, APB clock is a timer-specific clock only in fast clock mode */
#define LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(SPEED, CLK) (\
((CLK) == LEDC_USE_REF_TICK) || \
((SPEED) == LEDC_HIGH_SPEED_MODE && (CLK) == LEDC_USE_APB_CLK) \
)
#ifdef __cplusplus
extern "C" {

34
components/hal/esp32c3/include/hal/ledc_ll.h
View File

@@ -26,6 +26,13 @@ extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_USE_APB_CLK, \
LEDC_USE_XTAL_CLK, \
LEDC_USE_RTC8M_CLK, \
}
/**
* @brief Set LEDC low speed timer clock
@@ -155,27 +162,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
}
/**
* @brief Set LEDC timer clock source
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Timer clock source
*
* @return None
*/
static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
{
if (clk_src == LEDC_REF_TICK) {
//REF_TICK can only be used when APB is selected.
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
hw->conf.apb_clk_sel = 1;
} else {
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
}
}
/**
* @brief Get LEDC timer clock source
*
@@ -188,11 +174,7 @@ static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mo
*/
static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
{
if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
*clk_src = LEDC_REF_TICK;
} else {
*clk_src = LEDC_APB_CLK;
}
*clk_src = LEDC_APB_CLK;
}
/**

34
components/hal/esp32h2/include/hal/ledc_ll.h
View File

@@ -26,6 +26,13 @@ extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_USE_APB_CLK, \
LEDC_USE_XTAL_CLK, \
LEDC_USE_RTC8M_CLK, \
}
/**
* @brief Set LEDC low speed timer clock
@@ -155,27 +162,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
}
/**
* @brief Set LEDC timer clock source
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Timer clock source
*
* @return None
*/
static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
{
if (clk_src == LEDC_REF_TICK) {
//REF_TICK can only be used when APB is selected.
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
hw->conf.apb_clk_sel = 1;
} else {
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
}
}
/**
* @brief Get LEDC timer clock source
*
@@ -188,11 +174,7 @@ static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mo
*/
static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
{
if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
*clk_src = LEDC_REF_TICK;
} else {
*clk_src = LEDC_APB_CLK;
}
*clk_src = LEDC_APB_CLK;
}
/**

16
components/hal/esp32s2/include/hal/ledc_ll.h
View File

@@ -26,6 +26,22 @@ extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_USE_APB_CLK, \
LEDC_USE_XTAL_CLK, \
LEDC_USE_RTC8M_CLK, \
}
#define LEDC_LL_TIMER_SPECIFIC_CLOCKS \
{\
{ \
.clk = LEDC_REF_TICK, \
.freq = LEDC_REF_CLK_HZ, \
} \
}
#define LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(SPEED, CLK) ((CLK) == LEDC_USE_REF_TICK)
/**
* @brief Set LEDC low speed timer clock

16
components/hal/esp32s3/include/hal/ledc_ll.h
View File

@@ -26,6 +26,22 @@ extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_USE_APB_CLK, \
LEDC_USE_XTAL_CLK, \
LEDC_USE_RTC8M_CLK, \
}
#define LEDC_LL_TIMER_SPECIFIC_CLOCKS \
{\
{ \
.clk = LEDC_REF_TICK, \
.freq = LEDC_REF_CLK_HZ, \
} \
}
#define LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(SPEED, CLK) ((CLK) == LEDC_USE_REF_TICK)
/**
* @brief Set LEDC low speed timer clock

35
components/hal/esp8684/include/hal/ledc_ll.h
View File

@@ -17,6 +17,14 @@ extern "C" {
#endif
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_FRACTIONAL_BITS (8)
#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
#define LEDC_LL_GLOBAL_CLOCKS { \
LEDC_SLOW_CLK_APB, \
LEDC_SLOW_CLK_XTAL, \
LEDC_SLOW_CLK_RTC8M, \
}
/**
* @brief Set LEDC low speed timer clock
@@ -146,27 +154,6 @@ static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_m
*clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clock_divider;
}
/**
* @brief Set LEDC timer clock source
*
* @param hw Beginning address of the peripheral registers
* @param speed_mode LEDC speed_mode, high-speed mode or low-speed mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Timer clock source
*
* @return None
*/
static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t clk_src)
{
if (clk_src == LEDC_REF_TICK) {
//REF_TICK can only be used when APB is selected.
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 1;
hw->conf.apb_clk_sel = 1;
} else {
hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel = 0;
}
}
/**
* @brief Get LEDC timer clock source
*
@@ -179,11 +166,7 @@ static inline void ledc_ll_set_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mo
*/
static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
{
if (hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 1) {
*clk_src = LEDC_REF_TICK;
} else {
*clk_src = LEDC_APB_CLK;
}
*clk_src = LEDC_APB_CLK;
}
/**

65
components/hal/include/hal/ledc_types.h
View File

@@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@@ -50,11 +42,19 @@ typedef enum {
#endif
} ledc_slow_clk_sel_t;
/**
* In theory, the following enumeration shall be placed in LEDC driver's header.
* However, as the next enumeration, `ledc_clk_src_t`, makes the use of some of
* these values and to avoid mutual inclusion of the headers, we must define it
* here.
*/
typedef enum {
LEDC_AUTO_CLK = 0, /*!< The driver will automatically select the source clock(REF_TICK or APB) based on the giving resolution and duty parameter when init the timer*/
LEDC_USE_REF_TICK, /*!< LEDC timer select REF_TICK clock as source clock*/
LEDC_USE_APB_CLK, /*!< LEDC timer select APB clock as source clock*/
LEDC_USE_RTC8M_CLK, /*!< LEDC timer select RTC8M_CLK as source clock. Only for low speed channels and this parameter must be the same for all low speed channels*/
#if SOC_LEDC_SUPPORT_REF_TICK
LEDC_USE_REF_TICK, /*!< LEDC timer select REF_TICK clock as source clock*/
#endif
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
LEDC_USE_XTAL_CLK, /*!< LEDC timer select XTAL clock as source clock*/
#endif
@@ -64,11 +64,13 @@ typedef enum {
LEDC_AUTO_CLK in the driver, as these enums have very similar names and user may pass
one of these by mistake. */
typedef enum {
#if SOC_LEDC_SUPPORT_REF_TICK
LEDC_REF_TICK = LEDC_USE_REF_TICK, /*!< LEDC timer clock divided from reference tick (1Mhz) */
#endif
LEDC_APB_CLK = LEDC_USE_APB_CLK, /*!< LEDC timer clock divided from APB clock (80Mhz) */
LEDC_SCLK = LEDC_USE_APB_CLK /*!< Selecting this value for LEDC_TICK_SEL_TIMER let the hardware take its source clock from LEDC_APB_CLK_SEL */
} ledc_clk_src_t;
typedef enum {
LEDC_TIMER_0 = 0, /*!< LEDC timer 0 */
LEDC_TIMER_1, /*!< LEDC timer 1 */
@@ -123,39 +125,6 @@ typedef enum {
LEDC_FADE_MAX,
} ledc_fade_mode_t;
/**
* @brief Configuration parameters of LEDC channel for ledc_channel_config function
*/
typedef struct {
int gpio_num; /*!< the LEDC output gpio_num, if you want to use gpio16, gpio_num = 16 */
ledc_mode_t speed_mode; /*!< LEDC speed speed_mode, high-speed mode or low-speed mode */
ledc_channel_t channel; /*!< LEDC channel (0 - 7) */
ledc_intr_type_t intr_type; /*!< configure interrupt, Fade interrupt enable or Fade interrupt disable */
ledc_timer_t timer_sel; /*!< Select the timer source of channel (0 - 3) */
uint32_t duty; /*!< LEDC channel duty, the range of duty setting is [0, (2**duty_resolution)] */
int hpoint; /*!< LEDC channel hpoint value, the max value is 0xfffff */
struct {
unsigned int output_invert: 1;/*!< Enable (1) or disable (0) gpio output invert */
} flags; /*!< LEDC flags */
} ledc_channel_config_t;
/**
* @brief Configuration parameters of LEDC Timer timer for ledc_timer_config function
*/
typedef struct {
ledc_mode_t speed_mode; /*!< LEDC speed speed_mode, high-speed mode or low-speed mode */
union {
ledc_timer_bit_t duty_resolution; /*!< LEDC channel duty resolution */
ledc_timer_bit_t bit_num __attribute__((deprecated)); /*!< Deprecated in ESP-IDF 3.0. This is an alias to 'duty_resolution' for backward compatibility with ESP-IDF 2.1 */
};
ledc_timer_t timer_num; /*!< The timer source of channel (0 - 3) */
uint32_t freq_hz; /*!< LEDC timer frequency (Hz) */
ledc_clk_cfg_t clk_cfg; /*!< Configure LEDC source clock.
For low speed channels and high speed channels, you can specify the source clock using LEDC_USE_REF_TICK, LEDC_USE_APB_CLK or LEDC_AUTO_CLK.
For low speed channels, you can also specify the source clock using LEDC_USE_RTC8M_CLK, in this case, all low speed channel's source clock must be RTC8M_CLK*/
} ledc_timer_config_t;
#ifdef __cplusplus
}
#endif

92
components/hal/ledc_hal.c
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@@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// The HAL layer for LEDC (common part)
@@ -25,37 +17,73 @@ void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
hal->speed_mode = speed_mode;
}
static inline ledc_clk_cfg_t ledc_hal_get_slow_clock_helper(ledc_hal_context_t *hal)
{
ledc_slow_clk_sel_t slow_clk = LEDC_SLOW_CLK_APB;
ledc_hal_get_slow_clk_sel(hal, &slow_clk);
switch (slow_clk) {
case LEDC_SLOW_CLK_RTC8M:
return LEDC_USE_RTC8M_CLK;
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
case LEDC_SLOW_CLK_XTAL:
return LEDC_USE_XTAL_CLK;
#endif
default:
return LEDC_USE_APB_CLK;
}
}
void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
{
ledc_clk_src_t clk_src = LEDC_APB_CLK;
/* Use the following variable to retrieve the clock source used by the LEDC
* hardware controler. */
ledc_clk_src_t clk_src;
/* Clock configuration to return to the driver. */
ledc_clk_cfg_t driver_clk = LEDC_USE_APB_CLK;
/* Get the timer-specific mux value. */
ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
#if SOC_LEDC_SUPPORT_REF_TICK
if (clk_src == LEDC_REF_TICK) {
*clk_cfg = LEDC_USE_REF_TICK;
} else {
*clk_cfg = LEDC_USE_APB_CLK;
if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
ledc_slow_clk_sel_t slow_clk = LEDC_SLOW_CLK_APB;
ledc_hal_get_slow_clk_sel(hal, &slow_clk);
if (slow_clk == LEDC_SLOW_CLK_RTC8M) {
*clk_cfg = LEDC_USE_RTC8M_CLK;
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
} else if (slow_clk == LEDC_SLOW_CLK_XTAL) {
*clk_cfg = LEDC_USE_XTAL_CLK;
driver_clk = LEDC_USE_REF_TICK;
} else
#endif
}
}
/* If the timer-specific mux is not set to REF_TICK, it either means that:
* - The controler is in fast mode, and thus using APB clock (driver_clk
* variable's default value)
* - The controler is in slow mode and so, using a global clock,
* so we have to retrieve that clock here.
*/
if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
/* If the source clock used by LEDC hardware is not REF_TICKS, it is
* necessary to retrieve the global clock source used. */
driver_clk = ledc_hal_get_slow_clock_helper(hal);
}
*clk_cfg = driver_clk;
}
void ledc_hal_set_slow_clk(ledc_hal_context_t *hal, ledc_clk_cfg_t clk_cfg)
{
// For low speed channels, if RTC_8MCLK is used as the source clock, the `slow_clk_sel` register should be cleared, otherwise it should be set.
ledc_slow_clk_sel_t slow_clk_sel = LEDC_SLOW_CLK_APB;
ledc_slow_clk_sel_t slow_clk_sel;
switch (clk_cfg) {
case LEDC_USE_RTC8M_CLK:
slow_clk_sel = LEDC_SLOW_CLK_RTC8M;
break;
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M :
((clk_cfg == LEDC_USE_XTAL_CLK) ? LEDC_SLOW_CLK_XTAL : LEDC_SLOW_CLK_APB);
#else
slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M : LEDC_SLOW_CLK_APB;
case LEDC_USE_XTAL_CLK:
slow_clk_sel = LEDC_SLOW_CLK_XTAL;
break;
#endif
default:
slow_clk_sel = LEDC_SLOW_CLK_APB;
break;
}
ledc_hal_set_slow_clk_sel(hal, slow_clk_sel);
}