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Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master'

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cache: remove redundant rom cache dependency in bootloader

Closes IDF-4523

See merge request espressif/esp-idf!17077
This commit is contained in:
Armando (Dou Yiwen)
2022-03-12 10:11:39 +08:00
parent ab3d6a802d c1cbd7bbf6
commit 6ed3ffbbf1
70 changed files with 2314 additions and 466 deletions
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6
components/esp_system/ld/esp32c3/memory.ld.in
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@@ -23,11 +23,15 @@
#define ESP_BOOTLOADER_RESERVE_RTC 0
#endif
/**
* physical memory is mapped twice to the vritual address (IRAM and DRAM).
* `I_D_SRAM_OFFSET` is the offset between the two locations of the same physical memory
*/
#define SRAM_IRAM_START 0x4037C000
#define SRAM_DRAM_START 0x3FC7C000
#define ICACHE_SIZE 0x4000 /* ICache size is fixed to 16KB on ESP32-C3 */
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
#define SRAM_DRAM_END 0x403D0000 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_DRAM_END 0x403CF600 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_IRAM_ORG (SRAM_IRAM_START + ICACHE_SIZE)
#define SRAM_DRAM_ORG (SRAM_DRAM_START + ICACHE_SIZE)

4
components/esp_system/ld/esp32s3/memory.ld.in
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@@ -26,7 +26,7 @@
* 40370000 <- IRAM/Icache -> 40378000 <- D/IRAM (I) -> 403E0000
* 3FC88000 <- D/IRAM (D) -> 3FCF0000 <- DRAM/DCache -> 3FD00000
*
* Startup code uses the IRAM from 0x403BA000 to 0x403E0000, which is not available for static
* Startup code uses the IRAM from 0x403B9000 to 0x403E0000, which is not available for static
* memory, but can only be used after app starts.
*
* D cache use the memory from high address, so when it's configured to 16K/32K, the region
@@ -36,7 +36,7 @@
#define SRAM_IRAM_START 0x40370000
#define SRAM_DIRAM_I_START 0x40378000
#define SRAM_IRAM_END 0x403BA000
#define SRAM_IRAM_END 0x403B9000
#define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START)
#define SRAM_DRAM_START 0x3FC88000

2
components/esp_system/port/arch/xtensa/panic_arch.c
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@@ -20,7 +20,7 @@
#if !CONFIG_IDF_TARGET_ESP32
#include "soc/extmem_reg.h"
#include "soc/cache_memory.h"
#include "soc/ext_mem_defs.h"
#include "soc/rtc_cntl_reg.h"
#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
#ifdef CONFIG_IDF_TARGET_ESP32S2

9
components/esp_system/port/cpu_start.c
View File

@@ -41,24 +41,20 @@
#include "esp32s3/dport_access.h"
#include "esp_memprot.h"
#include "soc/assist_debug_reg.h"
#include "soc/cache_memory.h"
#include "soc/system_reg.h"
#include "esp32s3/rom/opi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rtc.h"
#include "esp32c3/rom/cache.h"
#include "soc/cache_memory.h"
#include "esp_memprot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rtc.h"
#include "esp32h2/rom/cache.h"
#include "soc/cache_memory.h"
#include "esp_memprot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rtc.h"
#include "esp32c2/rom/cache.h"
#include "esp32c2/rom/rtc.h"
#include "soc/cache_memory.h"
#include "esp32c2/memprot.h"
#endif
@@ -99,6 +95,11 @@
#define ROM_LOG_MODE ESP_EFUSE_ROM_LOG_ON_GPIO_HIGH
#endif
//This will be replaced with a kconfig, TODO: IDF-3821
//Besides, the MMU setting will be abstracted later. So actually we don't need this define in the future
#define MMU_PAGE_SIZE 0x10000
//This dependency will be removed in the future
#include "soc/ext_mem_defs.h"
#include "esp_private/startup_internal.h"
#include "esp_private/system_internal.h"