ethernet: Add convenience functions esp_eth_smi_wait_value() & esp_eth_smi_wait_set()
Covers the common case of waiting for a particular PHY register to have a particular value.
This commit is contained in:
committed by
Angus Gratton
parent
453722ba54
commit
453b5ded1d
@@ -18,14 +18,12 @@
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#include "eth_phy/phy_lan8720.h"
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#include "eth_phy/phy_reg.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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/* Value of MII_PHY_IDENTIFIER_REGs for Microchip LAN8720
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* (Except for bottom 4 bits of ID2, used for model revision)
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*/
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#define LAN8720_PHY_ID1 0x0007
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#define LAN8720_PHY_ID2 0xc0f0
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#define LAN8720_PHY_ID2_MASK 0xFFF0
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/* LAN8720-specific registers */
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#define SW_STRAP_CONTROL_REG (0x9)
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@@ -55,12 +53,8 @@ void phy_lan8720_check_phy_init(void)
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{
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phy_lan8720_dump_registers();
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while((esp_eth_smi_read(MII_BASIC_MODE_STATUS_REG) & MII_AUTO_NEGOTIATION_COMPLETE ) == 0) {
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vTaskDelay(1);
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}
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while((esp_eth_smi_read(PHY_SPECIAL_CONTROL_STATUS_REG) & AUTO_NEGOTIATION_DONE ) == 0) {
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vTaskDelay(1);
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}
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esp_eth_smi_wait_set(MII_BASIC_MODE_STATUS_REG, MII_AUTO_NEGOTIATION_COMPLETE, 0);
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esp_eth_smi_wait_set(PHY_SPECIAL_CONTROL_STATUS_REG, AUTO_NEGOTIATION_DONE, 0);
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}
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eth_speed_mode_t phy_lan8720_get_speed_mode(void)
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@@ -101,14 +95,12 @@ void phy_lan8720_init(void)
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esp_eth_smi_write(MII_BASIC_MODE_CONTROL_REG, MII_SOFTWARE_RESET);
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unsigned phy_id1, phy_id2;
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esp_err_t res1, res2;
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do {
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vTaskDelay(1);
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phy_id1 = esp_eth_smi_read(MII_PHY_IDENTIFIER_1_REG);
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phy_id2 = esp_eth_smi_read(MII_PHY_IDENTIFIER_2_REG);
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ESP_LOGD(TAG, "PHY ID 0x%04x 0x%04x", phy_id1, phy_id2);
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phy_id2 &= 0xFFF0; // Remove model revision code
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} while (phy_id1 != LAN8720_PHY_ID1 && phy_id2 != LAN8720_PHY_ID2);
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// Call esp_eth_smi_wait_value() with a timeout so it prints an error periodically
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res1 = esp_eth_smi_wait_value(MII_PHY_IDENTIFIER_1_REG, LAN8720_PHY_ID1, UINT16_MAX, 1000);
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res2 = esp_eth_smi_wait_value(MII_PHY_IDENTIFIER_2_REG, LAN8720_PHY_ID2, LAN8720_PHY_ID2_MASK, 1000);
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} while(res1 != ESP_OK || res2 != ESP_OK);
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esp_eth_smi_write(SW_STRAP_CONTROL_REG,
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DEFAULT_STRAP_CONFIG | SW_STRAP_CONFIG_DONE);
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@@ -26,6 +26,7 @@
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*/
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#define TLK110_PHY_ID1 0x2000
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#define TLK110_PHY_ID2 0xa210
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#define TLK110_PHY_ID2_MASK 0xFFF0
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/* TLK110-specific registers */
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#define SW_STRAP_CONTROL_REG (0x9)
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@@ -56,15 +57,9 @@ void phy_tlk110_check_phy_init(void)
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{
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phy_tlk110_dump_registers();
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while((esp_eth_smi_read(MII_BASIC_MODE_STATUS_REG) & MII_AUTO_NEGOTIATION_COMPLETE ) == 0) {
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vTaskDelay(1);
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}
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while((esp_eth_smi_read(PHY_STATUS_REG) & AUTO_NEGOTIATION_STATUS ) == 0) {
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vTaskDelay(1);
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}
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while((esp_eth_smi_read(CABLE_DIAGNOSTIC_CONTROL_REG) & DIAGNOSTIC_DONE ) == 0) {
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vTaskDelay(1);
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}
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esp_eth_smi_wait_set(MII_BASIC_MODE_STATUS_REG, MII_AUTO_NEGOTIATION_COMPLETE, 0);
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esp_eth_smi_wait_set(PHY_STATUS_REG, AUTO_NEGOTIATION_STATUS, 0);
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esp_eth_smi_wait_set(CABLE_DIAGNOSTIC_CONTROL_REG, DIAGNOSTIC_DONE, 0);
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}
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eth_speed_mode_t phy_tlk110_get_speed_mode(void)
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@@ -106,14 +101,12 @@ void phy_tlk110_init(void)
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esp_eth_smi_write(PHY_RESET_CONTROL_REG, SOFTWARE_RESET);
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unsigned phy_id1, phy_id2;
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esp_err_t res1, res2;
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do {
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vTaskDelay(1);
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phy_id1 = esp_eth_smi_read(MII_PHY_IDENTIFIER_1_REG);
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phy_id2 = esp_eth_smi_read(MII_PHY_IDENTIFIER_2_REG);
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ESP_LOGD(TAG, "PHY ID 0x%04x 0x%04x", phy_id1, phy_id2);
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phy_id2 &= 0xFFF0; // Remove model revision code
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} while (phy_id1 != TLK110_PHY_ID1 && phy_id2 != TLK110_PHY_ID2);
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// Call esp_eth_smi_wait_value() with a timeout so it prints an error periodically
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res1 = esp_eth_smi_wait_value(MII_PHY_IDENTIFIER_1_REG, TLK110_PHY_ID1, UINT16_MAX, 1000);
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res2 = esp_eth_smi_wait_value(MII_PHY_IDENTIFIER_2_REG, TLK110_PHY_ID2, TLK110_PHY_ID2_MASK, 1000);
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} while(res1 != ESP_OK || res2 != ESP_OK);
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esp_eth_smi_write(SW_STRAP_CONTROL_REG,
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DEFAULT_STRAP_CONFIG | SW_STRAP_CONFIG_DONE);
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